CN104683228B - A kind of digital switch media gateway realization method based on FPGA - Google Patents
A kind of digital switch media gateway realization method based on FPGA Download PDFInfo
- Publication number
- CN104683228B CN104683228B CN201510069181.8A CN201510069181A CN104683228B CN 104683228 B CN104683228 B CN 104683228B CN 201510069181 A CN201510069181 A CN 201510069181A CN 104683228 B CN104683228 B CN 104683228B
- Authority
- CN
- China
- Prior art keywords
- fpga
- dsp
- data packet
- routing
- sent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The digital switch media gateway realization method based on FPGA that the invention discloses a kind of, includes the following steps：The data packet from communication terminal is received from network interface receiving terminal using FPGA, and carries out type of data packet judgement；According to the type of data packet, FPGA cooperates the routing management for carrying out data packet, matching, encoding or decoding processing with DSP module；Processed data packet is sent to corresponding network IP and port by network interface transmitting terminal, completes conversion and the network transmission of voice data.The present invention is by combining FPGA and DSP, it completes network communication protocol and physical layer, the transmitting-receiving of link layer and network layer, encapsulation is unpacked and transmitted, realize the real-time processing of network packet, improve network transfer speeds, by categorizedly handling routing category information and voice messaging, and voice data is sent to by corresponding DSP according to routing iinformation and carries out encoding and decoding processing, realize interconnecting for the voice between different speech coding terminal.
Description
Technical field
The present invention relates to a kind of implementation method of media conversion forwarding more particularly to a kind of digital switch based on FPGA
Media gateway realization method is suitble to media conversion forwarding wide, in narrow-band digital communication, the especially end of the pattern containing multiple voice
Interconnection between end and docking.
Background technology
In wide and narrow strip exchange system, the coded format of each required voice data of terminal is often different, such as vehicle
Microscope carrier and hand-held set are using a kind of speech-encoded format, and telephone terminal may be other speech-encoded formats, in order to
Realize the voice communication of the terminal room of all kinds of different speech coding formats, it is necessary to the voice packet of different speech coding format into
Row coding or decoding, are allowed to be turned into the speech coding mode that terminal can identify.
In previous exchange system, the coding and decoding of the voice packet of different speech coding format is all by software Lai real
Existing, this just has the performance of software platform high requirement, therefore its cost is also corresponding higher.Moreover, software processing by
To the limitation of development platform, processing capacity is also fairly limited.Nonetheless, the real-time processing speed and essence of software processing
Degree is also all much less than the processing speed and precision of hardware handles.
FPGA (Filed Programmable Gate Array, field programmable gate array) chip is equal in many fields
It is widely used, especially in the communications field, due to extremely strong real-time and high speed processing ability, making it to signal
Progress is treated as possibility in real time.In addition, FPGA has the characteristics that rate is high, low in energy consumption in performance, price is low in cost
It is honest and clean, and complexity is may be decreased, it is easy to use.Moreover, FPGA is to realize it by the software programming of object chip structure
Function, thus only modification software can improve the original design scheme of system or original work(without changing hardware platform
Can, thus there is great flexibility.
Invention content
In order to solve above-mentioned deficiency in the prior art, the object of the present invention is to provide a kind of, and the number based on FPGA exchanges
Machine media gateway realization method is completed the coding and decoding to the data packet of different speech coding format by all kinds of DSP, is utilized
FPGA receives the voice packet that terminal is sent out from network interface receiving terminal, and judges the format of the voice packet, then by the reception of the voice packet
Port information is sent to routing DSP plus route querying flag information and goes to search the route results for routeing, and being sent out according to routing DSP
Voice packet is sent to corresponding speech processes DSP to go to carry out voice coding or decoding, then coding or decoded data are beaten
It is bundled into UDP packets and is sent to corresponding terminal from network interface transmitting terminal.
The present invention adopts the following technical scheme that：
A kind of digital switch media gateway realization method based on FPGA, includes the following steps：
S1：The data packet from communication terminal is received from network interface receiving terminal using FPGA, and carries out type of data packet judgement；
S2：According to the type of data packet, FPGA cooperates the routing management for carrying out data packet, matching, volume with DSP module
Code or decoding process；
S3：Processed data packet is sent to corresponding network IP and port by network interface transmitting terminal, completes voice number
According to conversion and network transmission.
Further, the type of the data packet in the step S1 includes：Route data packet, VoP, RARP packets,
ARP packets, ICMP packets, IGMP packets；DSP module in the step S2 includes the routing DSP being connect respectively with FPGA, multiple processing
The speech processes DSP of different speech coding, codec format.
Further, the FPGA in the step S2 and DSP module cooperate carry out data packet routing management,
Match, encoding or decoding processing, specially：
(1) it is wrapped for routing when the FPGA determines the type of data packet, then the data packet is added into routing iinformation mark,
It is sent to corresponding routing DSP in DSP module and carries out routing management, include establishment, deletion and the matching of routing, and routing is managed
Reason information feeds back to FPGA；
(2) when the FPGA determine data packet type be voice packet, then extract the receiving port information of voice packet, and
In addition route querying flag information, the routing DSP being sent in DSP module carries out route querying, and FPGA is read in routing DSP
Route searching result, voice packet is sent in corresponding speech processes DSP encoded, decoding process；FPGA reads voice
Processing dsp code, it is decoded as a result, and by the id information of speech processes DSP be sent to routing DSP carry out matched routings, according to
Matching result is determined the need for processed voice packet being sent to again in speech processes DSP and be handled, or voice packet is sent
To network interface sending port；
(3) when the FPGA types for determining data packet are RARP packets, ARP packets, ICMP packets, IGMP packets, then directly production
Packet mark is given birth to back, notice network interface transmitting terminal returns packet.
Further, processed data packet is sent to by corresponding network by network interface transmitting terminal in the step S3
IP and port, specifically, FPGA is by ARP, RARP, ICMP, IGMP, routing management feedback information and treated that voice data is beaten
Packet is sent to corresponding network IP and port by network interface transmitting terminal from physical layer, and then completes conversion and the network of voice data
Transmission.
Beneficial effects of the present invention：
The present invention is a kind of embedded system that FPGA and DSP is combined, and not only has other microprocessors and microcontroller
The advantages of embedded system and technical characteristic, and parallel algorithm operations, the Digital Signal Processing with higher speed can also be utilized
Ability, to realize that the real-time of system provides more favorable support, FPGA add dsp system will become modern electronic technology,
The mainstay of computer technology and the communication technology.The present invention is handled with hardware handles instead of software, in processing speed and essence
It all improves a lot on degree.And FPGA can be connected in parallel multiple DSP, processing capacity also accordingly improves much.
Description of the drawings
Fig. 1 is the flow diagram of the digital switch media gateway realization method based on FPGA of the present invention；
Fig. 2 is the media conversion of the present invention, forwarding detailed maps；
Fig. 3 is the course of work schematic diagram of the FPGA of the present invention.
Specific implementation mode
The present invention is described in detail with specific embodiment below in conjunction with the accompanying drawings.
As illustrated in fig. 1 and 2, a kind of digital switch media gateway realization method based on FPGA, includes the following steps：
S1：The data packet from communication terminal is received from network interface receiving terminal using FPGA, and carries out type of data packet judgement；
The type of the data packet includes：It route data packet, VoP, RARP packets, ARP packets, IGMP packets, IGMP packets；
S2：According to the type of data packet, FPGA cooperates the routing management for carrying out data packet, matching, volume with DSP module
Code or decoding process；The DSP module includes the routing DSP being connect respectively with FPGA, multiple processing different speech codings, solution
The speech processes DSP of code format；
S3：Processed data packet is sent to corresponding network IP and port by network interface transmitting terminal, completes voice number
According to conversion and network transmission.
The detailed operation of above three step is as follows：
1.1) the various network packets that FPGA is received from network interface receiving terminal physical layer；
1.2) FPGA to the network packet of to one's name IP differentiated at type of data packet judgement according to header packet information
Reason；
1.3) FPGA is according to the type of data packet, by data packet be sent to corresponding DSP in DSP module carry out routing management,
Matching or coding, decoding process；Specially：
(1) it is wrapped for routing when the FPGA determines the type of data packet, then the data packet is added into routing iinformation mark,
It is sent to corresponding routing DSP and carries out routing management, include establishment, deletion and the matching of routing, routing DSP feeds back routing management
Information realizes that FPGA collaboration routings DSP completes establishment, deletion and the matching feature of routing to FPGA；
(2) when the FPGA determine data packet type be voice packet, then extract the receiving port information of voice packet, and
In addition route querying flag information, is sent to routing DSP and carries out route querying, which voice voice packet is sent to by determination
DSP processing is handled, if route searching result shows the port route querying failure of the voice packet, directly by the voice
Packet directly abandons；If pass signal is fed back in route querying, FPGA reads the route searching result in routing DSP, by voice
Packet be sent in corresponding speech processes DSP encoded, decoding process；FPGA reads speech processes dsp code, decoding result,
And the id information of speech processes DSP is sent to routing DSP and carries out matched routings, following behaviour is determined according to matched routings result
Make：
If matched routings result indicates that the voice packet has completed the coding either decoding of certain phonetic matrix, should
Voice packet is sent to network interface sending port, this corresponding step is the case where can disposably completing coded format conversion；
If matched routings result indicates that the voice also needs to carry out the coding either decoding of another phonetic matrix again,
The voice packet is sent to the speech processes DSP for handling this voice by the interface of FPGA and DSP module, passes through FPGA and the language
Sound handle DSP interface read coding or decoding result after, then by the id information of speech processes DSP be sent to routing DSP go into
Row matched routings, and processed voice packet is sent to by network interface sending port according to matching result, it is more that this step corresponds to needs
Secondary the case where could realizing coded format conversion with different speech processes DSP；
(3) when the FPGA types for determining data packet are RARP packets, ARP packets, ICMP packets, IGMP packets, then directly production
Packet mark is given birth to back, notice network interface transmitting terminal returns packet.
1.4) last FPGA is by ARP, RARP, ICMP, IGMP, routing management feedback information and treated that voice data is beaten
Packet is sent to corresponding network IP and port by network interface transmitting terminal from physical layer, and then completes conversion and the network of voice data
Transmission realizes network communication protocol and physical layer, the encapsulation of link layer and network layer unpacks and transmission.
In model described in Fig. 3, after the order caching control module of FPGA receives data packet, header packet information is first passed through
Judge that the packet is what kind of data packet, if it is ARP packets, RARP packets, ICMP packets or IGMP packets, then passes the data packet
It is handled to ARP/RARP modules or ICMP/IGMP modules, and bag data will be returned and be transmitted to transmission buffer control module, it will
Packet is returned to send；If the data packet that FPGA is received is UDP packets or TCP packets, packet content is respectively transmitted and is received to UDP
Processing module or TCP receiving processing modules, then useful information is transmitted to upper level applications by the two modules.Equally, upper layer
The UDP or TCP that effective transmission data is transmitted to FPGA by application software send control module, are beaten data by the two modules
Packet sends out data packet through sending buffer control module.In this way, FPGA just realizes network link layer, network layer, transmission
The work of layer.
Part that the present invention does not relate to is the same as those in the prior art or be may be implemented using the prior art.
Obviously, the above embodiment of the present invention is intended to clearly illustrate examples of the invention, and is not to invention
Embodiment restriction.For those of ordinary skill in the art, it can also make on the basis of the above description
Other various forms of variations or variation.There is no need or an exhaustive list of all implementation methods.And these belong to this
The obvious changes or variations that the technical solution of invention is extended out still fall within the row of protection scope of the present invention.
Claims (1)
1. a kind of digital switch media gateway realization method based on FPGA, it is characterised in that：Include the following steps：
S1：The data packet from communication terminal is received from network interface receiving terminal using FPGA, and carries out type of data packet judgement；It is described
The type of data packet include：It route data packet, VoP, RARP packets, ARP packets, ICMP packets, IGMP packets；
S2：According to the type of data packet, FPGA and DSP module cooperate the routing management for carrying out data packet, matching, coding or
Person's decoding process；The DSP module includes the routing DSP being connect respectively with FPGA, multiple processing different speech codings, decoding
The speech processes DSP of format；The FPGA and DSP module cooperate the routing management for carrying out data packet, matching, coding or
Person's decoding process, specially：
(1) when the FPGA types for determining data packet are media gateway controlling message, i.e. routing is wrapped, then is added the data packet
Route information mark, the routing DSP being sent in DSP module carry out routing management, including routing establishment, delete and
Match, and routing management information is fed back into FPGA；
(2) when the FPGA determine data packet type be voice packet, then extract the receiving port information of voice packet, and add
Route querying flag information, the routing DSP being sent in DSP module carry out route querying, and FPGA reads the road in routing DSP
By lookup result, voice packet is sent in corresponding speech processes DSP encoded, decoding process；FPGA reads speech processes
Dsp code, it is decoded as a result, and by the id information of speech processes DSP be sent to routing DSP carry out matched routings, according to matching
As a result it determines the need for processed voice packet being sent to again in speech processes DSP and handle, or voice packet is sent to net
Mouth transmitting terminal, then directly transmitted by network interface；
(3) when the FPGA determine data packet type be RARP packets, ARP packets, ICMP packets, IGMP packets, then directly generate back
Packet mark, notice network interface transmitting terminal return packet；
S3：Processed data packet is sent to corresponding network IP and port by network interface transmitting terminal, completes voice data
Conversion and network transmission；Processed data packet is sent to by corresponding network IP by network interface transmitting terminal in the step S3
And port, specifically, ARP, RARP, ICMP, IGMP, routing management feedback information and treated voice data are packaged by FPGA
It is sent to corresponding network IP and port from physical layer by network interface transmitting terminal, and then completes conversion and the network biography of voice data
It is defeated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510069181.8A CN104683228B (en) | 2015-02-10 | 2015-02-10 | A kind of digital switch media gateway realization method based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510069181.8A CN104683228B (en) | 2015-02-10 | 2015-02-10 | A kind of digital switch media gateway realization method based on FPGA |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104683228A CN104683228A (en) | 2015-06-03 |
| CN104683228B true CN104683228B (en) | 2018-07-24 |
Family
ID=53317848
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510069181.8A Active CN104683228B (en) | 2015-02-10 | 2015-02-10 | A kind of digital switch media gateway realization method based on FPGA |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104683228B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105931670B (en) * | 2016-04-22 | 2019-09-03 | 西安电子科技大学 | Storage control device based on Nand flash storage array |
| CN111163106B (en) * | 2020-01-02 | 2022-03-25 | 上海航天测控通信研究所 | High-speed network preprocessing device based on world gateway |
| CN112788102B (en) * | 2020-12-24 | 2023-02-03 | 中电科航空电子有限公司 | Ground terminal system and operation interface capable of sending different types of data link messages |
| CN112737952B (en) * | 2020-12-28 | 2022-08-26 | Gotcex 有限公司 | FPGA service application layer information routing model and monitoring platform thereof |
| CN113726634B (en) * | 2021-08-19 | 2023-03-21 | 宏图智能物流股份有限公司 | Voice transmission system and method |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101374233A (en) * | 2008-10-23 | 2009-02-25 | 杭州华三通信技术有限公司 | Method and apparatus for adapting video stream frame rate, and FPGA chip as well as equipment for processing video stream |
| CN101582884A (en) * | 2009-06-15 | 2009-11-18 | 东南大学 | System and method for 3G data packet reorganization based on FPGA |
| CN201813391U (en) * | 2009-11-20 | 2011-04-27 | 北京五岳鑫信息技术股份有限公司 | Signaling-voice acquisition gateway |
| CN201860343U (en) * | 2010-09-13 | 2011-06-08 | 上海海加网络科技有限公司 | SSL VPN security gateway based on FPGA hardware acceleration |
| CN102624628A (en) * | 2012-03-22 | 2012-08-01 | 深圳市共进电子股份有限公司 | Home gateway and data packet express forwarding method for same |
| CN102821101A (en) * | 2012-07-27 | 2012-12-12 | 北京中科晶上科技有限公司 | IP data packet identification method and gateway |
| CN103139315A (en) * | 2013-03-26 | 2013-06-05 | 烽火通信科技股份有限公司 | Application layer protocol analysis method suitable for home gateway |
| CN103596064A (en) * | 2013-12-09 | 2014-02-19 | 中山爱科数字家庭产业孵化基地有限公司 | Environmentally friendly science and technology service video gateway and implementation method |
| CN103731343A (en) * | 2012-10-11 | 2014-04-16 | 中国科学院软件研究所 | MVB-WTB gateway based on LPC2468 and working method thereof |
-
2015
- 2015-02-10 CN CN201510069181.8A patent/CN104683228B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101374233A (en) * | 2008-10-23 | 2009-02-25 | 杭州华三通信技术有限公司 | Method and apparatus for adapting video stream frame rate, and FPGA chip as well as equipment for processing video stream |
| CN101582884A (en) * | 2009-06-15 | 2009-11-18 | 东南大学 | System and method for 3G data packet reorganization based on FPGA |
| CN201813391U (en) * | 2009-11-20 | 2011-04-27 | 北京五岳鑫信息技术股份有限公司 | Signaling-voice acquisition gateway |
| CN201860343U (en) * | 2010-09-13 | 2011-06-08 | 上海海加网络科技有限公司 | SSL VPN security gateway based on FPGA hardware acceleration |
| CN102624628A (en) * | 2012-03-22 | 2012-08-01 | 深圳市共进电子股份有限公司 | Home gateway and data packet express forwarding method for same |
| CN102821101A (en) * | 2012-07-27 | 2012-12-12 | 北京中科晶上科技有限公司 | IP data packet identification method and gateway |
| CN103731343A (en) * | 2012-10-11 | 2014-04-16 | 中国科学院软件研究所 | MVB-WTB gateway based on LPC2468 and working method thereof |
| CN103139315A (en) * | 2013-03-26 | 2013-06-05 | 烽火通信科技股份有限公司 | Application layer protocol analysis method suitable for home gateway |
| CN103596064A (en) * | 2013-12-09 | 2014-02-19 | 中山爱科数字家庭产业孵化基地有限公司 | Environmentally friendly science and technology service video gateway and implementation method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104683228A (en) | 2015-06-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104683228B (en) | A kind of digital switch media gateway realization method based on FPGA | |
| CN104852855B (en) | Jamming control method, device and equipment | |
| CN104937896A (en) | Method for processing address resolution protocol message, forwarder and controller | |
| WO2012075163A1 (en) | Systems and methods for multi-level switching of data frames | |
| CN203151742U (en) | A short message intercommunicating system between network clients and Beidou RDSS terminals | |
| CN105556916B (en) | The information statistical method and device of network flow | |
| US6714541B1 (en) | Method and apparatus for encoding bridging/switching information within a routing information filed in a token ring environment | |
| CN101170512A (en) | Message service processing method | |
| CN108390821A (en) | A kind of openflow interchangers realize the method and system of dual-active | |
| CN108075949A (en) | A kind of VPWS environment realizes the method and apparatus of RFC2544 | |
| CN106576108A (en) | Communication method and device, and system in communication system | |
| CN107579925A (en) | Message forwarding method and device | |
| CN101179477B (en) | Method for implementing built-in router | |
| CN105284083A (en) | OpenFlow device and IP network device communication method, device and system | |
| CN101064667A (en) | Method for monitoring and adjusting universal routing package tunnel state | |
| CN104113513B (en) | A kind of detecting host method, apparatus and system | |
| CN102255800A (en) | Method for converting data format between IP (Internet Protocol) data packages on CAN (Control Area Network) bus and CAN messages | |
| CN104699649B (en) | A kind of multiple-limb serial bus interface and method for interchanging data | |
| CN101610217B (en) | Method for implementing message transmission between extensible processor and switch chip and system thereof | |
| CN101005448A (en) | VoIP gateway transmission medium stream method | |
| CN1147094C (en) | Message receiving and transmitting method of combined bridge connection function and routing function | |
| CN104023091B (en) | A kind of multilink fusion method and equipment | |
| CN102611631A (en) | Method, device and system for protecting protocol under pseudo-wire scene | |
| CN101160905A (en) | DUA protocol based message transmission method and device | |
| CN102647347A (en) | Connection-based traffic processing method and system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |