CN104682953B - A kind of error calibrating method and device of tuning circuit - Google Patents
A kind of error calibrating method and device of tuning circuit Download PDFInfo
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- CN104682953B CN104682953B CN201510083243.0A CN201510083243A CN104682953B CN 104682953 B CN104682953 B CN 104682953B CN 201510083243 A CN201510083243 A CN 201510083243A CN 104682953 B CN104682953 B CN 104682953B
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Abstract
An embodiment of the present invention provides a kind of error calibrating method of tuning circuit and device, the method includes：Obtain test tuned frequency, tuning voltage and the preset sensitivity coefficient of tuning circuit；Resistance error value is obtained using the test tuned frequency, tuning voltage and preset sensitivity coefficient；It is obtained using the resistance error value, tuning voltage and preset sensitivity coefficient and corrects tuned frequency；The tuning circuit is configured using the amendment tuned frequency.The embodiment of the present invention to simplify tuning circuit calibration flow, artificial participation is reduced, breaks away from and changes the method that hardware resistance goes compensation circuit, by changing software calculating parameter to compensate the tuning circuit margin of error, cost is not only reduced, and there is stronger operability and scalability.
Description
Technical field
The present invention relates to mobile communication technology fields, more particularly to the error calibrating method and one kind of a kind of tuning circuit
The device that calibrates for error of tuning circuit.
Background technology
For analog receiver, frequency synthesizer source is its heart, it determine analog receiver the purity of frequency spectrum so that
In the error vector magnitude (EVM, Error Vector Magnitude) for determining analog receiver, neighboring trace leakage power ratio
(ACPR, Adjacent Channel Power Ratio), the indexs such as bit error rate (BER, Bit Error Rate).
The purity of frequency spectrum in frequency synthesizer source is usually weighed with phase noise and spuious index.Phaselocked loop (PLL, Phase
Locked Loop) it is one of the main technology for realizing high frequency frequency synthesizer source, higher and higher with the frequency of application, bandwidth is more next
Wider, the phase noise specifications that the prodigious challenge brought has been exactly are increasingly difficult to realize.In general, pll output signal
Phase noise proximal end depends on reference and phase-locked loop chip itself, distally depends on voltage controlled oscillator (VCO, voltage
controlled oscillator).However, the VCO phase noise specifications due to broadband are all poor, it is difficult to meet high-end
Application requirement.
Invention content
The embodiment of the present invention is the technical problem to be solved is that a kind of error calibrating method of tuning circuit is provided, to letter
The calibration flow for changing tuning circuit, reduces artificial participation, breaks away from and changes the method that hardware resistance goes compensation circuit, passes through change
Software calculating parameter not only reduces cost to compensate the tuning circuit margin of error, and with stronger operability and can
Autgmentability.
Correspondingly, the embodiment of the present invention additionally provides a kind of device that calibrates for error of tuning circuit, to ensure above-mentioned side
The realization and application of method.
To solve the above-mentioned problems, the invention discloses a kind of error calibrating methods of tuning circuit, including：
Obtain test tuned frequency, tuning voltage and the preset sensitivity coefficient of tuning circuit；
Resistance error value is obtained using the test tuned frequency, tuning voltage and preset sensitivity coefficient；
It is obtained using the resistance error value, tuning voltage and preset sensitivity coefficient and corrects tuned frequency；
The tuning circuit is configured using the amendment tuned frequency.
Preferably, described that resistance error value is obtained using test tuned frequency, tuning voltage and preset sensitivity coefficient
The step of include：
Test is carried out at default frequency point in specified band limits obtains test tuned frequency；
Obtain the tuning voltage at the default frequency point；
Using test tuned frequency, tuning voltage and the preset sensitivity coefficient, electricity is calculated according to preset formula
Hinder numerical value；
Mean value computation is carried out using the resistance value and obtains resistance error value.
Preferably, optimization tuning frequency is obtained using resistance error value, tuning voltage and preset sensitivity coefficient described
After the step of rate, further include：
Tuned frequency is corrected into preset compensation tuned frequency addition, obtains new amendment tuned frequency.
Preferably, described obtained using resistance error value, tuning voltage and preset sensitivity coefficient corrects tuned frequency
The step of include：
By the resistance error value, tuning voltage and preset sensitivity coefficient, calculates to correct according to preset formula and adjust
Harmonics rate.
Preferably, the tuning circuit is the main tuning circuit of YIG-tuned oscillator YTO.
The embodiment of the present invention additionally provides a kind of device that calibrates for error of tuning circuit, including：
Numerical value acquisition module is tuned, for obtaining the test tuned frequency of tuning circuit, tuning voltage and preset sensitive
Spend coefficient；
Resistance error value obtains module, for using test tuned frequency, tuning voltage and the preset sensitivity system
Number obtains resistance error value；
It corrects tuned frequency and obtains module, for using the resistance error value, tuning voltage and preset sensitivity system
Number, which obtains, corrects tuned frequency；
Tuning circuit configuration module, for configuring the tuning circuit using the amendment tuned frequency.
Preferably, the resistance error value acquisition module includes：
Tuned frequency tests submodule, at the default frequency point in specified band limits tested
Tuned frequency；
Tuning voltage acquisition submodule, for obtaining the tuning voltage at the default frequency point；
Resistance value computational submodule, for using test tuned frequency, tuning voltage and the preset sensitivity system
Number calculates resistance value according to preset formula；
Resistance error value obtains submodule, and resistance error value is obtained for carrying out mean value computation using the resistance value.
Preferably, the device further includes：
Tuned frequency compensating module obtains new repair for tuned frequency to be corrected in preset compensation tuned frequency addition
Positive tuned frequency.
Preferably, the amendment tuned frequency acquisition module includes：
Tuned frequency computational submodule is corrected, is used for the resistance error value, tuning voltage and preset sensitivity system
Number calculates according to preset formula and corrects tuned frequency.
Preferably, the tuning circuit is the main tuning circuit of YIG-tuned oscillator YTO.
Compared with prior art, the embodiment of the present invention includes following advantages：
According to the error law of tuning circuit in the embodiment of the present invention, ignore the error of each part in tuning circuit,
All errors are replaced to be compensated with individual resistance error value.The test tuned frequency specially obtained according to actual test,
And tuning voltage and preset sensitivity coefficient obtain resistance error value, then use the resistance error value to calculate and correct tuning
Frequency.The embodiment of the present invention simplifies the calibration flow for tuning circuit at present, and the artificial participation of no longer excessive needs can
Test analysis is carried out by the way of software automatic test obtains resistance error value, it is hard in tuning circuit compared to needing to change
The way of part resistance, the embodiment of the present invention can be used resistance error value and remove to calculate amendment tuned frequency without changing as modifying factor
Become actual hardware resistance, not only reduces cost, and there is stronger operability and scalability.
Description of the drawings
Fig. 1 is a kind of realization block diagram of the main tuning circuit with calibration function；
Fig. 2 is a kind of schematic diagram of main tuning circuit error elimination implementation；
Fig. 3 is a kind of test data schematic diagram of YIG tuning circuits open loop frequency-voltage tester table；
Fig. 4 is a kind of step flow chart of the error calibrating method embodiment of tuning circuit of the present invention；
Fig. 5 is a kind of schematic diagram 1 of YIG tuning circuits open-loop compensation test of the present invention；
Fig. 6 is a kind of schematic diagram 2 of YIG tuning circuits open-loop compensation test of the present invention；
Fig. 7 is a kind of structure diagram of the device embodiment that calibrates for error of tuning circuit of the present invention.
Specific implementation mode
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, below in conjunction with the accompanying drawings and specific real
Applying mode, the present invention is described in further detail.
In order to which the VCO phase noise specifications for solving traditional are all poor, it is difficult to the problem of meeting high-end application requirement, yttrium
Iron garnet (YIG, yttrium iron garnet) tuning oscillator (YTO, YIG-tuned oscillator) meet the tendency of and
It is raw.
YTO realizes the tuning in wide range using the size for changing resonance bead bias magnetic field, while it has very
(Q values are also the quality factor of inductance to high Q values, are the major parameters for weighing inductance component.Refer to inductor in a certain frequency
The ratio between the induction reactance presented when working under alternating voltage and its equivalent loss resistance.Q values are higher, and loss is smaller, and efficiency is higher),
It can realize good phase noise and spurious performance.YIG tuning circuits have good index, but its application is more multiple
It is miscellaneous.Different from the voltage-controlled voltage-controlled mode of list of traditional VCO, YIG tuning circuits are divided into main tuning by current control
Electric current and auxiliary tuning current.After only configuring main tuning electric current and auxiliary tuning current by the way that difference is correct, loop could be realized
Locking.
In general, the slope of the YIG tuning circuit main tunings of 4~8GHz is 18MHz/mA or so, the slope of auxiliary tuning is
300KHz/mA or so, by slope value it can be found that YIG tuning circuits are very sensitive for main tuning electric current, main tuning electric current
The variation of 1mA can cause frequency to change 18MHz.The lock-in range of general auxiliary tuning only has positive and negative tens megahertzs, therefore homophony
The humorous several milliamperes of curent change, which this may result in phaselocked loop, to be locked.Therefore very tight for the required precision of main tuning circuit
Lattice need output current value accurately (to be differed with theoretical value very much<1mA).Main tuning circuit implementing scheme is generally by one
High-precision DAC (Digital-to-Analog Converter, digital analog converter) exports high-precision voltage, then
It the DAC voltages exported is converted into electric current by amplifier and triode exports to give YIG tuning circuits.Wherein, main tuning circuit meeting
Built-in calibration circuit is used to calibrate the error of entire circuit.It realizes that circuit block diagram is specifically referred to Fig. 1.
In the concrete realization, there are many parts that can introduce error, such as resistance R1 in main tuning circuit, although two resistance
All it is R1, resistance value is the same.But there is no two identical resistance of resistance value in practice, therefore the error between resistance can cause
The variation of the follower output voltage of the first order.R3 for another example, the realization of electric current usually rely on voltage divided by resistance to obtain, R3
It is exactly the high-power resistor that voltage is converted into electric current.The accuracy of the resistance value just directly influences the accuracy of output current.
Amplifier open-loop gain also in circuit, the Leakage Current of triode can all influence final output current accuracy.And from
Engineering viewpoint says that these errors are all normal and inevitable.Fortunately, these errors discussed herein are also all solid
Fixed, then them can be gone to eliminate by a calibration method.Here it is the calibration circuit roles in Fig. 1.
With reference to Fig. 2, it show the structural schematic diagram that tradition at present eliminates a kind of implementation method of error, traditional realization side
Method is specifically：
1：Setting control voltage is minimum voltage (such as 0V), adjusts the resistance value calibration YIG tuning electricity of slide rheostat R1
The starting point on road, such as 4GHz obtain the corresponding resistance sizes of starting point.
2：Setting control voltage is maximum voltage (such as 10V), adjusts the resistance value calibration YIG tuning electricity of slide rheostat R2
The terminal on road, such as 8GHz obtain the corresponding resistance sizes of terminal.
3：Replace slide rheostat using fixed resistance.Due to being usually unable to get the resistance of general resistance value, usually
The resistance value of slide rheostat is realized using multiple resistance mode in series or in parallel.
4：Repetition measurement one time.Finally all frequency points variation between 4GHz and 8GHz, it is believed that be linear.It is counted by theory
It calculates and completes configuration.
Above-mentioned traditional implementation method calibrates minimum frequency by slide rheostat and highest frequency goes to obtain circuit error,
Then sliding resistance value is substituted with fixed resistance, finally the frequency point between minimum frequency and maximum frequency is defaulted as linear condition progress
Configuration.
Existing YIG tuning circuits calibration arrangements mode is to originate frequency point by calibration and end the mistake of frequency point in thinking
Difference is calibrated the correct configuration of entire frequency range while specific calibrating mode using slide rheostat to realize, is reused solid
Determine the mode of resistance replacement.Due to the incompleteness of fixed resistance resistance value, it is therefore desirable to be made up by multiple resistance and series connection.
Such way can have following three disadvantage：
1：Linear problem, the calibration arrangements strategy think that the frequency point between starting frequency point and termination frequency point is all linearly to become
The relationship of change.Therefore the configuration of entire frequency range could be realized by calibrating two points.But measured result is shown, even if being considered
The YIG tuning circuits of the preferable 4~8GHz of linear degree, linear degree is nor especially desirable.Specifically it is referred to Fig. 3 institutes
The test data schematic diagram of the YIG tuning circuits open loop frequency-voltage tester table shown.
The open-loop test that the test result of table shown in Fig. 3 is done based on 3 YIG MLTM-50308, measured result show,
Linearity error maximum has had reached 10MHz or so.It, can not be true due to the limitation of measuring instrument accuracy of instrument and temperature change
It must be accurately to recognize the error information.But it is at least existing from linearity difference problem in current data rule.
2：It is calibrated using slide rheostat, then realizes hardware circuit using the mode that fixed resistance is arranged in pairs or groups,
This method is simultaneously inconvenient, it is necessary first to after finishing calibration on board, it is also necessary to change hardware, replace resistance value.Artificially change
Making machine pasting board card, this is unfavorable for the consistency of performance of Control card.Simultaneously because the resistance value that slide rheostat may be mixed up finally is simultaneously
It is not general, it is therefore desirable to be arranged in pairs or groups using fixed resistance to realize.If slide rheostat characterizes the resistance of 1.711Kohm, and
Practical there is no the resistance of this resistance value again, then just needing the resistor coupled in parallel of a 1.8Kohm resistance and a 34.7Kohm
It realizes.Sometimes it also needs to add a series resistance.In general, can be come plus two parallel resistances using a series resistance
Represent the value of slide rheostat.From here it can also be seen that operation in this way is pretty troublesome.Not only to prepare different resistances on hardware
The resistance of value, and the calibration test that tries again is also needed to after replacement.
3：The calibration of precision is carried out due to the use of more resistance, then resistance used itself can also introduce mistake
Difference.This error is divided into two aspects, and a trueness error, one is temperature steady state error.Ensure the accurate of frequency calibration,
So the calibrating resistance resistance value for ensureing to substitute slide rheostat is just needed to stablize.If by taking YIG MLTM-50308 as an example, 4G- is generated
The signal of 8GHz, then the triode in main tuning circuit can bear the power consumption of highest 1.6W, precision resister can bear maximum
The power consumption of 2.1W, YIG chips can bear the power consumption of maximum 1.8W, and when YIG tuning circuit frequencies change, power consumption meeting
Certain variation occurs.This means that the temperature of the main tuning circuit of entire YIG tuning circuits can have certain fluctuating.Temperature
Degree can influence the resistance value of resistance, this is to say we calibrate YIG tuning circuits substitutional resistance need to meet higher temperature it is steady
Fixed degree.And the cost of high stability resistance is very high.From this view, this method and uneconomical.
Certain existing YIG tuning circuits calibration arrangements strategy is also to have its advantage, is exactly to use seldom calibration point
The state of entire frequency range is simulated, needs to reduce the work of calibration to sacrifice hardware resource and tolerance certain error as cost
It measures.
Exactly inventor herein is based on the above situation, and a kind of tuning circuit that the embodiment of the present invention proposes calibrates for error
Strategy ignores the mistake of each part in YIG tuning circuits in the configuration of independent frequency point for completing with frequency sweep configuration process
Difference replaces all errors to carry out calibration arrangements to YIG tuning circuits with individual resistance error value, final guarantee closed loop phase lock
Stability.
With reference to Fig. 4, a kind of step flow chart of the error calibrating method embodiment of tuning circuit of the present invention, tool are shown
Body may include steps of：
Step 101, test tuned frequency, tuning voltage and the preset sensitivity coefficient of tuning circuit are obtained；
Step 102, resistance error is obtained using the test tuned frequency, tuning voltage and preset sensitivity coefficient
Value；
In one preferred embodiment of the invention, the step 102 may include following sub-step：
Sub-step S11 carries out test at the default frequency point in specified band limits and obtains test tuned frequency；
Sub-step S12 obtains the tuning voltage at the default frequency point；
Sub-step S13, using test tuned frequency, tuning voltage and the preset sensitivity coefficient, according to preset
Formula calculates resistance value；
Sub-step S14 carries out mean value computation using the resistance value and obtains resistance error value.
In embodiments of the present invention, the error law of tuning circuit is tested and is analyzed.It is adjusted by actual measurement
The voltage-frequency characteristic of humorous circuit, and the voltage-frequency characteristic of the tuning circuit of theoretical calculation is compared, analysis obtains tuning
Circuit error can become larger with main tuning voltage and the trend that becomes larger, while the consistency of the trend and theory analysis.
The embodiment of the present invention ignores the error of each part in tuning circuit according to the error law of tuning circuit, with individually electricity
Resistance error amount replaces all errors to be compensated, and thus needs the calculating for carrying out resistance error value.
In order to make those skilled in the art that the embodiment of the present invention may be better understood, below by taking YIG tuning circuits as an example,
It is illustrated using specific example for obtaining the process of resistance error value.
In the concrete realization, perfect with board software automatic test function, the work artificially calibrated slowly all by
Instrument is tested automatically to be replaced, this also brings workload and temporal substantially reduces.The main thought of the embodiment of the present invention
By the way of software automatic test, by test voltage-frequency correspondence, to analyze its error law.Eventually by soft
Part configuration calculates to fall error compensation.
Start with first from the output frequency calculation formula of YIG main tuning circuits：
Wherein, Vtune is the voltage value of main tuning circuit, and range is from 0V-5V, and frequency is higher, and voltage is bigger.R values
It is high steady resistance (i.e. voltage the turns current resistor) value of high-precision, nominal value is 10 Europe.K values are the main tuning sensitivity of YIG, nominally
Value is 18MHz/mA.
These three parameters all have error.The constant error of Vtune comes from any one device on main tuning circuit
Part, (remarks：Here do not inquire into due to dynamic error caused by temperature), R values come from itself error of precision resister, generally
The resistance that meeting service precision is 0.1%, that is to say, that resistance value error is 0.01 Europe.The error of K values comes from YIG tuning circuits
Itself.
Three kinds of errors can all be measured in practice, then compensation is fallen one by one.But this method is achievable
Property it is very poor because test instrumentation also all has precision, the precision of test instrumentation to also bring along error, if respectively test mend
It repays, then testing three times or more times, error caused by test instrumentation can be a cumulative relationship.
By above-mentioned formula it can be seen that, the error of K values and R may be considered it is relatively-stationary, will not be with output frequency
The variation of rate and change.Vtune can become larger with the raising of frequency.It also means that, K values change 1MHz/V, and high frequency causes
Frequency variation greatly, and caused by low frequency frequency change it is small.R values change 0.1 Europe, and the bigger that also high frequency can change is low
The smaller that frequency can change.It is tested with the YIG under the conditions of this rule divided ring, specific test data is referred to Fig. 5.
In Figure 5, E is classified as the frequency values calculated according to theoretical value, and B is classified as the frequency values that actual test comes out, F row
For the error of the two, it is found that the error of F row is a gradually incremental process.Error size has reached 178.48MHz.
This error is consistent with the rule that resistance value brings error, therefore the size by changing resistance value can reduce the error.
Assuming that all errors are all on resistance, above-mentioned formula can be utilized, according to the test tuned frequency of actual test, and correlation
Tuning factor, then the anti-resistance value for releasing each frequency point averages for the resistance data, can obtain resistance error
Value.
For example, according to the data in Fig. 5, resistance value can be optimized for 9.758 Europe according to calculated resistance error value.
Tuned frequency is calculated according to the resistance value after optimization, such error information is just changed, and specific test data is referred to
Fig. 6.It can be found that test and theory error range greatly reduce from figure.
In one preferred embodiment of the invention, after the step 103, can also include the following steps：
Tuned frequency is corrected into preset compensation tuned frequency addition, obtains new amendment tuned frequency.
From the test data of Fig. 6 it can be found that test and theory error range have narrowed down to 12.6MHz, and
And if the compensation tuned frequency using -66MHz goes to compensate, the worst error of each Frequency point is about on the left sides 7MHz
The right side, this value are still much smaller than lock-in range.
That is, if the compensation tuned frequency for being -66MHz to theoretical calculation frequency point is fixed compensation, and
The correction resistance value that 9.758 Europe are used in calculating process, can allow theory to configure frequency point and theoretical calculation frequency point maximum disparity control
System is in 7MHz or so.Meet the requirement of closed loop locking.
It should be noted that the actual value of resistance is not substantially 9.758 Europe, therefore, it is considered that resistance value here is actually
It is a modifying factor.And the numerical value that the modifying factor of acquisition is tested in different tuning circuits is different.
The embodiment of the present invention can calculate tuned frequency value by software by revised theory, and be repaiied by modifying factor
Positive theoretical resistance is reconfigured the tuned frequency of YIG tuning circuits, can reach minimum error.
In a kind of preferable example of the present invention, calibration can be gone primary every 0.1V, such as in the frequency model of 4G~8G
It in enclosing, does a test every 400MHz frequency points or so, does 20 tests altogether and complete entire calibration process, it so also can be significantly
Improve the linearity between calibration point.
In addition, if YIG tuning circuits are very wide using frequency range, calibration number can also be improved to further increase the linearity
Level, scalability are stronger.And due to software automated testing, even if calibration number increases, will not to workload and when
Between cause significantly to improve.
Step 103, it is obtained using the resistance error value, tuning voltage and preset sensitivity coefficient and corrects tuning frequency
Rate；
In one preferred embodiment of the invention, the step 103 may include following sub-step：
Sub-step S21, by the resistance error value, tuning voltage and preset sensitivity coefficient, according to preset formula
It calculates and corrects tuned frequency.
After getting resistance error value, it can be calculated according to the output frequency of YIG main tuning circuits and correct tuned frequency,
The embodiment of the present invention is according to the error laws of YIG tuning circuits, to by revised resistance error value, by the mistake of wide-band
Difference is adapted in hardware tolerance interval, and simple resistance value is changed into modifying factor, can obtain minimum error.
Step 104, the tuning circuit is configured using the amendment tuned frequency.
In summary：The principle of the embodiment of the present invention is, it is contemplated that causes the factor of error that may have very much, according to YIG
The error law of tuning circuit, it will be assumed that all errors are all since resistance precision causes, by compensating resistance precision, so that it may with
Compensate the error of frequency.And the compensation only changes us when configuring main tuning circuit not by hardware resistance is changed
Calculate resistance value size, it is possible to reduce tuned frequency computational accuracy is improved on the basis of cost.Simultaneously because automatic using software
Change test, workload and time will not be caused significantly to improve.
Calibrating for error for YIG tuning circuits is carried out using the embodiment of the present invention at least to have the following advantages that：
1：The current calibration flow for YIG tuning circuits is simplified, the artificial participation of no longer excessive needs can lead to
The method for crossing software automatic test tests out the margin of error of frequency, ignores the error of each part in YIG tuning circuits, with list
Only resistance error value replaces all errors to be compensated, then can find resistance error value by analysis.
2：It has broken away from and has changed the method that hardware resistance removes compensation tuning circuit, the embodiment of the present invention is calculated by changing software
Parameter goes the compensation margin of error, in cost and in operability, all improves a lot.
3：The problem of may being brought due to device linearity degree difference is effectively reduced, and is with good expansibility, is carried
Linearity index can be improved in high measurement number, and since software automated testing will not cause significantly workload and time
It improves, reduces actual cost.
It should be noted that for embodiment of the method, for simple description, therefore it is all expressed as a series of action group
It closes, but those skilled in the art should understand that, the embodiment of the present invention is not limited by the described action sequence, because according to
According to the embodiment of the present invention, certain steps can be performed in other orders or simultaneously.Secondly, those skilled in the art also should
Know, embodiment described in this description belongs to preferred embodiment, and the involved action not necessarily present invention is implemented
Necessary to example.
With reference to Fig. 7, shows a kind of structure diagram of the device embodiment that calibrates for error of tuning circuit of the present invention, specifically may be used
To include following module：
Tune numerical value acquisition module 201, test tuned frequency, tuning voltage and preset spirit for obtaining tuning circuit
Sensitivity coefficient；
Resistance error value obtains module 202, for using test tuned frequency, tuning voltage and the preset sensitivity
Coefficient obtains resistance error value；
In one preferred embodiment of the invention, it may include following submodule that the resistance error value, which obtains module 202,
Block：
Tuned frequency tests submodule, at the default frequency point in specified band limits tested
Tuned frequency；
Tuning voltage acquisition submodule, for obtaining the tuning voltage at the default frequency point；
Resistance value computational submodule, for using test tuned frequency, tuning voltage and the preset sensitivity system
Number calculates resistance value according to preset formula；
Resistance error value obtains submodule, and resistance error value is obtained for carrying out mean value computation using the resistance value.
It corrects tuned frequency and obtains module 203, for using the resistance error value, tuning voltage and preset sensitivity
Coefficient, which obtains, corrects tuned frequency；
In one preferred embodiment of the invention, it may include following son that the amendment tuned frequency, which obtains module 203,
Module：
Tuned frequency computational submodule is corrected, is used for the resistance error value, tuning voltage and preset sensitivity system
Number calculates according to preset formula and corrects tuned frequency.
Tuning circuit configuration module 204, for configuring the tuning circuit using the amendment tuned frequency.
In one preferred embodiment of the invention, the device can also include following module：
Tuned frequency compensating module obtains new repair for tuned frequency to be corrected in preset compensation tuned frequency addition
Positive tuned frequency.
In one preferred embodiment of the invention, the tuning circuit can be YIG-tuned oscillator YTO
Main tuning circuit.
For device embodiments, since it is basically similar to the method embodiment, so fairly simple, the correlation of description
Place illustrates referring to the part of embodiment of the method.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with
The difference of other embodiment, the same or similar parts between the embodiments can be referred to each other.
It should be understood by those skilled in the art that, the embodiment of the embodiment of the present invention can be provided as method, apparatus or calculate
Machine program product.Therefore, the embodiment of the present invention can be used complete hardware embodiment, complete software embodiment or combine software and
The form of the embodiment of hardware aspect.Moreover, the embodiment of the present invention can be used one or more wherein include computer can
With in the computer-usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) of program code
The form of the computer program product of implementation.
The embodiment of the present invention be with reference to according to the method for the embodiment of the present invention, terminal device (system) and computer program
The flowchart and/or the block diagram of product describes.It should be understood that flowchart and/or the block diagram can be realized by computer program instructions
In each flow and/or block and flowchart and/or the block diagram in flow and/or box combination.These can be provided
Computer program instructions are set to all-purpose computer, special purpose computer, Embedded Processor or other programmable data processing terminals
Standby processor is to generate a machine so that is held by the processor of computer or other programmable data processing terminal equipments
Capable instruction generates for realizing in one flow of flow chart or multiple flows and/or one box of block diagram or multiple boxes
The device of specified function.
These computer program instructions, which may also be stored in, can guide computer or other programmable data processing terminal equipments
In computer-readable memory operate in a specific manner so that instruction stored in the computer readable memory generates packet
The manufacture of command device is included, which realizes in one flow of flow chart or multiple flows and/or one side of block diagram
The function of being specified in frame or multiple boxes.
These computer program instructions can be also loaded into computer or other programmable data processing terminal equipments so that
Series of operation steps are executed on computer or other programmable terminal equipments to generate computer implemented processing, thus
The instruction executed on computer or other programmable terminal equipments is provided for realizing in one flow of flow chart or multiple flows
And/or in one box of block diagram or multiple boxes specify function the step of.
Although the preferred embodiment of the embodiment of the present invention has been described, once a person skilled in the art knows bases
This creative concept, then additional changes and modifications can be made to these embodiments.So the following claims are intended to be interpreted as
Including preferred embodiment and fall into all change and modification of range of embodiment of the invention.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that process, method, article or terminal device including a series of elements not only wrap
Those elements are included, but also include other elements that are not explicitly listed, or further include for this process, method, article
Or the element that terminal device is intrinsic.In the absence of more restrictions, being wanted by what sentence "including a ..." limited
Element, it is not excluded that there is also other identical elements in process, method, article or the terminal device including the element.
Above to a kind of error school of the error calibrating method and a kind of tuning circuit of tuning circuit provided by the present invention
Standard apparatus is described in detail, and principle and implementation of the present invention are described for specific case used herein,
The explanation of above example is only intended to facilitate the understanding of the method and its core concept of the invention；Meanwhile for the one of this field
As technical staff, according to the thought of the present invention, there will be changes in the specific implementation manner and application range, to sum up institute
It states, the content of the present specification should not be construed as limiting the invention.
Claims (2)
1. a kind of error calibrating method of tuning circuit, which is characterized in that including：
Obtain test tuned frequency, tuning voltage and the preset sensitivity coefficient of tuning circuit；
Resistance error value is obtained using the test tuned frequency, tuning voltage and preset sensitivity coefficient；
It is obtained using the resistance error value, tuning voltage and preset sensitivity coefficient and corrects tuned frequency；
Tuned frequency is corrected into preset compensation tuned frequency addition, obtains new amendment tuned frequency；
The tuning circuit is configured using the amendment tuned frequency；
It is described to include using the step of test tuned frequency, tuning voltage and preset sensitivity coefficient acquisition resistance error value：
Test is carried out at default frequency point in specified band limits obtains test tuned frequency；
Obtain the tuning voltage at the default frequency point；
Using test tuned frequency, tuning voltage and the preset sensitivity coefficient, resistance number is calculated according to preset formula
Value；
Mean value computation is carried out using the resistance value and obtains resistance error value；
Described the step of obtaining amendment tuned frequency using the resistance error value, tuning voltage and preset sensitivity coefficient, wraps
It includes：
By the resistance error value, tuning voltage and preset sensitivity coefficient, is calculated according to preset formula and correct tuning frequency
Rate；
The tuning circuit is the main tuning circuit of YIG-tuned oscillator YTO.
2. a kind of device that calibrates for error of tuning circuit, which is characterized in that including：
Tune numerical value acquisition module, test tuned frequency, tuning voltage and preset sensitivity system for obtaining tuning circuit
Number；
Resistance error value obtains module, for being obtained using test tuned frequency, tuning voltage and the preset sensitivity coefficient
Obtain resistance error value；
It corrects tuned frequency and obtains module, for being obtained using the resistance error value, tuning voltage and preset sensitivity coefficient
Tuned frequency must be corrected；
Tuned frequency compensating module obtains new amendment tune for tuned frequency to be corrected in preset compensation tuned frequency addition
Harmonics rate；
Tuning circuit configuration module, for configuring the tuning circuit using the amendment tuned frequency；
The resistance error value obtains module：
Tuned frequency tests submodule, and test tuning is obtained for carrying out test at the default frequency point in specified band limits
Frequency；
Tuning voltage acquisition submodule, for obtaining the tuning voltage at the default frequency point；
Resistance value computational submodule is pressed for using test tuned frequency, tuning voltage and the preset sensitivity coefficient
Resistance value is calculated according to preset formula；
Resistance error value obtains submodule, and resistance error value is obtained for carrying out mean value computation using the resistance value；
The amendment tuned frequency obtains module：
Tuned frequency computational submodule is corrected, for by the resistance error value, tuning voltage and preset sensitivity coefficient, pressing
It is calculated according to preset formula and corrects tuned frequency；
The tuning circuit is the main tuning circuit of YIG-tuned oscillator YTO.
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| CN201510083243.0A CN104682953B (en) | 2015-02-15 | 2015-02-15 | A kind of error calibrating method and device of tuning circuit |
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| CN201510083243.0A CN104682953B (en) | 2015-02-15 | 2015-02-15 | A kind of error calibrating method and device of tuning circuit |
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| CN104682953B true CN104682953B (en) | 2018-08-03 |
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|---|---|---|---|---|
| US7342461B1 (en) * | 2005-02-24 | 2008-03-11 | Multigig, Inc. | Feedback circuit for minimizing VCO sensitivity |
| CN101282105A (en) * | 2007-08-10 | 2008-10-08 | 嘉兴闻泰通讯科技有限公司 | Method for calibrating crystal of PHS mobile phone |
| CN103904998A (en) * | 2012-12-28 | 2014-07-02 | 联芯科技有限公司 | Method and device for adjusting frequency of mobile terminal |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1266964C (en) * | 2002-10-10 | 2006-07-26 | 华为技术有限公司 | Automatic correction compensation system and method for mobile terminal |
| US8686799B2 (en) * | 2007-12-31 | 2014-04-01 | Texas Instruments Incorporated | Low noise wide range voltage-controlled oscillator with transistor feedback |
| US8994460B2 (en) * | 2012-11-13 | 2015-03-31 | International Business Machines Corporation | Implementing compact current mode logic (CML) inductor capacitor (LC) voltage controlled oscillator (VCO) for high-speed data communications |
| CN103647525B (en) * | 2013-12-19 | 2016-06-29 | 中国电子科技集团公司第四十一研究所 | A kind of drive circuit improving YIG-filter scanning accuracy and driving method |
| CN104143961B (en) * | 2014-07-25 | 2018-01-19 | 广东大普通信技术有限公司 | A kind of constant-temperature crystal oscillator transmitting frequency calibration method, apparatus and system |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7342461B1 (en) * | 2005-02-24 | 2008-03-11 | Multigig, Inc. | Feedback circuit for minimizing VCO sensitivity |
| CN101282105A (en) * | 2007-08-10 | 2008-10-08 | 嘉兴闻泰通讯科技有限公司 | Method for calibrating crystal of PHS mobile phone |
| CN103904998A (en) * | 2012-12-28 | 2014-07-02 | 联芯科技有限公司 | Method and device for adjusting frequency of mobile terminal |
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