CN104637694A - Micro super capacitor nano-device based on porous graphene-supported polyaniline heterostructure and manufacturing method thereof - Google Patents
Micro super capacitor nano-device based on porous graphene-supported polyaniline heterostructure and manufacturing method thereof Download PDFInfo
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- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/22—Electrodes
- H01G11/26—Electrodes characterised by their structure, e.g. multi-layered, porosity or surface features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/22—Electrodes
- H01G11/24—Electrodes characterised by structural features of the materials making up or comprised in the electrodes, e.g. form, surface area or porosity; characterised by the structural features of powders or particles used therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/22—Electrodes
- H01G11/26—Electrodes characterised by their structure, e.g. multi-layered, porosity or surface features
- H01G11/28—Electrodes characterised by their structure, e.g. multi-layered, porosity or surface features arranged or disposed on a current collector; Layers or phases between electrodes and current collectors, e.g. adhesives
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/22—Electrodes
- H01G11/30—Electrodes characterised by their material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/22—Electrodes
- H01G11/30—Electrodes characterised by their material
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- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/84—Processes for the manufacture of hybrid or EDL capacitors, or components thereof
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- H—ELECTRICITY
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- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/84—Processes for the manufacture of hybrid or EDL capacitors, or components thereof
- H01G11/86—Processes for the manufacture of hybrid or EDL capacitors, or components thereof specially adapted for electrodes
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- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/13—Energy storage using capacitors
Abstract
The invention relates to a micro super capacitor nano-device based on a porous-graphene-supported polyaniline heterostructure and a manufacturing method thereof. A symmetrical fork electrode structure is formed on a substrate material; forks are 100-200 nanometers in widths; the distances among the forks are 50-100 nanometers; electrolyte is added dropwise; in the fork electrode structure, gold serving as a current collector is taken as the first layer of an electrode material; porous graphene is attached to the gold and is taken as the second layer of the electrode material; polyaniline is coated on the porous graphene and is taken as the surface layer of the electrode material; the gold is 10-20 nanometers in thickness; the porous graphene is 20-40 nanometers in thickness; the polyaniline is 20-40 nanometers in thickness; the electrode material is 50-100 nanometers in total thickness. The micro super capacitor nano-device has the beneficial effects that a micro energy storing device can store more energy on the premise of ensuring high electronic conduction, so that the capacity and energy density of a super capacitor are further increased.
Description
Technical field
The present invention relates to porous graphene and support polyaniline heterostructure base micro super capacitor nano-device and preparation method thereof.
Background technology
Along with sharp increase and the socioeconomic fast development of population, resource and the energy are with gradually exhausted, biological environment worsens with benefit, for meeting user demand and the environmental requirement of consumer, people propose following requirement to dynamic power system: function admirable, life-span be long, cheap, have wide range of applications.In addition, along with the continuous progress of human sciences's technology, the same benefit protection of earth environment being also subject to the public is paid close attention to, and therefore, the exploitation of human society promptly to new forms of energy, the new opplication field of energy storage device is also in continuous expansion.
Ultracapacitor, it is a kind of novel energy-storing device between battery and traditional capacitor grown up the seventies and eighties in 20th century, there is the super large capacitor amount of farad level, larger than the electrolytic capacitor capacity of same volume 2000-6000 times, power density ratio battery height 10-100 doubly, there is longer cycle life simultaneously, be considered to a kind of efficient, practical new cleaning fuel, at present as stand-by power supply, be widely used in the electronic device products such as camera, video tape recorder, mobile phone, computer.It has the characteristic of physical capacitor and battery concurrently, can provide the energy density higher than physical capacitor, has higher power density and longer cycle life than battery, and this capacitor oneself realize industrialization and practical application at industrial circle.In dynamical system as the electric automobile designed and developed and composite electric automobile considering environmental protection to need, the requirement that battery cannot meet dynamical system if be used alone, but hybrid power source system high power density electrochemical capacitor and high energy density cells composed in parallel both had met the needs of high power density, the needs that high-energy reclaims were met again.The electrochemical capacitor of high-energy-density, high power density is becoming the focus of people's research.
Due to the difference of energy storage mechnism, ultracapacitor is divided into by people: (1) asks the double electric layer capacitor of interfacial electric double layer principle based on high specific surface area electrode material and solution; (2) based on pseudocapacitors (Pseud.capacitor) 12l of electrochemistry underpotential deposition or redox farad process.Fake capacitance is different from the formation mechenism of electric double layer capacitance, but does not mutually repel.The generation of electric double layer capacitance is mainly separated the electric double layer capacitance produced based on electrode/electrolyte interface charge carriers, as carbon electrode capacitor; The generation of pseudocapacitors electric capacity on noble metal electrode surface, underpotential deposition occurs based on electroactive ion, or the adsorption capacitance on noble metal oxide electrodes surface, redox reaction occurring and produce.The charge and discharge process of bigger serface pseudo-capacitance electrode can form electric double layer capacitance, the charge and discharge process of electric double layer capacitance electrode (as porous charcoal) is often attended by fake capacitance oxidation-reduction process and occurs, the actual electrochemical capacitor macroscopic view that normally both coexist embodies, and the just whichever that confirm accounts for main problem.
In existing research, no matter be electric double layer capacitance or fake capacitance, the effective ways improving condenser capacity are all the specific areas improving electrode material.Double electric layer capacitor adopts the active carbon of high-specific surface area usually; Pseudocapacitors adopts the metal oxide of nano particle size usually.But, the micropore surface that only can contact with electrolyte in electrode material could produce electric capacity, the deficiency of existing double electric layer capacitor and pseudocapacitors is, the major part of porous electrode surface area is micropore, due to the capillary effect of electrolyte solution, make electrolyte solution be difficult to enter in the micropore of porous electrode, cause electrode material surface to amass utilance low, the carbon electrode material specific area even produced is very large, but the phenomenon that after making capacitor, electric capacity is little.
Summary of the invention
The present invention proposes a kind of porous graphene and supports polyaniline heterostructure base micro super capacitor nano-device and preparation method thereof, adopt the synergy of bi-material compound, the porous of porous graphene can realize the three-dimensional conduction carrier of interlayer, by improving and increase the conduction of charge carrier in electrode and storage, improve the capacity of ultracapacitor further.
To achieve these goals, technical scheme of the present invention is: a kind of porous graphene supports polyaniline heterostructure base micro super capacitor nano-device, it for doing symmetrical interdigitated electrode structure on base material, interdigital width is 100-200nm, and each interdigital between distance be 50-100nm, then drip electrolyte; In described interdigitated electrode structure, gold is electrode material ground floor as collector, porous graphene appendix on gold as the electrode material second layer, polyaniline-coated on porous graphene as electrode material top layer, the thickness of gold is 10-20nm, the thickness of porous graphene is 20-40nm, and the thickness of polyaniline is 20-40nm.
By such scheme, described base material is PETG, silicon chip, glass substrate or PEN.
By such scheme, described electrolyte is H
2sO
4, H
3pO
4or LiCl.
Described porous graphene supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, comprises the steps:
1) clean substrate;
2) in step 1) basis on, on base material, be coated with photoresist by sol evenning machine;
3) in step 2) basis on, on the even base material crossing glue, prepare the electrode trenches of interdigital electrode by optical etching technology;
4) in step 3) basis on, prepare all ground floors making the electrode material of collector with gold by physical vapour deposition (PVD);
5) in step 4) basis on, porous graphene is dripped and to be coated with and on the ground floor covering all electrode materials;
6) in step 5) basis on, the substrate being coated with the electrode material of porous graphene is soaked in the liquid that removes photoresist, remove photoresist;
7) in step 6) basis on, utilize the substrate of electrochemical test system to the electrode material being coated with porous graphene to adopt cyclic voltammetry electro-deposition polyaniline;
8) in step 7) basis on, the interdigital electrode of the nano-device of gained drips electrolyte and utilizes probe station to carry out performance test.
The invention has the beneficial effects as follows: for improving the low density problem of capacitor energy, now common thinking has two aspects, and one is: by changing the dimensional structure of material, increase material and electrolytical contact area.As scantling nanometer, or prepare the structure of porous; Two are: by the compound with other materials, chemically composition improve its energy-storage property, as MnO
2with the compound of Graphene.The present invention is by two kinds of thinking compounds, namely construct by Graphene introducing enhancing electrical conductivity and loose structure the conduction increasing charge carrier, make the ion in electrolyte easierly can enter the inside of fake capacitance electrode material, under the guarantee of high electronic conductance, miniature energy storage device can be allowed to store more electricity, thus further increase capacity and the energy density of ultracapacitor.
Accompanying drawing explanation
Fig. 1 is the flow chart constructing porous graphene support polyaniline heterostructure base micro super capacitor nano-device of embodiment 1;
Fig. 2 is the optical microscopy map of the porous graphene support polyaniline heterostructure base micro super capacitor nano-device of embodiment 1;
Fig. 3 is the cyclic voltammogram of the gold/porous graphene/polyaniline compound of embodiment 1;
Fig. 4 is that the substance characterization figure that the porous graphene of embodiment 1 supports in polyaniline heterostructure base micro super capacitor nano-device on electrode comprises XPS collection of illustrative plates and Reman collection of illustrative plates;
Fig. 5 is the working mechanism of the porous graphene/polyaniline hierarchy electrode of the porous graphene support polyaniline heterostructure base micro super capacitor nano-device of embodiment 1.
Specific embodiments
For a better understanding of the present invention, illustrate content of the present invention further below in conjunction with example, but content of the present invention is not only confined to the following examples.
Embodiment 1:
As shown in Figure 1, porous graphene supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, and it comprises the steps:
1) select silicon chip, silicon chip is cut into suitable size, then uses isopropyl alcohol (IPA) ultrasonic cleaning silicon chip to be about 3min, dry up with nitrogen;
2) use spin coating instrument spin coating one deck 9000A on substrate, the rotating speed of spin coating is 4000r/min, and spin-coating time is 40s, uses electric hot plate to toast after even glue, 100 DEG C, 15min;
3) mask aligner is used on the silicon chip that spin coating is good, to etch interdigital electrode pattern, time for exposure 28s;
4) develop: the substrate crossed by photoengraving is first placed in RD6 developer solution and soaks 90s, then put into deionized water and soak 30s, then put into second part of deionized water and soak 30s, nitrogen dries up;
5) metal fever evaporation (PVD): use thermal evaporation plated film instrument evaporation metal, the ground floor of the electrode material of obtained interdigital electrode, interdigital width 150nm, interdigital spacing 50nm, Ti/Au (3nm/17nm);
6) coating of porous graphene: be coated with by porous graphene and drip on the ground floor of the electrode material of interdigital electrode, first time drips 5 μ L, dries up, drip 2 μ L afterwards at every turn, dry up, repeat this step 10 time with nitrogen with nitrogen;
7) photoresist lift off: the substrate of the electrode material being coated with porous graphene is placed on SU8 and removes photoresist in liquid and leave standstill 3h, 9000A is all peeled off, and then with the liquid ultrasonic cleaning 5 minutes of removing photoresist of SU8, the photoresist between the electrode material of interdigital electrode and porous graphene are all removed totally;
8) deposition of polyaniline: two contact conductors of substrate are coupled together with silver slurry, and use electrochemical workstation to carry out cyclic voltammetry scan, scanning voltage is (-0.2-1.6V), sweeping speed is 0.03V/s, electrolyte is the aniline solution of preparation, 1mL aniline is dissolved in the dilution heat of sulfuric acid of 200mL 0.01mol/L, circulates 10 times by three electrode cycle voltammetries;
9) performance test: interelectrode for connection two silver slurry is scraped from, make two electrodes separately, be then placed in probe station by substrate, and on electrode, drip 1mL electrolyte, the dilute sulfuric acid of 1mol/L, caller is tested.
Each 2 μ L on gold electrode, drip 10 porous graphenes, its nanometer layer thickness is 20nm, and the polyaniline nano layer of electro-deposition is about 20nm, the gross thickness of obtained electrode material is 60nm, as shown in Figure 2, the interdigital width 150nm of interdigital electrode, interdigital spacing 50nm, the sulfuric acid of 1mol/L is used to carry out electro-chemical test as electrolyte, test voltage interval (-0.3-0.8V), as shown in Figure 3, the nano-device volume and capacity ratio of gained is up to 358.1F/cm
3as shown in Figure 4, the electrode substance of gained nano-device includes carbon (C), nitrogen (N), oxygen (O) three kinds of elements also demonstrate the existence of porous graphene and polyaniline, as shown in Figure 5, for the working mechanism of the porous graphene/polyaniline hierarchy electrode of gained nano-device, the solid that charge carrier is realized between layers by loose structure in porous graphene is conducted, charge carrier and polyaniline is made to have more contact, thus more electric charge can be stored in polyaniline, improve the capacity of nano-device.
Embodiment 2:
Porous graphene supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, and it comprises the steps:
1) select silicon chip, silicon chip is cut into suitable size, then uses isopropyl alcohol (IPA) ultrasonic cleaning silicon chip to be about 3min, dry up with nitrogen;
2) use spin coating instrument spin coating one deck 9000A on substrate, the rotating speed of spin coating is 4000r/min, and spin-coating time is 40s, uses electric hot plate to toast after even glue, 100 DEG C, 15min;
3) mask aligner is used on the silicon chip that spin coating is good, to etch interdigital electrode pattern, time for exposure 28s;
4) develop: the substrate crossed by photoengraving is first placed in RD6 developer solution and soaks 90s, then put into deionized water and soak 30s, then put into second part of deionized water and soak 30s, nitrogen dries up;
5) metal fever evaporation (PVD): use thermal evaporation plated film instrument evaporation metal, the ground floor of the electrode material of obtained interdigital electrode, interdigital width 150nm, interdigital spacing 50nm, Ti/Au (3nm/17nm);
6) coating of porous graphene: be coated with by porous graphene and drip on the ground floor of the electrode material of interdigital electrode, first time drips 5 μ L, dries up, drip 2 μ L afterwards at every turn, dry up, repeat this step 5 time with nitrogen with nitrogen;
7) photoresist lift off: the substrate of the electrode material being coated with porous graphene is placed on SU8 and removes photoresist in liquid and leave standstill 3h, 9000A is all peeled off, and then with the liquid ultrasonic cleaning 5 minutes of removing photoresist of SU8, the photoresist between the electrode material of interdigital electrode and porous graphene are all removed totally;
8) deposition of polyaniline: two contact conductors of substrate are coupled together with silver slurry, and use electrochemical workstation to carry out cyclic voltammetry scan, scanning voltage is (-0.2-1.6V), sweeping speed is 0.03V/s, electrolyte is the aniline solution of preparation, 1mL aniline is dissolved in the dilution heat of sulfuric acid of 200mL 0.01mol/L, circulates 10 times by three electrode cycle voltammetries;
9) performance test: interelectrode for connection two silver slurry is scraped from, make two electrodes separately, be then placed in probe station by substrate, and on electrode, drip 1mL electrolyte, the dilute sulfuric acid of 1mol/L, caller is tested.
Each 2 μ L on gold electrode, drip 5 porous graphenes, its nanometer layer thickness is 10nm, the polyaniline nano layer of electro-deposition is about 20nm, and the gross thickness of obtained electrode material is 50nm, the interdigital width 150nm of interdigital electrode, interdigital spacing 50nm, use the sulfuric acid of 1mol/L to carry out electro-chemical test as electrolyte, test voltage interval (-0.3-0.8V), volume and capacity ratio is 320F/cm
3.
Embodiment 3:
Porous graphene supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, and it comprises the steps:
1) select PETG, PETG (PET) is cut into suitable size, then uses isopropyl alcohol (IPA) ultrasonic cleaning PET to be about 3min, dry up with nitrogen;
2) use spin coating instrument spin coating one deck 9000A on PET substrate, the rotating speed of spin coating is 4000r/min, and spin-coating time is 40s, uses electric hot plate to toast after even glue, 100 DEG C, 15min;
3) mask aligner is used on the PET substrate that spin coating is good, to etch interdigital electrode pattern, time for exposure 28s;
4) develop: the PET substrate crossed by photoengraving is first placed in RD6 developer solution and soaks 90s, then put into deionized water and soak 30s, then put into second part of deionized water and soak 30s, nitrogen dries up;
5) metal fever evaporation (PVD): use thermal evaporation plated film instrument evaporation metal, the ground floor of the electrode material of obtained interdigital electrode, interdigital width 150nm, interdigital spacing 50nm, Ti/Au (3nm/17nm);
6) coating of porous graphene: be coated with by porous graphene and drip on the ground floor of the electrode material of interdigital electrode, first time drips 5 μ L, dries up, drip 2 μ L afterwards at every turn, dry up, repeat this step 10 time with nitrogen with nitrogen;
7) photoresist lift off: the substrate of the electrode material being coated with porous graphene is placed on SU8 and removes photoresist in liquid and leave standstill 3h, 9000A is all peeled off, and then with the liquid ultrasonic cleaning 5 minutes of removing photoresist of SU8, the photoresist between the electrode material of interdigital electrode and porous graphene are all removed totally;
8) deposition of polyaniline: two contact conductors of substrate are coupled together with silver slurry, and use electrochemical workstation to carry out cyclic voltammetry scan, scanning voltage is (-0.2-1.6V), sweeping speed is 0.03V/s, electrolyte is the aniline solution of preparation, 1mL aniline is dissolved in the dilution heat of sulfuric acid of 200mL 0.01mol/L, circulates 10 times by three electrode cycle voltammetries;
9) performance test: interelectrode for connection two silver slurry is scraped from, make two electrodes separately, be then placed in probe station by substrate, and on electrode, drip 1mL electrolyte, the dilute sulfuric acid of 1mol/L, caller is tested.
Each 2 μ L on gold electrode, drip 10 porous graphenes, its nanometer layer thickness is 20nm, the polyaniline nano layer of electro-deposition is about 20nm, and the gross thickness of obtained electrode material is 60nm, the interdigital width 150nm of interdigital electrode, interdigital spacing 50nm, use the sulfuric acid of 1mol/L to carry out electro-chemical test as electrolyte, test voltage interval (-0.3-0.8V), volume and capacity ratio is 340F/cm
3.
Embodiment 4:
Porous graphene supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, and it comprises the steps:
1) select silicon chip, silicon chip is cut into suitable size, then uses isopropyl alcohol (IPA) ultrasonic cleaning silicon chip to be about 3min, dry up with nitrogen;
2) use spin coating instrument spin coating one deck 9000A on substrate, the rotating speed of spin coating is 4000r/min, and spin-coating time is 40s, uses electric hot plate to toast after even glue, 100 DEG C, 15min;
3) mask aligner is used on the silicon chip that spin coating is good, to etch interdigital electrode pattern, time for exposure 28s;
4) develop: the substrate crossed by photoengraving is first placed in RD6 developer solution and soaks 90s, then put into deionized water and soak 30s, then put into second part of deionized water and soak 30s, nitrogen dries up;
5) metal fever evaporation (PVD): use thermal evaporation plated film instrument evaporation metal, the ground floor of the electrode material of obtained interdigital electrode, interdigital width 150nm, interdigital spacing 50nm, Ti/Au (3nm/17nm);
6) coating of porous graphene: be coated with by porous graphene and drip on the ground floor of the electrode material of interdigital electrode, first time drips 5 μ L, dries up, drip 2 μ L afterwards at every turn, dry up, repeat this step 10 time with nitrogen with nitrogen;
7) photoresist lift off: the substrate of the electrode material being coated with porous graphene is placed on SU8 and removes photoresist in liquid and leave standstill 3h, 9000A is all peeled off, and then with the liquid ultrasonic cleaning 5 minutes of removing photoresist of SU8, the photoresist between the electrode material of interdigital electrode and porous graphene are all removed totally;
8) deposition of polyaniline: two contact conductors of substrate are coupled together with silver slurry, and use electrochemical workstation to carry out cyclic voltammetry scan, scanning voltage is (-0.2-1.6V), sweeping speed is 0.03V/s, electrolyte is the aniline solution of preparation, 1mL aniline is dissolved in the dilution heat of sulfuric acid of 200mL 0.01mol/L, circulates 5 times by three electrode cycle voltammetries;
9) performance test: interelectrode for connection two silver slurry is scraped from, make two electrodes separately, be then placed in probe station by substrate, and on electrode, drip 1mL electrolyte, the dilute sulfuric acid of 1mol/L, caller is tested.
Each 2 μ L on gold electrode, drip 10 porous graphenes, its nanometer layer thickness is 20nm, the polyaniline nano layer of electro-deposition is about 10nm, and the gross thickness of obtained electrode material is 50nm, the interdigital width 150nm of interdigital electrode, interdigital spacing 50nm, use the sulfuric acid of 1mol/L to carry out electro-chemical test as electrolyte, test voltage interval (-0.3-0.8V), volume and capacity ratio is 320F/cm
3.
Embodiment 5:
Porous graphene supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, and it comprises the steps:
1) select silicon chip, silicon chip is cut into suitable size, then uses isopropyl alcohol (IPA) ultrasonic cleaning silicon chip to be about 3min, dry up with nitrogen;
2) use spin coating instrument spin coating one deck 9000A on substrate, the rotating speed of spin coating is 4000r/min, and spin-coating time is 40s, uses electric hot plate baking, 100 DEG C, 15min;
3) mask aligner is used on the silicon chip that spin coating is good, to etch interdigital electrode pattern, time for exposure 28s;
4) develop: the substrate crossed by photoengraving is first placed in RD6 developer solution and soaks 90s, then put into deionized water and soak 30s, then put into second part of deionized water and soak 30s, nitrogen dries up;
5) metal fever evaporation (PVD): use thermal evaporation plated film instrument evaporation metal, the ground floor of the electrode material of obtained interdigital electrode, interdigital width 150nm, interdigital spacing 50nm, Ti/Au (3nm/17nm);
6) coating of porous graphene: be coated with by porous graphene and drip on the ground floor of the electrode material of interdigital electrode, first time drips 5 μ L, dries up, drip 2 μ L afterwards at every turn, dry up, repeat this step 10 time with nitrogen with nitrogen;
7) photoresist lift off: the substrate of the electrode material being coated with porous graphene is placed on SU8 and removes photoresist in liquid and leave standstill 3h, 9000A is all peeled off, and then with the liquid ultrasonic cleaning 5 minutes of removing photoresist of SU8, the photoresist between the electrode material of interdigital electrode and porous graphene are all removed totally;
8) deposition of polyaniline: two contact conductors of substrate are coupled together with silver slurry, and use electrochemical workstation to carry out cyclic voltammetry scan, scanning voltage is (-0.2-1.6V), sweeping speed is 0.03V/s, electrolyte is the aniline solution of preparation, 1mL aniline is dissolved in the dilution heat of sulfuric acid of 200mL 0.01mol/L, circulates 10 times by three electrode cycle voltammetries;
9) performance test: interelectrode for connection two silver slurry is scraped from, make two electrodes separately, be then placed in probe station by substrate, and on electrode, drip 1mL electrolyte, the LiCl of 1mol/L, caller is tested.
Each 2 μ L on gold electrode, drip 10 porous graphenes, its nanometer layer thickness is 20nm, the polyaniline nano layer of electro-deposition is about 20nm, and the gross thickness of obtained electrode material is 60nm, the interdigital width 150nm of interdigital electrode, interdigital spacing 50nm, use the LiCl of 1mol/L to carry out electro-chemical test as electrolyte, test voltage interval (-0.3-0.8V), volume and capacity ratio is 340F/cm
3
Embodiment 6:
Porous graphene supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, and it comprises the steps:
1) select silicon chip, silicon chip is cut into suitable size, then uses isopropyl alcohol (IPA) ultrasonic cleaning silicon chip to be about 3min, dry up with nitrogen;
2) use spin coating instrument spin coating one deck 9000A on substrate, the rotating speed of spin coating is 4000r/min, and spin-coating time is 40s, uses electric hot plate baking, 100 DEG C, 15min;
3) mask aligner is used on the silicon chip that spin coating is good, to etch interdigital electrode pattern, time for exposure 28s;
4) develop: the substrate crossed by photoengraving is first placed in RD6 developer solution and soaks 90s, then put into deionized water and soak 30s, then put into second part of deionized water and soak 30s, nitrogen dries up;
5) metal fever evaporation (PVD): use thermal evaporation plated film instrument evaporation metal, the ground floor of the electrode material of obtained interdigital electrode, interdigital width 100nm, the distance 100nm between interdigital, Ti/Au (3nm/17nm);
6) coating of porous graphene: be coated with by porous graphene and drip on the ground floor of the electrode material of interdigital electrode, first time drips 5 μ L, dries up, drip 2 μ L afterwards at every turn, dry up, repeat this step 10 time with nitrogen with nitrogen;
7) photoresist lift off: the substrate of the electrode material being coated with porous graphene is placed on SU8 and removes photoresist in liquid and leave standstill 3h, 9000A is all peeled off, and then with the liquid ultrasonic cleaning 5 minutes of removing photoresist of SU8, the photoresist between the electrode material of interdigital electrode and porous graphene are all removed totally;
8) deposition of polyaniline: two contact conductors of substrate are coupled together with silver slurry, and use electrochemical workstation to carry out cyclic voltammetry scan, scanning voltage is (-0.2-1.6V), sweeping speed is 0.03V/s, electrolyte is the aniline solution of preparation, 1mL aniline is dissolved in the dilution heat of sulfuric acid of 200mL 0.01mol/L, circulates 10 times by three electrode cycle voltammetries;
9) performance test: interelectrode for connection two silver slurry is scraped from, make two electrodes separately, be then placed in probe station by substrate, and on electrode, drip 1mL electrolyte, the dilute sulfuric acid of 1mol/L, caller is tested.
Each 2 μ L on gold electrode, drip 10 porous graphenes, its nanometer layer thickness is 20nm, electro-deposition polyaniline 10 circle is about 20nm again, and the gross thickness of obtained electrode material is 60nm, the interdigital width 100nm of interdigital electrode, interdigital spacing 100nm, use the sulfuric acid of 1mol/L to carry out electro-chemical test as electrolyte, test voltage interval (-0.3-0.8V), volume and capacity ratio is 280F/cm
3.
Claims (5)
1. a porous graphene supports polyaniline heterostructure base micro super capacitor nano-device, it for doing symmetrical interdigitated electrode structure on base material, interdigital width is 100-200nm, and each interdigital between distance be 50-100nm, then drip electrolyte; In described interdigitated electrode structure, gold is electrode material ground floor as collector, porous graphene appendix on gold as the electrode material second layer, polyaniline-coated on porous graphene as electrode material top layer, the thickness of gold is 10-20nm, the thickness of porous graphene is 20-40nm, and the thickness of polyaniline is 20-40nm.
2. porous graphene according to claim 1 supports polyaniline heterostructure base micro super capacitor nano-device, it is characterized in that: described base material is PETG, silicon chip, glass substrate or PEN.
3. porous graphene according to claim 1 supports polyaniline heterostructure base micro super capacitor nano-device, it is characterized in that: described electrolyte is H
2sO
4, H
3pO
4or LiCl.
4. porous graphene according to claim 1 supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, comprises the steps:
1) clean substrate;
2) in step 1) basis on, on base material, be coated with photoresist by sol evenning machine;
3) in step 2) basis on, on the even base material crossing glue, prepare the electrode trenches of interdigital electrode by optical etching technology;
4) in step 3) basis on, prepare all ground floors making the electrode material of collector with gold by physical vapour deposition (PVD);
5) in step 4) basis on, porous graphene is dripped and to be coated with and on the ground floor covering all electrode materials;
6) in step 5) basis on, the substrate being coated with the electrode material of porous graphene is soaked in the liquid that removes photoresist, remove photoresist;
7) in step 6) basis on, utilize the substrate of electrochemical test system to the electrode material being coated with porous graphene to adopt cyclic voltammetry electro-deposition polyaniline;
8) in step 7) basis on, the interdigital electrode of the nano-device of gained drips electrolyte and utilizes probe station to carry out performance test.
5. porous graphene according to claim 4 supports the preparation method of polyaniline heterostructure base micro super capacitor nano-device, it is characterized in that the thickness of described gold is 10-20nm, the thickness of porous graphene is 20-40nm, and the thickness of polyaniline is 20-40nm.
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