CN104603937A - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN104603937A CN104603937A CN201380045383.8A CN201380045383A CN104603937A CN 104603937 A CN104603937 A CN 104603937A CN 201380045383 A CN201380045383 A CN 201380045383A CN 104603937 A CN104603937 A CN 104603937A
- Authority
- CN
- China
- Prior art keywords
- lead frame
- mentioned
- soft solder
- pedestal portion
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229910000679 solder Inorganic materials 0.000 claims abstract description 127
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims abstract description 60
- 239000011347 resin Substances 0.000 claims abstract description 32
- 229920005989 resin Polymers 0.000 claims abstract description 32
- 238000007788 roughening Methods 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 5
- 230000003746 surface roughness Effects 0.000 claims description 4
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 238000009736 wetting Methods 0.000 abstract description 14
- 238000006073 displacement reaction Methods 0.000 abstract description 3
- 230000006378 damage Effects 0.000 abstract description 2
- 238000000465 moulding Methods 0.000 abstract 1
- 230000000717 retained effect Effects 0.000 abstract 1
- 238000004904 shortening Methods 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 description 12
- 238000005476 soldering Methods 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 238000001816 cooling Methods 0.000 description 5
- 230000007613 environmental effect Effects 0.000 description 5
- 125000006850 spacer group Chemical group 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 208000003351 Melanosis Diseases 0.000 description 1
- 229910020836 Sn-Ag Inorganic materials 0.000 description 1
- 229910020888 Sn-Cu Inorganic materials 0.000 description 1
- 229910020988 Sn—Ag Inorganic materials 0.000 description 1
- 229910019204 Sn—Cu Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000003292 diminished effect Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- 239000002803 fossil fuel Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000009849 vacuum degassing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49537—Plurality of lead frames mounted in one device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49524—Additional leads the additional leads being a tape carrier or flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
- H01L2224/27312—Continuous flow, e.g. using a microsyringe, a pump, a nozzle or extrusion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2733—Manufacturing methods by local deposition of the material of the layer connector in solid form
- H01L2224/27334—Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2743—Manufacturing methods by blanket deposition of the material of the layer connector in solid form
- H01L2224/27436—Lamination of a preform, e.g. foil, sheet or layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29005—Structure
- H01L2224/29006—Layer connector larger than the underlying bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29005—Structure
- H01L2224/29007—Layer connector smaller than the underlying bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2902—Disposition
- H01L2224/29023—Disposition the whole layer connector protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32113—Disposition the whole layer connector protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/3701—Shape
- H01L2224/37012—Cross-sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40105—Connecting bonding areas at different heights
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
- H01L2224/83054—Composition of the atmosphere
- H01L2224/83065—Composition of the atmosphere being reducing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
- H01L2224/8309—Vacuum
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
- H01L2224/83095—Temperature settings
- H01L2224/83096—Transient conditions
- H01L2224/83097—Heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Die Bonding (AREA)
Abstract
本发明关于软钎料连接芯片的两面的功率模块,防止成为软钎料的未连接、芯片位置偏移的原因的向台座部侧面的软钎料的润湿扩散,并且防止成为芯片破损、软钎料的寿命降低的原因的模制树脂剥离。构造为在一方的引线框一体形成台座部,对于该台座部的侧面以及该引线框主体通过粗化表面来降低软钎料的润湿性,另一方面,台座部的软钎料连接面未粗化而确保软钎料的润湿性。由此,减少软钎料连接时的不良情况,并且得到高可靠性的功率模块(参照图5)。
Description
技术领域
本发明涉及半导体装置及其制造方法,涉及例如通过软钎料相对于引线端子连接半导体部件而构成的半导体功率模块。
背景技术
以往,在进行电力的变换、控制的功率模块中,将芯片的一面软钎料连接在基板上,通过引线接合(Wire Bonding)连接另一面,从而实现了电连接以及向基板的散热。
然而,根据功率模块的小型化、高散热化的要求,采用对芯片的表里两面进行软钎料连接,从芯片的两面进行冷却的方法。图1表示了采用了通过引线框3以及翅片5从其两面冷却这样的芯片1的构造的模块的例子。
另外,专利文献1至3中也采用该散热方法。此外,在该两面冷却功率模块中,在软钎料连接后通过模制树脂来进行密封,在其外侧设置冷却部,从而形成模块。
现有技术文献
专利文献
专利文献1:日本特开2001-352023号公报
专利文献2:日本特开2005-244166号公报
专利文献3:日本特开2002-110893号公报
发明内容
发明所要解决的课题
制造前述的功率模块的情况下,根据高散热性的要求,对于芯片而言,在由Cu等的导热率高的材料形成的引线框上软钎料连接芯片。此时,在芯片两面连接平坦的引线框的情况下,有可能一面的软钎料与另一面的软钎料接触而产生短路。图2表示了因软钎料产生了短路的情况的例子。
作为避免这种情况的方法,专利文献3提供了在引线框3的软钎料连接部独立设置台座部或隔离物,将其与芯片电极软钎料连接的构造(参照图3)。由此,防止芯片1的两面的软钎料2接近,能够防止短路。
然而,在该台座部3a独立设置于引线框3的情况下(引线框3和台座部3a通过软钎料2粘结),台座部3a自身的软钎料润湿性重要。在该台座部3a的软钎料连接面和台座部侧面以及其周围部的润湿性相等的情况下,在软钎料连接中在台座部3a的侧面会产生软钎料2的润湿扩散。图4表示了软钎料2润湿扩散的情况下的样子。产生该润湿扩散的情况下,引线框3(台座部3a)/芯片1之间的连接部的软钎料2不足,所以产生未连接的部分。另外,润湿扩散的软钎料2通过其表面张力来拉拽芯片1,使产生芯片1的位置偏移。由于这些不良情况,破坏之后的组装性、可靠性、性能,因此需要防止这些不良情况的产生。
另一方面,前述的功率模块采用了对引线框3软钎料连接芯片1后通过模制树脂进行密封的构造。该模制树脂需要可靠地紧贴引线框3、芯片1,能够通过紧贴来确保芯片1的可靠性,并且延长软钎料连接部的寿命。
因此,对模制树脂要求高的紧贴性。如果紧贴性低,引线框和模制树脂剥离,则有可能进一步剥离而导致芯片破损。另外,也有可能软钎料连接部的裂纹发展速度上升,疲劳寿命降低。
在专利文献1以及2中并没有公开解决这些课题的发明。另外,专利文献3中,将成为隔离物的块(台座部3a)在引线框3和芯片1之间经由软钎料2来提供(参照图3)。另外,在该块(台座部3a)的侧面形成氧化面,防止软钎料2的润湿扩散并且提高与模制树脂的紧贴性。并且,在隔离物(台座部3a)周边部的引线框3镀Ni,提高与模制树脂的紧贴性。但是,在专利文献3的情况下,隔离物(台座部3a)通过软钎料2连接于引线框3,因此存在软钎料连接部位增加,工序难度变高的缺点。另外,在隔离物(台座部3a)的侧面以及周边部,实施氧化面和镀Ni这样不同的2个处理,因此预料引线框3的制作工序变得复杂,成本高。
本发明是鉴于这样的情况而完成的,其目的在于防止成为软钎料的未连接、芯片的位置偏移的原因的向台座部侧面的软钎料润湿扩散,并且防止成为芯片破损、软钎料的寿命降低的原因的模制树脂的剥离,而提供高可靠性的半导体装置。
用于解决课题的方法
为了解决上述课题,本发明的半导体装置具有半导体元件;第1引线框,其通过软钎料连接于半导体元件的一主面;第2引线框,其通过软钎料连接于半导体元件的背面。这里,在第1引线框和第2引线框之间填充有模制树脂。而且,第2引线框具有与该第2引线框一体形成的台座部,该台座部具有成为与半导体装置连接的连接部分的连接面。并且,第2引线框的与模制树脂连接的部分的表面粗糙度比台座部中的用于连接半导体元件的软钎料接触面(连接面)的表面粗糙度大。
此外,第2引线框的与模制树脂连接的部分通过实施粗化处理而表面***。另外,第2引线框的与模制树脂连接的部分的粗糙度和台座部的软钎料接触面以外的部分的粗糙度也可以为相同程度。
发明的效果
根据本发明,防止了成为软钎料的未连接、芯片位置偏移的原因的向台座部侧面的软钎料的润湿扩散,并且防止成为芯片破损、软钎料的寿命降低的原因的模制树脂剥离,能够提供高可靠性的半导体装置。
关于本发明的进一步的特征,通过本说明书的记载、附图变得清楚。另外,本发明的方式通过要素以及多种要素的组合以及以下详细的记载和附上的权利要求书的方式来完成实现。
附图说明
图1是表示采用从芯片的两面进行冷却的方法的模块的例子的图。
图2是使用平坦的引线框而产生了因软钎料引起的短路的情况的例子的示意图。
图3是表示在一方的引线框粘接设置台座的情况的软钎料连接部构造的例子的示意图。
图4是软钎料连接中软钎料向台座部侧面润湿扩散的情况的示意图。
图5是表示本发明的实施方式的半导体装置的基本构造的示意图。
图6是用于说明软钎料连接工序的图。
图7是表示实施例1中,汇总产生不良情况的样本数的结果的图。
图8是表示实施例2中,汇总产生不良情况的样本数的结果的图。
具体实施方式
以下,参照附图对本发明的实施方式进行说明。附图中,也有功能上相同的要素用相同的编号表示的情况。此外,附图表示遵循了本发明原理的具体的实施方式和安装例,然而这些用于理解本发明的例子,绝对不用于限定地解释本发明。
在本实施方式中,充分详细进行了说明以便本领域技术人员实施本发明,然而需要理解的是,也可以有其他的安装及方式,在不脱离本发明的技术思想和精神的范围内可以进行构成及构造的变更、多种要素的置换。因此,不能将以下的记载限定解释于此。
<半导体装置的构造>
图5是表示本发明的实施方式的半导体装置的构造的图。
本实施方式的半导体装置中,采用利用软钎料2来连接引线框3-1及3-2和芯片1的构成。另外,该半导体装置中,在形成于作为半导体元件的芯片1、引线框3-1以及3-2之间的空间填充模制树脂。
如图5所示,引线框3-2具有与其一体化形成的台座部(凸部)3a。这样,与专利文献3公开的引线框和台座部(参照图3)不同,本发明的实施方式中,台座部3a与引线框3-2一体形成,因此能够使半导体装置的制造工序更加简单。
另外,该半导体装置中,引线框3-2的软钎料接合面以外的表面6进行了粗化处理,使得在该部分软钎料2不易润湿。另外,也可以对引线框3-1中的软钎料2的接合部分以外的区域进行粗化处理。通过这样的粗化处理,设置软钎料2的润湿性低的区域,能够控制软钎料2和接合对象部件的紧贴度。
此外,对台座部3a的与软钎料2的接合部分未实施粗化处理,或者通过粗化处理使得与台座部3a以外的部分相比粗化度变小。由此,台座部中连接于用于与半导体元件连接的软钎料的部分未进行粗化或者粗化度较小,所以软钎料的润湿性变高。而且,能够防止成为软钎料的未连接、芯片位置偏移的原因的向台座部侧面的软钎料的润湿扩散,并且能够防止成为芯片破损原因的模制树脂的剥离。
此外,在引线框3-2的表面,以相同程度的粗化度进行未设置有台座3a的区域的表面和台座部3a的侧面的粗化处理,从而具有能够平衡度良好的实现填充模制树脂的情况下的紧贴度的效果。但是,也可以仅对台座3a的侧面实施粗化处理,在其以外的引线框3-2的表面不实施。
<粗化处理>
这里,对在引线框上实施的粗化处理进行说明。根据软钎料的润湿性的控制以及模制树脂的紧贴性的要求,优选粗化处理的凹凸为数μm程度。
粗化处理优选如蚀刻那样的化学性地在表面形成凹凸的处理,然而也可以是如喷砂等物理性地在表面形成凹凸的处理。另外,在利用化学性地形成凹凸的粗化中,除了单纯的利用酸进行的蚀刻以外,也可以利用黑化还原处理、使用了点蚀掩膜的蚀刻。
粗化处理在存在台座部3a的引线框3-2中,在台座部3a侧面和引线框3-2主体实施。此外,为了更高的可靠性,也可以对不具有台座部3a的一方的引线框3-1实施粗化处理。
如上述那样,对于引线框3-2,以对与模制树脂4接触的部分实施粗化,并且对与软钎料2连接的连接面不进行粗化的方式局部地形成粗化。该粗化处理的工序除了遮蔽与软钎料2连接的连接面之外,还优选在对引线框3-2整体进行粗化后,利用研磨等机械加工对与软钎料2连接的连接面进行去除的方法。另外,也可以对整体进行了粗化后的引线框的软钎料连接面,在芯片连接前预先在引线框侧连接软钎料。
<软钎料>
关于软钎料2,考虑到芯片1、引线框3-1以及3-2的式样,需要慎重选择软钎料材料、连接方法、连接条件。
(i)软钎料材料
关于软钎料材料,优选一般的Sn系软钎料。在提高润湿性的情况下,也可以使用Sn-Ag系的软钎料。在芯片的Ni喷镀消失成问题的情况下,也可以使用Sn-Cu系的软钎料。
(ii)软钎料连接方法
软钎料连接方法在现有技术的芯片接合工序中,优选软钎料片、软钎料线供给、熔融软钎料的直接供给等。也可以附加如下方法,在芯片1或者引线框3-1以及3-2上载置配重,在供给芯片1、引线框3-1以及3-2时对其进行刷洁(scrub)等方法。
更具体而言,使用图6对软钎料连接工序(回流焊连接工序)进行说明。这里,回流焊利用真空回流焊装置。
首先,利用引线框用固定夹具固定引线框3-1,在引线框3-1上重叠芯片1和软钎料2。然后,利用芯片软钎料供给用夹具固定该芯片1和软钎料2(参照图6A)。
通过与图6A不同的工序,对引线框3-2的表面(台座部3a的软钎料粘接面除外)6实施粗化处理(未图示)。
接下来,对芯片1和软钎料2进行定位后,以不移动该芯片1和软钎料2的方式去除芯片软钎料供给用夹具,在其上供给粗化处理后的引线框3-2,进行回流焊连接(参照图6B)。
回流焊工序中为氢还原环境气体,在加热前后进行环境气体置换。在置换为H2还原环境气体后开始升温,利用250℃峰值的温度分布来进行连接。另外,达到峰值温度后进行真空脱气,去除软钎料中的空隙。通过回流焊,软钎料2熔化而表面张力发挥作用,图6C中,软钎料2的部分形状变化。冷却后置换环境气体来结束回流焊连接工序(参照图6C)。
最后,用模制树脂填充引线框3-1以及引线框3-2之间的空间(未图示)。
(iii)连接条件
关于连接条件,在所采用的软钎料的熔点之上至350℃左右为止的区间中选定即可。在提高润湿性的情况下优选高温侧的温度,在芯片1表面的Ni喷镀消失成问题的情况下优选低温侧的温度。连接时的环境气体与大气相比优选N2环境气体。并且,为了提高润湿性,应为H2或甲酸等还原环境气体。
<实施方式的效果>
根据上述本发明的半导体装置的构造,在引线框3-2(第2引线框)一体形成设置有台座部(意味着并不是将分离的台座部用软钎料等连接的构造),并且其侧面以及引线框主体的与模制树脂接触的部分的表面被粗化。因此,能够防止成为软钎料的未连接、芯片位置偏移的原因的软钎料的润湿扩散。并且,提高了之后用于密封的模制树脂与引线框的紧贴性,能够防止成为芯片破损、软钎料连接部寿命降低的原因的模制树脂的剥离。由此,软钎料连接时的不良情况减少,并且能够得到高可靠性的功率模块。
实施例
[实施例1]
本发明的实施例1如下。这里,作为样本使用一体形成台座部的Cu引线框。引线框使用具有无粗化的Cu无垢表面的引线框以及在台座部侧面和引线框主体局部实施粗化的引线框两种。
引线框的局部粗化是一次性地对引线框整体进行粗化后,通过研磨去除台座部的软钎料连接面的粗化来形成。另外,软钎料使用片状的Sn3Ag0.5Cu软钎料。回流焊使用真空回流焊装置,使用250℃峰值的温度分布来进行连接。
分别对20个样本进行软钎料连接,确认了是否产生了软钎料的润湿扩散、软钎料未连接、芯片位置偏移。
图7表示汇总这些的结果。从图7可知,在使用未实施粗化处理的引线框的情况下产生了前述的不良情况,然而使用实施了粗化处理的引线框的情况下没有产生不良情况。
另外,之后对连接了该芯片的引线框进行了树脂模制。之后,进行了温度周期试验。在无粗化的引线框中,在所有样本中产生了树脂的剥离,在20个中的5个样本中产生了芯片的破裂。
另一方面,在存在局部粗化的引线框中,在所有样本中没有产生芯片的破裂。而且,关于软钎料的疲劳寿命,也是与未粗化的引线框相比存在局部粗化的引线框中产生裂纹的部分较小,寿命长。
[实施例2]
本发明的实施例2如下。与实施例1相同,作为样本使用了一体形成台座部的Cu引线框。与实施例1相同,使用了在台座部侧面以及引线框主体实施了粗化的引线框和分别未粗化而具有Cu无垢表面的引线框这两种。引线框是掩蔽软钎料连接面后将引线框浸渍于酸来形成局部粗化,之后剥离掩膜而用于软钎料连接。软钎料使用了片状的Sn3Ag0.5Cu软钎料。回流焊使用真空回流焊装置,使用250℃峰值的温度分布来进行连接。
分别对20个样本进行软钎料连接,确认是否产生软钎料的润湿扩散、软钎料未连接、芯片位置偏移。
图8表示汇总这些的结果。在使用未实施粗化处理的引线框的情况下产生前述的不良情况,然而使用实施了粗化处理的引线框的情况下没有产生不良情况。
另外,之后对连接了该芯片的引线框进行了树脂模制。之后,进行了温度周期试验。在无粗化的引线框中,在所有样本中产生了树脂的剥离,在20个中的7个样本中产生了芯片的破裂。另一方面,在存在局部粗化的引线框中,在所有样本中都没有产生芯片的破裂。而且,关于软钎料的疲劳寿命,也是与未粗化的引线框相比存在局部粗化的引线框中产生裂纹的部分小,寿命长。
工业上的可利用性
今后的高度信息化社会中电能的需要高。而且,也存在因环境问题中节能、减少CO2排出为目的的减少化石燃料引起的全部电化等要求。根据这样的情况,考虑高效使用电力的功率电子学的作用越来越重要。
为了高效使用电力,在功率电子学领域中,模块的小型化、高散热化的要求变高,这些研究是必须的。
本发明对于对芯片的两面进行软钎料连接的所有模块都有效。
附图标记的说明
1—芯片,2—软钎料,3—引线框,3a—引线台座部(台座部),4—模制树脂,5—CAN状冷却翅片,6—粗化处理部分。
Claims (6)
1.一种半导体装置,其特征在于,具有:
半导体元件;
第1引线框,其通过软钎料连接于上述半导体元件的一主面;
第2引线框,其通过软钎料连接于上述半导体元件的背面,
在上述第1引线框和第2引线框之间填充有模制树脂,
上述第2引线框具有台座部,该台座部与该第2引线框一体形成且成为与上述半导体元件连接的连接部分,
上述台座部的连接上述半导体元件的软钎料接触面以外的部分的表面粗糙度比上述台座部的连接上述半导体元件的软钎料接触面的表面粗糙度大。
2.根据权利要求1所述的半导体装置,其特征在于,
上述台座部的连接上述半导体元件的软钎料接触面和该软钎料接触面以外的部分的表面为相同材质。
3.根据权利要求1所述的半导体装置,其特征在于,
对上述第2引线框的上述台座部的连接上述半导体元件的软钎料接触面以外的部分实施了粗化处理。
4.根据权利要求1所述的半导体装置,其特征在于,
上述第2引线框的与上述模制树脂连接的部分的粗糙度和上述台座部的上述软钎料接触面以外的部分的粗糙度为相同程度。
5.一种半导体装置的制造方法,其特征在于,具有:
在第1引线框上,利用软钎料夹持而定位半导体元件的连接面的第1工序;
将第2引线框的台座部定位于与在上述第1工序中夹持上述半导体元件的软钎料中的连接于上述第1引线框的软钎料不同的软钎料的接触面的第2工序;
在上述第2工序后,使定位后的上述第1以及第2引线框刷洁,连接上述第1及第2引线框和上述半导体元件的第3工序;以及
在上述第1引线框和上述第2引线框之间空间填充模制树脂的第4工序,
其中,上述第2引线框为一体形成了上述台座部的引线框,且上述台座部的表面中的与软钎料连接的连接面以外的部分比上述台座部的与软钎料接触的接触面粗糙。
6.根据权利要求5所述的半导体装置的制造方法,其特征在于,
上述第2引线框的与上述模制树脂连接的部分的粗糙度和上述台座部的上述软钎料接触面以外的部分的粗糙度为相同程度。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012-197347 | 2012-09-07 | ||
JP2012197347 | 2012-09-07 | ||
PCT/JP2013/073791 WO2014038587A1 (ja) | 2012-09-07 | 2013-09-04 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104603937A true CN104603937A (zh) | 2015-05-06 |
CN104603937B CN104603937B (zh) | 2018-03-20 |
Family
ID=50237196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201380045383.8A Active CN104603937B (zh) | 2012-09-07 | 2013-09-04 | 半导体装置及其制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9530722B2 (zh) |
JP (1) | JP6483440B2 (zh) |
CN (1) | CN104603937B (zh) |
DE (1) | DE112013003902B4 (zh) |
WO (1) | WO2014038587A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116613110A (zh) * | 2023-06-16 | 2023-08-18 | 广东气派科技有限公司 | 一种增强散热的盖板封装结构及其制备方法 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6578900B2 (ja) | 2014-12-10 | 2019-09-25 | 株式会社デンソー | 半導体装置及びその製造方法 |
WO2016132453A1 (ja) * | 2015-02-17 | 2016-08-25 | 株式会社日立製作所 | 半導体装置 |
JP6696480B2 (ja) | 2017-03-22 | 2020-05-20 | 株式会社デンソー | 半導体装置 |
US11145621B2 (en) * | 2018-06-06 | 2021-10-12 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device and method of manufacturing the same |
US11929307B2 (en) | 2019-02-13 | 2024-03-12 | Hitachi Astemo, Ltd. | Plurality of lead frames for cooling a power device |
JP2021009973A (ja) * | 2019-07-03 | 2021-01-28 | Shプレシジョン株式会社 | リードフレームおよびリードフレームの製造方法 |
WO2023024700A1 (zh) * | 2021-08-26 | 2023-03-02 | 上海凯虹科技电子有限公司 | 封装体、引线框架及其粗化方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10107195A (ja) * | 1996-09-30 | 1998-04-24 | Nec Corp | 半導体装置 |
JP2002329828A (ja) * | 2001-04-27 | 2002-11-15 | Denso Corp | 半導体装置 |
US6703707B1 (en) * | 1999-11-24 | 2004-03-09 | Denso Corporation | Semiconductor device having radiation structure |
JP2004303854A (ja) * | 2003-03-31 | 2004-10-28 | Denso Corp | 半導体装置 |
JP2006179655A (ja) * | 2004-12-22 | 2006-07-06 | Toyota Motor Corp | 半導体モジュール |
CN101656236A (zh) * | 2005-03-18 | 2010-02-24 | 同和电子科技有限公司 | 副安装座及其制造方法 |
CN102165586A (zh) * | 2008-09-30 | 2011-08-24 | 凸版印刷株式会社 | 引线框基板以及该引线框基板的制造方法 |
US20120119343A1 (en) * | 2009-10-16 | 2012-05-17 | Texas Instruments Incorporated | Stacked leadframe implementation for dc/dc convertor power module incorporating a stacked controller and stacked leadframe construction methodology |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11163045A (ja) * | 1997-11-26 | 1999-06-18 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2000100854A (ja) * | 1998-09-17 | 2000-04-07 | Toshiba Corp | 半導体装置 |
JP3601432B2 (ja) | 2000-10-04 | 2004-12-15 | 株式会社デンソー | 半導体装置 |
EP2234154B1 (en) | 2000-04-19 | 2016-03-30 | Denso Corporation | Coolant cooled type semiconductor device |
JP4292686B2 (ja) | 2000-06-08 | 2009-07-08 | 株式会社デンソー | 冷媒冷却型両面冷却半導体装置 |
US6750818B2 (en) | 2000-12-04 | 2004-06-15 | Tensorcomm, Inc. | Method and apparatus to compute the geolocation of a communication device using orthogonal projections |
JP4302607B2 (ja) | 2004-01-30 | 2009-07-29 | 株式会社デンソー | 半導体装置 |
TWI514522B (zh) | 2005-03-18 | 2015-12-21 | Dowa Electronics Materials Co | 副載置片及其製造方法 |
JP2008071886A (ja) | 2006-09-13 | 2008-03-27 | Matsushita Electric Ind Co Ltd | 半導体装置用リードフレームとその製造方法 |
JP2008187045A (ja) | 2007-01-30 | 2008-08-14 | Matsushita Electric Ind Co Ltd | 半導体装置用リードフレームとその製造方法、半導体装置 |
JP2011198804A (ja) * | 2010-03-17 | 2011-10-06 | Nissan Motor Co Ltd | 半導体装置 |
JP2011216564A (ja) * | 2010-03-31 | 2011-10-27 | Mitsubishi Electric Corp | パワーモジュール及びその製造方法 |
JP5427745B2 (ja) * | 2010-09-30 | 2014-02-26 | 日立オートモティブシステムズ株式会社 | パワー半導体モジュール及びその製造方法 |
US20130341780A1 (en) * | 2012-06-20 | 2013-12-26 | Infineon Technologies Ag | Chip arrangements and a method for forming a chip arrangement |
-
2013
- 2013-09-04 US US14/425,941 patent/US9530722B2/en active Active
- 2013-09-04 CN CN201380045383.8A patent/CN104603937B/zh active Active
- 2013-09-04 WO PCT/JP2013/073791 patent/WO2014038587A1/ja active Application Filing
- 2013-09-04 JP JP2014534387A patent/JP6483440B2/ja active Active
- 2013-09-04 DE DE112013003902.8T patent/DE112013003902B4/de active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10107195A (ja) * | 1996-09-30 | 1998-04-24 | Nec Corp | 半導体装置 |
US6703707B1 (en) * | 1999-11-24 | 2004-03-09 | Denso Corporation | Semiconductor device having radiation structure |
JP2002329828A (ja) * | 2001-04-27 | 2002-11-15 | Denso Corp | 半導体装置 |
JP2004303854A (ja) * | 2003-03-31 | 2004-10-28 | Denso Corp | 半導体装置 |
JP2006179655A (ja) * | 2004-12-22 | 2006-07-06 | Toyota Motor Corp | 半導体モジュール |
CN101656236A (zh) * | 2005-03-18 | 2010-02-24 | 同和电子科技有限公司 | 副安装座及其制造方法 |
CN102165586A (zh) * | 2008-09-30 | 2011-08-24 | 凸版印刷株式会社 | 引线框基板以及该引线框基板的制造方法 |
US20120119343A1 (en) * | 2009-10-16 | 2012-05-17 | Texas Instruments Incorporated | Stacked leadframe implementation for dc/dc convertor power module incorporating a stacked controller and stacked leadframe construction methodology |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116613110A (zh) * | 2023-06-16 | 2023-08-18 | 广东气派科技有限公司 | 一种增强散热的盖板封装结构及其制备方法 |
CN116613110B (zh) * | 2023-06-16 | 2024-02-23 | 广东气派科技有限公司 | 一种增强散热的盖板封装结构制备方法及盖板封装结构 |
Also Published As
Publication number | Publication date |
---|---|
DE112013003902T5 (de) | 2015-04-16 |
JP6483440B2 (ja) | 2019-03-13 |
DE112013003902T8 (de) | 2015-05-07 |
DE112013003902B4 (de) | 2022-05-12 |
CN104603937B (zh) | 2018-03-20 |
WO2014038587A1 (ja) | 2014-03-13 |
US9530722B2 (en) | 2016-12-27 |
US20150294927A1 (en) | 2015-10-15 |
JPWO2014038587A1 (ja) | 2016-08-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104603937A (zh) | 半导体装置及其制造方法 | |
US11810887B2 (en) | Double-sided cooling type power module and manufacturing method therefor | |
JP5729126B2 (ja) | 半導体装置の製造方法 | |
JP5214936B2 (ja) | 半導体装置 | |
JP2010219487A (ja) | 太陽電池及び太陽電池モジュール | |
US8283681B2 (en) | Lighting device and method of manufacturing the same | |
CN102800833B (zh) | 功率模块电极端子及其焊接方法 | |
JP2017034152A (ja) | 電力用半導体装置 | |
JP6129090B2 (ja) | パワーモジュール及びパワーモジュールの製造方法 | |
JP2008135646A (ja) | 太陽電池モジュール及び太陽電池モジュールの製造方法 | |
CN106024911A (zh) | 一种玻璃钝化二极管u型封装结构及其封装方法 | |
JP2007150040A (ja) | 半導体装置 | |
JP2009147123A (ja) | 半導体装置及びその製造方法 | |
CN102623363A (zh) | 接合线的接合方法、半导体装置、半导体装置的制造方法 | |
CN102354688A (zh) | 一种功率模块 | |
WO2018090470A1 (zh) | 智能功率模块及其制造方法 | |
CN108110459B (zh) | 一种大功率ipm模块端子连接结构 | |
JP2011193007A (ja) | 半導体チップおよびこれを用いた半導体装置 | |
JP2012182253A (ja) | 半導体装置 | |
CN202394862U (zh) | 一种功率模块 | |
CN101594067A (zh) | 混合动力汽车双面冷却平面高温逆变器 | |
CN216849919U (zh) | 一种压接式半导体功率模块 | |
WO2012055085A1 (zh) | 一种芯片与芯片、芯片与金属框架间的引线键合方法 | |
CN205622043U (zh) | 一种可替换芯片的传导冷却型半导体激光器 | |
CN115206958B (zh) | 一种基于dbc/dpc基板和引线框架的ipm封装***及方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP01 | Change in the name or title of a patent holder |
Address after: Ibaraki Patentee after: Hitachi astemo Co.,Ltd. Address before: Ibaraki Patentee before: HITACHI AUTOMOTIVE SYSTEMS, Ltd. |
|
CP01 | Change in the name or title of a patent holder |