CN104579282A - Load detection circuit for radio frequency matrix switch - Google Patents

Load detection circuit for radio frequency matrix switch Download PDF

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Publication number
CN104579282A
CN104579282A CN201410774677.0A CN201410774677A CN104579282A CN 104579282 A CN104579282 A CN 104579282A CN 201410774677 A CN201410774677 A CN 201410774677A CN 104579282 A CN104579282 A CN 104579282A
Authority
CN
China
Prior art keywords
radio frequency
matrix switch
frequency matrix
circuit
load detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410774677.0A
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Chinese (zh)
Inventor
张会林
孙利华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Fufeng Technology Co Ltd
Original Assignee
Suzhou Fufeng Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Suzhou Fufeng Technology Co Ltd filed Critical Suzhou Fufeng Technology Co Ltd
Priority to CN201410774677.0A priority Critical patent/CN104579282A/en
Publication of CN104579282A publication Critical patent/CN104579282A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a load detection circuit for a radio frequency matrix switch. The load detection circuit is characterized by consisting of a logic NOT gate circuit and a 50 ohm circuit, wherein a transistor T1, a resistor R1 and a resistor R2 form the logic NOT gate circuit; a transistor T2, a resistor R3, a resistor R4, a resistor R5 and a capacitor C form the 50 ohm circuit. The load detection circuit is required to be added between two output ends of the radio frequency matrix switch, and by controlling two levels of the output ends, the matrix switch has a relatively low return loss in any state, so that normal output of a radio frequency signal is ensured.

Description

Radio frequency matrix switch load detecting circuit
Technical field
The design relates to radio frequency matrix switch load detecting circuit, belongs to radio frequency arts.
Background technology
Along with the market demand of GSM mobile handset communication and WLAN (wireless local area network) WI AN constantly increases, the development prospect being applied to the single chip integrated GaAs switch of radio frequency receiving and transmitting front end is more and more wide.Compared with pouring diode switching circuit with P, GaAS switch has the advantages such as biasing networks, almost negligible DC power, the superfast switching speed of simplification, and compared with the CM0S switching circuit of standard, also there is lower insertion loss, on switch market, there is obvious advantage in recent years.
Along with RF receives/send out the increase of branch road, common single-pole double-throw switch (SPDT) (SPDT) has been difficult to satisfy the demands, and the research of multichannel input multiple-channel output matrix switch is risen thereupon.Radio frequency matrix switch, as the key modules of terminal receive-transmit system, plays an important role.
In order to make matrix switch all have lower return loss under any state, load detecting circuit need be added at radio frequency matrix switch two outputs.
Summary of the invention
According to above-mentioned requirements, the object of this invention is to provide radio frequency matrix switch load detecting circuit, by the height of two level in control output end, ensure the normal output of radiofrequency signal.
For achieving the above object, the design is realized by following technological means:
Radio frequency matrix switch load detecting circuit, is characterized in that: described load detecting circuit is made up of a logic inverter and 50 Ω circuit, transistor T1, resistance R 1, resistance R2 forms logic inverter circuit; Transistor T2, resistance R3, resistance R4, resistance R5, electric capacity C form 50 Ω circuit.
Further:
Described radio frequency matrix switch load detecting circuit, is characterized in that: circuit input voltage end Vo provide normal working voltage.
Described radio frequency matrix switch load detecting circuit, is characterized in that: when DC terminal DC is high level, transistor T1 conducting, and output low level is to the grid of T2, and T2 ends.
Described radio frequency matrix switch load detecting circuit, is characterized in that: when DC is low level, transistor T1 ends, and export the grid of high level to T2, T2 conducting, radiofrequency signal directly connects people 50 Ω load.
Described radio frequency matrix switch load detecting circuit, is characterized in that: during T2 cut-off, RF signal output mouth OP normally exports.
Described radio frequency matrix switch load detecting circuit, is characterized in that: during T2 conducting, does not reflect at RF signal output mouth OP.
The invention has the beneficial effects as follows: the present invention need add load detecting circuit at radio frequency matrix switch two outputs, by the height of two level in control output end, make matrix switch all have lower return loss under any state, ensure the normal output of radiofrequency signal.
Accompanying drawing explanation
Fig. 1 is circuit of the present invention composition structural representation.
Embodiment
Below in conjunction with Figure of description, design is further described.
Radio frequency matrix switch load detecting circuit, is characterized in that: described load detecting circuit is made up of a logic inverter and 50 Ω circuit, transistor T1, resistance R 1, resistance R2 forms logic inverter circuit; Transistor T2, resistance R3, resistance R4, resistance R5, electric capacity C form 50 Ω circuit.
Further:
Described radio frequency matrix switch load detecting circuit, is characterized in that: circuit input voltage end Vo provide normal working voltage.
Described radio frequency matrix switch load detecting circuit, is characterized in that: when DC terminal DC is high level, transistor T1 conducting, and output low level is to the grid of T2, and T2 ends.
Described radio frequency matrix switch load detecting circuit, is characterized in that: when DC is low level, transistor T1 ends, and export the grid of high level to T2, T2 conducting, radiofrequency signal directly connects people 50 Ω load.
Described radio frequency matrix switch load detecting circuit, is characterized in that: during T2 cut-off, RF signal output mouth OP normally exports.
Described radio frequency matrix switch load detecting circuit, is characterized in that: during T2 conducting, does not reflect at RF signal output mouth OP.
More than show and describe the general principle of the design, principal character and advantage.The technical staff of the industry should understand; the design is not restricted to the described embodiments; the principle that the design is just described described in above-described embodiment and specification; under the prerequisite not departing from the design's spirit and scope; the design also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the design.The claimed scope of the design is defined by appending claims and equivalent thereof.

Claims (6)

1. radio frequency matrix switch load detecting circuit, is characterized in that: described load detecting circuit is made up of a logic inverter and 50 Ω circuit, transistor T1, resistance R 1, resistance R2 forms logic inverter circuit; Transistor T2, resistance R3, resistance R4, resistance R5, electric capacity C form 50 Ω circuit.
2. radio frequency matrix switch load detecting circuit as claimed in claim 1, is characterized in that: circuit input voltage end Vo provide normal working voltage.
3. radio frequency matrix switch load detecting circuit as claimed in claim 1, is characterized in that: when DC terminal DC is high level, transistor T1 conducting, and output low level is to the grid of T2, and T2 ends.
4. radio frequency matrix switch load detecting circuit as claimed in claim 1, it is characterized in that: when DC is low level, transistor T1 ends, and export the grid of high level to T2, T2 conducting, radiofrequency signal directly connects people 50 Ω load.
5. radio frequency matrix switch load detecting circuit as claimed in claim 3, is characterized in that: during T2 cut-off, RF signal output mouth OP normally exports.
6. radio frequency matrix switch load detecting circuit as claimed in claim 4, is characterized in that: during T2 conducting, does not reflect at RF signal output mouth OP.
CN201410774677.0A 2014-12-16 2014-12-16 Load detection circuit for radio frequency matrix switch Pending CN104579282A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410774677.0A CN104579282A (en) 2014-12-16 2014-12-16 Load detection circuit for radio frequency matrix switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410774677.0A CN104579282A (en) 2014-12-16 2014-12-16 Load detection circuit for radio frequency matrix switch

Publications (1)

Publication Number Publication Date
CN104579282A true CN104579282A (en) 2015-04-29

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410774677.0A Pending CN104579282A (en) 2014-12-16 2014-12-16 Load detection circuit for radio frequency matrix switch

Country Status (1)

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CN (1) CN104579282A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104767520A (en) * 2015-03-26 2015-07-08 苏州锟恩电子科技有限公司 Radio frequency matrix switch load detection circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201057642Y (en) * 2007-05-31 2008-05-07 武汉虹信通信技术有限责任公司 Circuit for implementing TD_SCDMA high-power high-isolation RF switch
CN203645321U (en) * 2013-11-15 2014-06-11 希姆通信息技术(上海)有限公司 A foolproof protection circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201057642Y (en) * 2007-05-31 2008-05-07 武汉虹信通信技术有限责任公司 Circuit for implementing TD_SCDMA high-power high-isolation RF switch
CN203645321U (en) * 2013-11-15 2014-06-11 希姆通信息技术(上海)有限公司 A foolproof protection circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
汪洋等: "0.5μm GaAs pHEMT射频矩阵开关", 《微电子学》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104767520A (en) * 2015-03-26 2015-07-08 苏州锟恩电子科技有限公司 Radio frequency matrix switch load detection circuit

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Application publication date: 20150429

RJ01 Rejection of invention patent application after publication