CN104578341B - Vehicle-mounted charging machine capable of adjusting dead time based on phase-shift full-bridge circuit - Google Patents
Vehicle-mounted charging machine capable of adjusting dead time based on phase-shift full-bridge circuit Download PDFInfo
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Abstract
The invention discloses a vehicle-mounted charging machine capable of adjusting the dead time based on a phase-shift full-bridge circuit. The vehicle-mounted charging machine comprises a three-phase rectification circuit, an input filtering circuit, a phase-shift full-bridge circuit and an STM32 single chip microcomputer which are connected in sequence; an output voltage and current detection circuit, a dynamic dead zone adjustment circuit and four gate driving push-pull amplification circuits with the same structures are additionally arranged; the STM32 single chip microcomputer generates four PWM (pulse width modulation) driving signals through a timer according to a sampling value of the output voltage and current detection circuit, and the four PWM driving signals are connected to four input ends of the dynamic dead zone adjustment circuit; the dynamic dead zone adjustment circuit outputs four PWM signals with dead time, and the four PWM signals with the dead time are respectively connected to the input ends of the four gate driving push-pull amplification circuits; the output ends of the four gate driving push-pull amplification circuits respectively control the gates of four switch tubes Q1, Q2, Q3 and Q4 in a phase-shift full-bridge circuit; therefore, dynamic adjustment on the dead time of the phase-shift full-bridge circuit and higher power output are realized, and the working efficiency of the charging machine is greatly improved.
Description
Technical field
The present invention relates to the Vehicular charger based on phase-shifting full-bridge structure, more particularly, to a kind of dead based on phase whole-bridging circuit
Area's time adjustable Vehicular charger, because Dead Time can dynamically continuously adjust, it is possible to increase full-load range internal efficiency.
Background technology
With the increasingly depleted of traditional energy, applying of new forms of energy particularly electric energy is becoming main flow in automotive field
Development trend.But the popularization of electric automobile also has a lot of problem demanding prompt solutions, especially as its charger at present
Vehicular charger to also have many places to have to be optimized.It is typically now based on phase-shifting full-bridge knot for powerful charger
Structure.By the grid that four roads pwm signal complementary two-by-two drives full-bridge circuit is produced using singlechip chip.But traditional base
Charger lagging leg in phase-shifting full-bridge structure is relatively difficult to realize zvs (ZVT), switching tube in the case of underloading
Heating be difficult to Sofe Switch than more serious.Additionally due to the presence of filter inductance leads to the electric current on filter inductance can not dash forward
Become, in primary current covert period, two diodes of secondary are in freewheeling state, and secondary transformer voltage is zero, leads to pair
The duty-cycle loss on side.
And the efficiency of charger to be improved, it is necessary for making the switching tube of two brachium pontis all be operated under Sofe Switch state, that is,
Requirement to Dead Time is very strict, Dead Time excessive or too small all switching tube can not be made to be operated in zvs (no-voltage is opened
Close) state, the method that traditional employing single-chip microcomputer sets pwm drive signal Dead Time, Dead Time is fixing i.e. soft
Pass through in part to operate the depositor of single-chip microcomputer intervalometer to set, the change Dead Time for charger load can not be made soon
Speed is dynamic to be adjusted, and has the danger making upper and lower bridge arm lead directly to.And charge efficiency is than relatively low.
Content of the invention
The purpose of the present invention is to provide one kind to be based on phase whole-bridging circuit structure dead band for the defect that prior art exists
Time adjustable Vehicular charger, more difficult by existing phase whole-bridging circuit lagging leg is solved to the dynamic regulation of Dead Time
Realize zvs (ZVT), make lagging leg can also be operated in Sofe Switch state in underloading, and then make to reduce during its work
The switching loss of full-bridge circuit mos pipe, reaches the purpose improving charge efficiency.
For achieving the above object, the present invention is achieved through the following technical solutions: when one kind is based on phase whole-bridging circuit dead band
Between adjustable Vehicular charger, including the rectified three-phase circuit being sequentially connected, input filter circuit, phase whole-bridging circuit and
Stm32 single-chip microcomputer, phase whole-bridging circuit includes dc/ac inverter, high frequency transformer, output rectification and output filtering, therein
Dc/ac inverter includes four switching tubes q1, q2, q3 and q4, and switching tube q1 and q2 constitutes leading-bridge, switching tube q3 and q4 structure
Become lagging leg；Three-phase alternating current input connects the input of rectified three-phase circuit, and the output filtering in phase whole-bridging circuit connects
Battery it is characterised in that:
Set up output voltage detecting circuit, output current detection circuit, dead band dynamic regulating circuit, four structure identicals
Grid drive push-pull amplifier circuit, output voltage detecting circuit and output current detection circuit to be connected to the output of phase whole-bridging circuit
End, the output voltage detecting and output current value is exported to stm32 single-chip microcomputer, the senior intervalometer of stm32 single-chip microcomputer produces
Raw four road pwm drive signals connect to four inputs of dead band dynamic regulating circuit, and dead band dynamic regulating circuit exports four tunnels
The corresponding pwm signal with Dead Time is respectively connecting to the input that four grid drive push-pull amplifier circuit, and four grid drive
The outfan of dynamic push-pull amplifier circuit connect respectively four switching tube q1 of dc/ac inverter in phase whole-bridging circuit, q2, q3,
The grid of q4；Wherein:
Output voltage detecting circuit includes diode d4, resistance r4, r5, r6, and the anode of diode d4 connects phase-shifting full-bridge
The outfan of circuit, the negative electrode of diode d4 is sequentially connected resistance r4, r5, r6 of series connection, the outfan of resistance r6 connect to
Stm32 single-chip microcomputer；
Output current detection circuit includes resistance r7, r8, r9 and electric capacity c5, and one end of resistance r7 connects phase whole-bridging circuit
Outfan, resistance r8, r9 and electric capacity c5 three be in parallel, and the one end after parallel connection connects the other end of resistance r7, another after parallel connection
One end connects to stm32 single-chip microcomputer；
Dead band dynamic regulating circuit includes three numerals programmable finite state machine fsm_1, fsm_2, fsm_3, two
Enumerator countera and counter b, two OR gate or_1 and or_2, four carry the sr latch resetting with set function
Sr1, sr2, sr3, sr4, the senior intervalometer in stm32 single-chip microcomputer produce four road pwm drive signal pwm1, pwm2, pwm3 and
Pwm4, wherein pwm1 and pwm2 are a pair, and pwm3 and pwm4 is another right, two between 180 ° of phase contrast；Pwm1 and pwm2 divides
Not Lian Jie finite state machine fsm_3 input port in_1 and in_2, pwm3 and pwm4 be connected to limit state machine fsm_1
Input port in_3 and in_4, the clock port of finite state machine fsm_1, fsm_2 and fsm_3, enumerator countera and
One input of the clock port of counter b, the clock port of sr latch sr1, sr2, sr3, sr4 and OR gate or_1
And an input of OR gate or_2 links together and is connected the connection of clock signal fclk, the output of finite state machine fsm_1
The port reset_a input enable port en of linkage counter counter b and the input reseting port of sr latch sr4 respectively
Input enable port en and sr of the output port reset_b difference linkage counter countera of r, finite state machine fsm_1
The input reseting port r of latch sr3, outfan set_c and set_d of finite state machine fsm_3 connect sr latch respectively
The input set port s of sr2 and sr1, outfan reset_c and reset_d of finite state machine fsm_2 connect latch respectively
The input reseting port r of sr2 and sr1, the outfan cnt of enumerator countera and counter b connect OR gate or_1 respectively
And another input of OR gate or_2, when the outfan q of sr latch sr1, sr2, sr3 and sr4 exports respectively with dead band
Between pwm signal 1y, 2y, 3y and 4y；
Grid drive push-pull amplifier circuit include npn audion q5, pnp audion q6, resistance r3, electrochemical capacitor c3 and
The colelctor electrode of isolating transformer tr, audion q5 connects power supply, the emitter stage of emitter stage connecting triode q6 of audion q5 and
One end of resistance r3, the grounded collector of audion q6, the base stage of the base stage of audion q5 and audion q6 links together work
Carry Dead Time for one of them of the input connection dead band dynamic regulating circuit output of grid driving push-pull amplifier circuit
Pwm signal 1y, 2y, 3y or 4y, the other end of resistance r3 connects the anode of electrochemical capacitor c3, the negative terminal of electrochemical capacitor c3 connect every
From the primary Same Name of Ends of transformator tr, the primary other end ground connection of transformator tr, the Same Name of Ends output of tr level of isolating transformer
With grid drive push-pull amplifier circuit input connect correspondings, connection dc/ac inverter one of switching tube q1, q2, q3 or
The grid of q4.
On the basis of foregoing circuit, it is additionally provided with input relay and ac fault detection circuit, input relay connects
Between three-phase alternating current input and rectified three-phase circuit, the output of input relay through ac fault detection circuit connect to
Stm32 single-chip microcomputer, stm32 single-chip microcomputer control port output signal through control circuit to input relay；AC fault
Testing circuit includes cement resistor ph and input current sample circuit, and one end of cement resistor ph connects three-phase alternating current input, water
The other end of mud resistance ph connects through input current sample circuit to the adc sample port of stm32 single-chip microcomputer, stm32 monolithic
The gpio port output of machine is through being continued by the control circuit control input that diode d5, npn audion tp2 and electric capacity c6 are constituted
Electrical equipment, the gpio port output of stm32 single-chip microcomputer connects one end of electric capacity c6 and the base stage of npn audion tp2, npn three
The grounded emitter of pole pipe tp2, the colelctor electrode of npn audion tp2 connects the anode of diode d5 and the one of cement resistor ph
End, the negative electrode of diode d5 connects the other end of cement resistor ph, and the two ends of diode d5 connect the control end of input relay.
On the basis of foregoing circuit, it is additionally provided with output relay and battery inverted connection detecting circuit, output relay connects
Between the output filtering in phase whole-bridging circuit and battery, cell input terminal through battery inverted connection detecting circuit connect to
Stm32 single-chip microcomputer, stm32 single-chip microcomputer control port output signal through control circuit to output relay；Battery reversal connection
Testing circuit includes diode d6, electric capacity c7, Zener diode d7 and resistance r10 and r11, and the input of battery connects two poles
The anode of pipe d6, the negative electrode of diode d6 connects one end of resistance r10, the gpio of the other end of resistance r10 and stm32 single-chip microcomputer
Port, one end of one end of electric capacity c7, the negative electrode of Zener diode d7 and resistance r11 link together, stm32 single-chip microcomputer
The output of gpio port control output relay through the control circuit that is made up of npn audion tp1, electric capacity c4 and diode d3
Device, the gpio port output of stm32 single-chip microcomputer connects one end of electric capacity c4 and the base stage of npn audion tp1, npn three pole
The grounded emitter of pipe tp1, the colelctor electrode of npn audion tp1 connects the anode of diode d3, and the two ends of diode d3 connect
The control end of output relay.
The invention has the advantages that and significant effect:
1) present invention can realize the advanced arm and lagging leg zvs (ZVT) in full-load range it is achieved that
The Sofe Switch function of four switching tubes, reduces the loss of switching tube.Improve efficiency.
2) circuit is relatively easy, without the complex control of special circuit, low cost, good reliability.
3) dead band dynamic regulating circuit is different with analog integrator circuit composition dead band dynamic regulating circuit from general, this
The bright finite state machine employing digital programmable and sr latch constitute dynamic dead zone adjustment circuit.Make the adjustment of Dead Time
More accurate.
4) this dead band dynamic regulating circuit can be carried out quickly according to the value of the output voltage that single-chip microcomputer collects and electric current
Dead Time adjustment than analog integrator circuit constitute dead band dynamic regulating circuit regulate the speed faster.
Brief description
Fig. 1 is the charger block diagram that the present invention carries dead band dynamic regulating circuit structure；
Fig. 2 is traditional Dead Time adjustment circuit schematic diagram；
Fig. 3 is the connection figure that grid drive push-pull amplifier circuit and full-bridge circuit；
Fig. 4 is the pwm drive signal with the dynamic dead zone time realized by dead band dynamic regulating circuit；
Fig. 5 is the dead band dynamic regulating circuit schematic diagram of digital programmable；
Fig. 6 is output voltage current detection circuit；
Fig. 7 is ac fault detection circuit；
Fig. 8 is battery inverted connection detecting circuit.
Specific embodiment
As Fig. 1, three-phase alternating current input is sequentially connected input relay 1, rectified three-phase circuit 2, input filter circuit 3, moves
Phase full-bridge circuit 4 (including dc/ac inverter, high frequency transformer, output rectification and output filtering), output relay 5, electricity
Pond 6, output voltage current detection circuit 10 is connected between the outfan of output relay 5 and stm32 single-chip microcomputer 12 (if not
Setting output relay is then connected between phase whole-bridging circuit 4 and stm32 single-chip microcomputer 12), stm32 single-chip microcomputer 12 exports four tunnels
Pwm signal connects to dead band dynamic regulating circuit 8, and dead band dynamic regulating circuit 8 exports four, the four tunnel pwm carrying Dead Time
Signal is respectively connecting to the input that four structure identical grid drive push-pull amplifier circuit 9, and four grid drive recommends amplification electricity
The outfan on road 9 connects the grid of four switching tubes of dc/ac inverter in phase whole-bridging circuit respectively.The input of battery 6
Connect stm32 single-chip microcomputer 12 also by battery inverted connection detecting circuit 11, stm32 single-chip microcomputer 12 controls output to continue by control circuit
The shutoff of electrical equipment 5.The outfan of input relay 1 connects stm32 single-chip microcomputer 12, stm32 also by ac fault detection circuit 7
Single-chip microcomputer 12 passes through the shutoff of control circuit control input relay 1.
As Fig. 6, output voltage current detection circuit 10 includes output voltage detecting circuit and output current detection circuit two
Part, output voltage detecting circuit is made up of resistor voltage divider circuit, and the output of Schottky diode d4 and divider resistance r4's is defeated
Enter connected, r4 is connected with resistance r5, r6 successively, the output of resistance r6 connects to stm32 single-chip microcomputer.Output current detection circuit by
The output of the resistance r7 of one 510k connect to current sampling resistor r8, r9, electric capacity c5 input, the resistance of r8, r9 is
0.01 ω, r8, r9, c5 are in parallel, and the output of three connects to stm32 single-chip microcomputer.
As Fig. 3, the dc/ac inverter in phase whole-bridging circuit 4 includes four switching tubes q1, q2, q3 and q4, switching tube q1
Constitute leading-bridge with q2, switching tube q3 and q4 constitutes lagging leg.Alternating current is changed into unidirectional current by rectified three-phase circuit 2.Logical
The voltage crossing rectified three-phase circuit 2 is filtered filtering high frequency small-signal through input filter circuit 3.Input filter circuit 3 by
The output-parallel composition of one resistance and two electrochemical capacitors and three phase rectifier, the pressure voltage of electrochemical capacitor and capacitance are 400v/
560uf, the voltage after input filter 3 is supplied to the drain electrode of two mos pipe q1, q4 of phase whole-bridging circuit 4 as bus
Voltage.Lr is that the resonant inductance of transformator primary side is connected with the former limit of high frequency transformer t1.R1, c1 series connection is in parallel with d1, r2,
C2 series connection is in parallel with d2 to constitute full-wave rectifying circuit, carries out rectification to the output voltage of transformer secondary.Grid drive to recommend and put
Audion q6 is in series by npn audion q5, pnp for big circuit 9, and the base stage of two npn, pnp audions is as process
The input of dead band dynamic regulating circuit output signal, the emitter stage outfan of two pipes concatenate divider resistance r3 and
One capacitance c3, connects a transformator tr in the outfan of capacitance and carries out electrical isolation to amplifying signal, after isolation
One of output control dc/ac inverter switching tube turn-on and turn-off.In figure merely illustrates road grid and drives to recommend puts
Big circuit, its input connects the 2y signal of dead band dynamic regulating circuit output, in the output control dc/ac inverter after isolation
Q2 pipe, in addition three road grid drive the input of push-pull amplifier circuits connect respectively the 1y of dead band dynamic regulating circuit output, 3y,
4y signal, the output after isolation then controls the q1 in dc/ac inverter to manage respectively, q3 pipe, q4 pipe.
As Fig. 5, output voltage and electric current that stm32 single-chip microcomputer can collect according to output voltage current detection circuit 10
Value, control the height of the stm32 single-chip microcomputer gpio mouth level being connected accordingly with dead band dynamic regulating circuit, to limited shape
State machine is programmed dynamically arranging the width of Dead Time, after the waveform that sr latch exports to finite state machine latches
Export the input of push-pull amplifier circuit.The senior intervalometer of stm32 single-chip microcomputer produces the complementary pwm drive signal in four tunnels,
Frequency is 45khz.Pwm1 and a pair of pwm2, a pair of pwm3 and pwm4, the phase contrast of each pair signal waveform is 180 °, this signal warp
Cross push-pull amplifier circuit and amplify the driving electricity as the advanced arm of phase whole-bridging circuit and lagging leg mos tube grid with transformer isolation
Pressure, controls the turn-on and turn-off of four switching tubes, by controlling the big of advanced arm and lagging leg mos tube grid drive signal phase shift
The size of little adjustment output voltage output current.When the load, stm32 single-chip microcomputer is big according to the voltage x current collecting
The size of little control pwm signal phase shift maintains output voltage and electric current constant, then adjusts dead band through dead band dynamic regulating circuit 8
The size of time prevents the upper down tube of two brachium pontis of phase whole-bridging circuit from leading directly to the Dead Time simultaneously guaranteeing phase whole-bridging circuit
Meet four switching tubes and be operated in zvs (ZVT) state.Dead band dynamic regulating circuit 8 is had by three numerals are programmable
Limit state machine fsm_1, fsm_2, fsm_3 (fsm_3 is set finite state machine, and remaining is reset finite state machine), two meters
Number device countera, counter b, two OR gates or_1, or_2 and four carry reset and the sr1 of set function, sr2,
Tetra- sr latch of sr3, sr4 are constituted.By the senior intervalometer of stm32 single-chip microcomputer produce four road pwm signal pwm1, pwm2,
Pwm3, pwm4, input to input port in_1, in_2, in_3, in_4 of finite state machine fsm_3, fsm_1, fclk is dead band
The clock signal of dynamic regulating circuit, this clock signal is respectively connecting to fsm_1, fsm_2, fsm_3, countera, counter
The clock port of b, sr1, sr2, sr3, sr4 and one of input port of or_1, or_2.The output port of fsm_1
Reset_a is respectively connecting to the input reseting port r of input enable port en and sr4 of counter b, the outfan of fsm_1
Mouth reset_b is respectively connecting to the input reseting port r of input enable port en and sr3 of countera.Enumerator
The outfan cnt of countera, counter b is respectively connecting to one of input of OR gate or_1, or_2.or_1、
The outfan of or_2 is connected with the set input s of sr4, sr3 respectively.Outfan reset_c, reset_d of fsm_2 respectively and
The input reseting port r of sr2, sr1 connects.Outfan set_c, set_d of fsm_3 input set end with sr2, sr1 respectively
Mouth s connects.Output voltage and the value of electric current that stm32 single-chip microcomputer can collect according to output voltage current detection circuit, control
Make the height of corresponding stm32 single-chip microcomputer gpio mouth level, this gpio mouth is connected with dead band dynamic regulating circuit, to limited shape
State machine is programmed dynamically arranging pwm1, pwm2, pwm3, pwm4, the Dead Time width of four road drive signals.Sr latch
Pwm signal 1y, 2y, 3y, 4y with phase shift is exported four after latching and recommends by the waveform that finite state machine is exported
The input of amplifying circuit.This four roads drive signal creates four kinds of different Dead Times (as Fig. 4) according to different loads
It is respectively t0, t1, t2, t3 Dead Time to be sequentially reduced.Dead Time has a upper and lower bound respectively, under any circumstance all
Not can exceed that upper and lower bound otherwise in former limit resonant inductance and output filter circuit the energy of inductance do not reach and completely mos managed
The effect of the complete discharge and recharge of parasitic capacitance, switching tube is difficult to zvs (ZVT), and switching tube would operate in hard switching shape
State switching loss increases.1y, 2y are the drive signal waveform of advanced arm, and 3y, 4y are the drive signal waveform of lagging leg.1y、3y
Phase shift with 2y, 4y is tphase.Stm32 single-chip microcomputer passes through to adjust two tiltedly size adjustment output voltages to pipe tphase
Electric current.Increasing tphase can make output voltage electric current increase, and reducing tphase can make output voltage electric current reduce.As figure
Shown in 3, wherein 2y drives push-pull amplifier circuit 9 to carry out power amplification through grid, then through the advanced bridge of transformator tr isolation drive
The grid g2 of arm q2.1y, 3y, 4y through identical push-pull amplifier circuit amplify and isolation drive q1, q3, the grid g1 of q4, g3,
g4.
As Fig. 7, ac fault detection circuit 7 is used for detecting whether the surge current of exchange input moment is excessive.This exchange
Failure detector circuit is made up of the cement resistor ph of 390 ω of a surge current suppression and input current sample circuit.Ph's
Output is connected with the input of input sampling circuit, and the output of input sampling circuit connects to the adc sampling end of stm32 single-chip microcomputer
Mouthful.The colelctor electrode of the anode of circuit diode d5 of control input relay switch and Darlington triode tp2 connects, tp2's
The negative electrode of colelctor electrode and diode d5 is connected to the control end of input relay, and the base stage of audion tp2 connects mono- to stm32
The gpio mouth of piece machine, is also connected with the electric capacity c6 of a 0.1uf simultaneously between the base stage of tp2 and emitter stage.Beginning work is established by cable on charger
Whether the moment stm32 single-chip microcomputer made exceedes threshold current by ac fault detection electric circuit inspection electric current, when start surge electricity
Stream exceedes threshold current, and then stm32 monolithic proceeds to defence program, the Darlington triode being connected with input relay control end
The base stage of tp2 is set to low level by the gpio mouth of stm32 single-chip microcomputer, turns off audion tp2 and then turns off input relay 1.
As Fig. 8, battery inverted connection detecting circuit 11 is connected with the input of battery by the input of Schottky diode d6, d6
Output be connected with the input of the resistance r10 of a 2.2k, the output of resistance r10 is respectively connecting to the gpio of stm32 single-chip microcomputer
Mouth and the input by electric capacity c7,18v Zener diode d7, resistance r11 parallel network, the control port of stm32 single-chip microcomputer is led to
Cross and control the circuit (tp1, d3, c4) of output relay switch to connect to output relay.The wink that on charger, electricity is started working
Between stm32 single-chip microcomputer if battery reversal connection is detected by the polarity that battery inverted connection detecting circuit detects battery, control corresponding
Gpio mouth turns off output relay (Fig. 6) for low level.When stm32 single-chip microcomputer is detected by output voltage current detection circuit
Output overvoltage or excessively stream, control corresponding gpio mouth to turn off Darlington triode tp1, the colelctor electrode of tp1 and two for low level
The control end of the anode of pole pipe d3 and output relay is connected, and the negative electrode of diode d3 is also connected to the control of output relay
End, is also connected with an electric capacity c4 simultaneously between the base stage of tp1 and emitter stage.When tp1 turns off, the control end of relay also accordingly controls
Relay turns off.
Operation principle and the process of the present invention are described: through the complementary pwm in four tunnels of dead zone adjusting circuit output in conjunction with Fig. 3
Drive signal to realize leading of mos pipe through the amplification of push-pull amplifier circuit 9 and isolation, the gate drive signal as mos pipe
Lead to and turn off.Wherein uin is busbar voltage filtered through three phase rectifier, and uo is output DC voltage.Vlr is resonant inductance
The voltage at lr two ends.When g1, g3 are high level, g2, g4 are low level.Q1, q3 turn on, and q2, q4 close.When g2, g4 are height
Level, g1, g3 are low level.Q2, q4 turn on, and q1, q3 close.When q1, q3 turn on, the vds of q1, q3 two pipe is zero to realize zero
Voltage turn-on, when q1, q3 turn off because the parallel parasitic capacitance within the presence of resonant inductance and mos pipe occurs resonance to electricity
Appearance discharge and recharge makes the voltage at mos pipe two ends be reduced to zero and realizes zero voltage turn-off.The work process of q2, q4 is identical with q1, q3.Pass through
The senior intervalometer of stm32 single-chip microcomputer 12 produces the pwm signal with phase shift so that q1, q2 pipe shifts to an earlier date q3, q4 conducting, passes through
Control the size of the size adjustment output voltage uo of phase shift.
The present invention can realize the advanced arm and lagging leg zvs (ZVT) in full-load range, improves effect
Rate.The Sofe Switch function of achieving four switching tubes reduces the loss of switching tube, and propose one kind can be according to output simultaneously
The method that dead band dynamic regulating circuit adjusts the Dead Time of pwm drive signal is passed through in the change of voltage x current.The present invention's is dead
Area's dynamic regulating circuit is different from analog integrator circuit composition dead band dynamic regulating circuit, employs the limited of digital programmable
State machine and sr latch constitute dynamic dead zone adjustment circuit, and the adjustment of Dead Time can be made more accurately quick.
Claims (3)
1. one kind is based on the adjustable Vehicular charger of phase whole-bridging circuit Dead Time, including the three phase rectifier electricity being sequentially connected
Road, input filter circuit, phase whole-bridging circuit, and also include stm32 single-chip microcomputer, phase whole-bridging circuit include dc/ac inverter,
High frequency transformer, output rectification and output filtering, dc/ac inverter therein includes four switching tubes q1, q2, q3 and q4, opens
Close pipe q1 and q2 and constitute leading-bridge, switching tube q3 and q4 constitutes lagging leg；Three-phase alternating current input connects rectified three-phase circuit
Input, in phase whole-bridging circuit output filtering connect battery it is characterised in that:
Set up output voltage detecting circuit, output current detection circuit, dead band dynamic regulating circuit and four structure identical grid
Push-pull amplifier circuit, output voltage detecting circuit and output current detection circuit is driven to be connected to the output of phase whole-bridging circuit
End, the output voltage detecting and output current value is exported to stm32 single-chip microcomputer, the senior intervalometer of stm32 single-chip microcomputer produces
Raw four road pwm drive signals connect to four inputs of dead band dynamic regulating circuit, and dead band dynamic regulating circuit exports four tunnels
The corresponding pwm signal with Dead Time is respectively connecting to the input that four grid drive push-pull amplifier circuit, and four grid drive
The outfan of dynamic push-pull amplifier circuit connect respectively four switching tube q1 of dc/ac inverter in phase whole-bridging circuit, q2, q3,
The grid of q4；Wherein:
Output voltage detecting circuit includes diode d4, resistance r4, r5, r6, and the anode of diode d4 connects phase whole-bridging circuit
Outfan, the negative electrode of diode d4 is sequentially connected resistance r4, r5, r6 of series connection, and the outfan of resistance r6 connects mono- to stm32
Piece machine；
Output current detection circuit includes resistance r7, r8, r9 and electric capacity c5, and one end of resistance r7 connects the defeated of phase whole-bridging circuit
Go out end, resistance r8, r9 and electric capacity c5 three are in parallel, and the one end after parallel connection connects the other end of resistance r7, another one end after parallel connection
Connect to stm32 single-chip microcomputer；
Dead band dynamic regulating circuit includes three numerals programmable finite state machine fsm_1, fsm_2, fsm_3, two countings
Device counter a and counter b, two OR gate or_1 and or_2, four carry the sr latch resetting with set function
Sr1, sr2, sr3, sr4, the senior intervalometer in stm32 single-chip microcomputer produce four road pwm drive signal pwm1, pwm2, pwm3 and
Pwm4, wherein pwm1 and pwm2 are a pair, and pwm3 and pwm4 is another right, two between 180 ° of phase contrast；Pwm1 and pwm2 divides
Not Lian Jie finite state machine fsm_3 input port in_1 and in_2, pwm3 and pwm4 be connected to limit state machine fsm_1
Input port in_3 and in_4, the clock port of finite state machine fsm_1, fsm_2 and fsm_3, enumerator counter a and
One input of the clock port of counter b, the clock port of sr latch sr1, sr2, sr3, sr4 and OR gate or_1
And an input of OR gate or_2 links together and is connected the connection of clock signal fclk, the output of finite state machine fsm_1
The port reset_a input enable port en of linkage counter counter b and the input reseting port of sr latch sr4 respectively
Input enable port en and sr of the output port reset_b difference linkage counter counter a of r, finite state machine fsm_1
The input reseting port r of latch sr3, outfan set_c and set_d of finite state machine fsm_3 connect sr latch respectively
The input set port s of sr2 and sr1, outfan reset_c and reset_d of finite state machine fsm_2 connect latch respectively
The input reseting port r of sr2 and sr1, the outfan cnt of enumerator counter a and counter b connect OR gate or_1 respectively
And another input of OR gate or_2, when the outfan q of sr latch sr1, sr2, sr3 and sr4 exports respectively with dead band
Between pwm signal 1y, 2y, 3y and 4y；
Grid drive push-pull amplifier circuit to include npn audion q5, pnp audion q6, resistance r3, electrochemical capacitor c3 and isolation
The colelctor electrode of transformator tr, audion q5 connects power supply, the emitter stage of emitter stage connecting triode q6 of audion q5 and resistance
One end of r3, the grounded collector of audion q6, the base stage of audion q5 is connected together as grid with the base stage of audion q6
The input driving push-pull amplifier circuit connects one of pwm letter with Dead Time that dead band dynamic regulating circuit exports
Number 1y, 2y, 3y or 4y, the other end of resistance r3 connects the anode of electrochemical capacitor c3, and the negative terminal of electrochemical capacitor c3 connects isolation and becomes
The primary Same Name of Ends of depressor tr, the primary other end ground connection of transformator tr, the Same Name of Ends output of tr level of isolating transformer and grid
The input driving push-pull amplifier circuit connects correspondence, connects dc/ac inverter one of switching tube q1, q2, q3 or q4
Grid.
2. according to claim 1 based on the adjustable Vehicular charger of phase whole-bridging circuit Dead Time it is characterised in that:
It is additionally provided with input relay and ac fault detection circuit, input relay is connected to three-phase alternating current input and rectified three-phase circuit
Between, the output of input relay connects to stm32 single-chip microcomputer, the control of stm32 single-chip microcomputer through ac fault detection circuit
The signal of port output is through control circuit to input relay；Ac fault detection circuit includes cement resistor ph and input electricity
Stream sample circuit, one end of cement resistor ph connects three-phase alternating current input, and the other end of cement resistor ph is adopted through input current
Sample circuit connects to the adc sample port of stm32 single-chip microcomputer, the gpio port output of stm32 single-chip microcomputer through by diode d5,
The control circuit control input relay that npn audion tp2 and electric capacity c6 is constituted, the gpio port output of stm32 single-chip microcomputer
Connect one end of electric capacity c6 and the base stage of npn audion tp2, the grounded emitter of npn audion tp2, npn audion
The colelctor electrode of tp2 connects the anode of diode d5 and one end of cement resistor ph, and the negative electrode of diode d5 connects cement resistor ph
The other end, the two ends of diode d5 connect the control end of input relay.
3. according to claim 1 and 2 based on the adjustable Vehicular charger of phase whole-bridging circuit Dead Time, its feature exists
In: it is additionally provided with output relay and battery inverted connection detecting circuit, output relay is connected to the output filter in phase whole-bridging circuit
Between ripple and battery, cell input terminal connects to stm32 single-chip microcomputer, the control of stm32 single-chip microcomputer through battery inverted connection detecting circuit
The signal of port processed output is through control circuit to output relay；Battery inverted connection detecting circuit include diode d6, electric capacity c7,
Zener diode d7 and resistance r10 and r11, the input of battery connects the anode of diode d6, and the negative electrode of diode d6 is even
The gpio port of one end of connecting resistance r10, the other end of resistance r10 and stm32 single-chip microcomputer, one end of electric capacity c7, voltage stabilizing two pole
One end of the negative electrode of pipe d7 and resistance r11 links together, and the gpio port output of stm32 single-chip microcomputer is through by npn three
The control circuit that pole pipe tp1, electric capacity c4 and diode d3 are constituted controls output relay, and the gpio port of stm32 single-chip microcomputer is defeated
Go out to connect one end of electric capacity c4 and the base stage of npn audion tp1, the grounded emitter of npn audion tp1, npn three pole
The colelctor electrode of pipe tp1 connects the anode of diode d3, and the two ends of diode d3 connect the control end of output relay.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105978123B (en) * | 2016-06-06 | 2018-05-15 | 东南大学 | A kind of dynamic adjusting system of phase-shifting full-bridge formula Vehicular charger dead time |
| CN105910306B (en) * | 2016-06-29 | 2018-08-14 | 山东力诺瑞特新能源有限公司 | A kind of controller suitable for solar water heater |
| CN106208238B (en) * | 2016-08-17 | 2018-09-14 | 中车青岛四方车辆研究所有限公司 | phase-shifting full-bridge charger control system and control method |
| WO2019061120A1 (en) * | 2017-09-28 | 2019-04-04 | 深圳传音制造有限公司 | Surge protection circuit |
| CN111817545B (en) * | 2020-07-24 | 2022-03-18 | 深圳市海浦蒙特科技有限公司 | Driving dead zone detection circuit, peak absorption circuit and switching tube protection circuit |
| CN113690983B (en) * | 2021-08-26 | 2024-01-23 | 长春捷翼汽车科技股份有限公司 | Dead time determining method, charging driving circuit, device, equipment and medium |
| CN116601859A (en) * | 2021-09-30 | 2023-08-15 | 宁德时代新能源科技股份有限公司 | Reverse current control method and device for phase-shifting full-bridge circuit |
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