CN104505410B - Photodiode, ultraviolet detector integrated circuit and its manufacture method - Google Patents
Photodiode, ultraviolet detector integrated circuit and its manufacture method Download PDFInfo
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- CN104505410B CN104505410B CN201410852685.2A CN201410852685A CN104505410B CN 104505410 B CN104505410 B CN 104505410B CN 201410852685 A CN201410852685 A CN 201410852685A CN 104505410 B CN104505410 B CN 104505410B
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
Abstract
Disclose a kind of photodiode, ultraviolet detector integrated circuit and its manufacture method.Concave configuration is formed so that its is sensitive to UV light in the light receiving surface side of the first semiconductor regions of existing visible ray photodiode.Thus, it is possible to be based on standard semi-conductor processes (such as CMOS technology) manufacture ultraviolet detection photodiode, production cost is reduced.Also, due to that can be manufactured using standard semi-conductor processes, can be with other circuit element Integrated manufacture ultraviolet detector integrated circuits.
Description
Technical field
The present invention relates to semiconductor technology, and in particular to a kind of photodiode, ultraviolet detector integrated circuit and its system
Make method.
Background technology
In the prior art, ultraviolet detector is mostly using the special process manufacture incompatible with integrated circuit, and inspection
Slowdown monitoring circuit cannot it is integrated on the same chip, it is relatively costly.Meanwhile, the purple manufactured using the technique of ic process compatibility
External detector needs to use expensive SOI silicon wafer (Silicon-On-Insulator, the silicon in dielectric substrate), or
Need to plate multilayer dielectricity filter coating, its is relatively costly.
The content of the invention
In view of this, it is an object of the invention to provide a kind of photodiode, ultraviolet detector integrated circuit and its system
Make method so that can manufacture semiconductor ultraviolet detector, reduction manufacturing cost based on standard semi-conductor processes.
A kind of first aspect, there is provided photodiode, including
Silicon base;
First semiconductor regions, with the first conduction type, are formed in the silicon base, have in light receiving surface side
Multiple concave configurations.
Preferably, the photodiode also includes:
Second semiconductor regions, with the second conduction type, are separately formed at described with first semiconductor regions
In silicon base;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
Preferably, the multiple concave configuration is multiple pits of multiple grooves arranged in parallel or array format arrangement.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N+ heavily doped regions, described second
Semiconductor regions are P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N traps, second semiconductor region
Domain is P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are that the P+ being formed in N traps is heavily doped
Miscellaneous area, second semiconductor regions are the N+ heavily doped regions being formed in the N traps.
Second aspect, a kind of photodiode manufacture method, including:
The photoelectric diode structure sensitive to visible ray is formed on a silicon substrate, and the photoelectric diode structure includes being formed
The first semiconductor regions in the silicon base, first semiconductor regions have the first conduction type;
Multiple concave configurations are formed in the light receiving surface side of first semiconductor regions.
Preferably, the multiple concave configuration is multiple grooves or multiple pits.
Preferably, the light receiving surface side in first semiconductor regions forms multiple concave configurations and includes:
Using cover the light receiving surface, the metal level with multiple holes as mask carry out silicon etching formed it is described under
Recessed structure.
Characterized in that, the photoelectric diode structure also includes:
Second semiconductor regions, with the second conduction type, are separately formed at described with first semiconductor regions
In silicon base;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N+ heavily doped regions, described second
Semiconductor regions are P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N traps, second semiconductor region
Domain is P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are that the P+ being formed in N traps is heavily doped
Miscellaneous area, second semiconductor regions are the N+ heavily doped regions being formed in the N traps.
A kind of third aspect, there is provided ultraviolet detector integrated circuit, including:
First photoelectric diode structure, is formed in silicon base, for detecting ultraviolet and visible ray;
Second photoelectric diode structure, including be formed at it is in the silicon base, with flat light receiving surface the first half
Conductive region;With
Detection circuit structure, is formed in same silicon base with first photodiode and the second photodiode,
For obtaining the parameter related to the difference of the photoelectric current that first photodiode and the second photodiode are exported.
Preferably, first photoelectric diode structure includes:
First semiconductor regions, with the first conduction type, have multiple concave configurations in light receiving surface side.
Preferably, first photodiode also includes:
Second semiconductor regions, with the second conduction type, are separately formed at described with first semiconductor regions
In silicon base;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
Preferably, the multiple concave configuration is multiple grooves or multiple pits.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N+ heavily doped regions, described second
Semiconductor regions are P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N traps, second semiconductor region
Domain is P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are that the P+ being formed in N traps is heavily doped
Miscellaneous area, second semiconductor regions are the N+ heavily doped regions being formed in the N traps.
Preferably, first photoelectric diode structure and second photoelectric diode structure are accounted in the silicon base
Use identical area.
Preferably, the detection circuit structure includes:
First amplifier, for being amplified to the first photoelectric current that the first photodiode is exported and is converted to amplification
First signal;
Second amplifier, for being amplified to the second photoelectric current that the second photodiode is exported and is converted to amplification
Secondary signal;
First analog-digital converter, for first signal to be converted into the first data signal;
Second mode converter, for the secondary signal to be converted into the second data signal;
Subtracter, the difference for calculating first data signal and second data signal is obtained and characterizes ultraviolet
The signal of intensity.
A kind of fourth aspect, there is provided manufacture method of ultraviolet detector integrated circuit, including:
Obtain includes detection circuit semiconductor structure, the first photoelectric diode structure and the second light based on silicon base formation
The semiconductor structure of electric diode structure, wherein, the light receiving surface of the first photoelectric diode structure is by the gold with multiple holes
Category layer covering, the light receiving surface of the second photoelectric diode structure is by the metal level covering without hole;
Etch the light area of first photoelectric diode structure and second photoelectric diode structure so that described
Metal level exposes;
Silicon etching is carried out as mask using metal level;
Etch the metal level and the insulating barrier of lower section of the first photoelectric diode structure and the second photoelectric diode structure.
Preferably, described hole is the circular or square hole of strip hole arranged in parallel or array arrangement.
Preferably, first photoelectric diode structure also includes:
Second semiconductor regions, with the second conduction type, are separately formed at described with first semiconductor regions
In silicon base;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N+ heavily doped regions, described second
Semiconductor regions are P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are N traps, second semiconductor region
Domain is P+ heavily doped regions.
Preferably, the silicon base is P-type silicon substrate, and first semiconductor regions are that the P+ being formed in N traps is heavily doped
Miscellaneous area, second semiconductor regions are the N+ heavily doped regions being formed in the N traps.
Form multiple recessed by the N polar regions or P polar regions in the existing diode structure based on general semiconductor technology
Structure so that in concave configuration region, silicon chip surface apart from the empty charged region of PN junction distance closer to so that two pole
Pipe being capable of effective detection ultraviolet.The diode and detection electricity for detecting visible ray of the photodiode and existing structure
Road can be formed in same silicon base, realize the detection to ultraviolet.Simple structure of the present invention, low cost.
Brief description of the drawings
By description referring to the drawings to the embodiment of the present invention, of the invention above-mentioned and other purposes, feature and
Advantage will be apparent from, in the accompanying drawings:
Figure 1A is the top view of the photodiode of first embodiment of the invention;
Figure 1B is the sectional view of the photodiode of first embodiment of the invention;
Fig. 1 C are the sectional views for detecting the photodiode of visible ray;
Fig. 1 D are the flow charts of the manufacture method of the photodiode of first embodiment of the invention;
Fig. 2 is the sectional view of the photodiode of first embodiment of the invention another preferred embodiment;
Fig. 3 is the sectional view of the photodiode of first embodiment of the invention another preferred embodiment;
Fig. 4 A are the circuit diagrams of the ultraviolet detector integrated circuit of second embodiment of the invention;
Fig. 4 B are the spectral response curve figures of the ultraviolet detector of second embodiment of the invention;
Fig. 4 C are the structural representations of the ultraviolet detector integrated circuit of second embodiment of the invention;
Fig. 5 is the flow chart of the manufacture method of the ultraviolet detector integrated circuit of second embodiment of the invention;
Fig. 6 A- Fig. 6 F are ultraviolet detector integrated circuit the cutting in manufacture method different phase of second embodiment of the invention
Face figure.
Specific embodiment
The present invention is more fully described hereinafter with reference to accompanying drawing.In various figures, identical element is attached using what is be similar to
Icon is remembered to represent.For the sake of clarity, the various pieces in accompanying drawing are not necessarily to scale.Furthermore, it is possible to it is not shown some
Known part.For brevity, can be described in a width figure by the semiconductor structure of acquisition after several steps.
It should be appreciated that in the structure of outlines device, being referred to as being located at another floor, another area when by a floor, a region
When domain " above " or " top ", can refer to above another layer, another region, or its with another layer, it is another
Other layers or region are also included between individual region.Also, if device overturn, this layer, a region will be positioned at another
Layer, another region " below " or " lower section ".
If in order to describe located immediately at another layer, another region above scenario, herein will be using " directly would existing ...
Above " or " ... abut above and therewith " form of presentation.
In this application, term " semiconductor structure " refers to whole half formed in each step of manufacture semiconductor devices
The general designation of conductor structure, including all layers for having been formed or region.Describe hereinafter of the invention many specific thin
Section, the structure of such as device, material, size, handling process and technology, to be more clearly understood that the present invention.But as ability
The technical staff in domain it will be appreciated that as, the present invention can not be realized according to these specific details.
Unless hereinafter particularly pointed out, the various pieces of semiconductor devices can be by well known to those skilled in the art
Material is constituted.
Unless the context clearly requires otherwise, otherwise entire disclosure and " including " in claims, similar etc. "comprising"
Word should be construed to the implication for including rather than exclusive or exhaustive implication;That is, be " including but not limited to " contains
Justice.
In the description of the invention, it is to be understood that term " first ", " second " etc. be only used for describe purpose, without
It is understood that to indicate or implying relative importance.Additionally, in the description of the invention, unless otherwise indicated, the implication of " multiple "
It is two or more.
The present invention can be presented in a variety of manners, some of them example explained below.
Figure 1A is the top view of the photodiode of first embodiment of the invention.Figure 1B is the light of first embodiment of the invention
The sectional view of electric diode.The semiconductor structure of the photodiode of the present embodiment is described below in conjunction with Figure 1A and Figure 1B.Photoelectricity
Diode 1 includes silicon base 11, the first semiconductor regions 12 with the first conduction type.First semiconductor regions 12 are formed in
In silicon base 11.Preferably, the first semiconductor regions 12 are formed by diffusion N-type or p type impurity in silicon base 11.It is preferred that
Ground, the first semiconductor regions 12 are formed as rectangle.Wherein, the first semiconductor regions 12 are formed with multiple in light receiving surface side
Recessed structure 12a.
In Figure 1A and Figure 1B, concave configuration 12a is multiple grooves of parallel or non-parallel setting.Alternately, it is recessed
Structure 12a can also be multiple pits that light receiving surface side is formed at array way.The pit can be square, circle
Or other arbitrary shapes.
Photodiode 1 can also include the second semiconductor regions 13, the and of first electrode 14 with the second conduction type
Second electrode 15.Preferably, the second semiconductor regions 13 are formed around the open annular of the first semiconductor regions 12.First electricity
Pole 14 is arranged on the first semiconductor regions, is connected with the first semiconductor regions 12.Preferably, first electrode 14 is formed as ring
Shape.Second electrode 15 is arranged on the second semiconductor regions, is connected with the second semiconductor regions 13.Preferably, second electrode 15
It is set to and the second semiconductor regions identical shape.
First conduction type is the one kind in N-type or p-type, and the second conduction type is the another kind in N-type or p-type.
The first semiconductor regions 12 with the first conduction type and silicon base 11 are formed in other classes in silicon base 11
The semiconductor regions of type form the PN junction of photodiode.First semiconductor regions 12 receive visible ray and ultraviolet in smooth surface
Line, thus produces carrier to produce photoelectric current by the space-charge region of PN junction, realizes visible ray and UV detection.
Fig. 1 C are the sectional views for detecting the photodiode of visible ray.Photodiode 1 ' and Figure 1B institutes in Fig. 1 C
The photoelectric diode structure for showing is essentially identical.Both difference be Fig. 1 C the first semiconductor regions smooth surface be it is flat,
The concave configuration shown in Figure 1B is not formed.
In the present embodiment, silicon base 11 is P-type silicon substrate, and the first semiconductor regions 12 are N+ heavily doped regions, and it can be with
Silicon base is diffused in presumptive area using N+ particles to be formed.
In the present embodiment, CMOS (Complementary are utilized for detecting the diode semiconductor structure of ultraviolet
Metal Oxide Semiconductor, complementary metal oxide semiconductors (CMOS)) technique making.Specifically, it can utilize and be based on
The source-drain area of the nmos device that CMOS technology makes is formed.
Absorption characteristic according to light in silicon, the wavelength of light is shorter, then the depth that it is penetrated in silicon is more shallow;Wavelength is got over
Long, then penetration depth is deeper.The wavelength ratio of ultraviolet is shorter, therefore, most of photon of ultraviolet is all the of silicon base
Photo-generated carrier (electronics, hole) or heat energy are absorbed and are converted into semiconductor region surface is very thin one layer.In addition,
According to the characteristic of photodiode, only in the space-charge region of PN junction (in Figure 1B and Fig. 1 C sectional views between two dotted lines)
Or near space-charge region produce photo-generated carrier could be formed effective photoelectric current export circuit to detection.In Fig. 1 C institutes
Show detection visible ray photodiode 1 ' in, space-charge region apart from silicon chip surface farther out, and ultraviolet produce photoproduction
Carrier is again main in very thin one layer of the first semiconductor regions, it is impossible to form effective photoelectric current, therefore, it is only to visible
Photaesthesia.And by the surface etch multiple concave configuration in common photodiode, shorten empty in the bottom of concave configuration
Between distance between charged region and silicon chip surface, more ultraviolets can be allowed to reach space-charge region, such ultraviolet is produced
Raw photo-generated carrier just can more form effective photoelectric current output.Therefore, 1 pair, the photodiode shown in Figure 1A and Figure 1B
Ultraviolet is more sensitive.
Meanwhile, the first semiconductor regions of photodiode 1 are the presence of recessed part, and be not etched in the presence of some
The part for carrying over, recessed position is used for for ultraviolet being more effectively converted to photoelectric current;Not recessed part can be used
To collect visible photo-generated carrier, used as the path of the photoelectric current of visible ray, all these raised places all connect together
, exported eventually through the N poles of photodiode.Therefore, the photoelectric current of the output of photodiode 1 can characterize the strong of ultraviolet
Degree and visual intensity sum.
By the difference for asking for the output of photodiode 1 and photodiode 1 ', it is possible to achieve to uitraviolet intensity
Detection.
Fig. 1 D are the flow charts of the manufacture method of the photodiode of first embodiment of the invention.As shown in figure iD, it is described
Method includes:
Step 1100, the photoelectric diode structure sensitive to visible ray is formed on a silicon substrate.
The photoelectric diode structure is any existing photoelectric diode structure prepared based on standard semi-conductor processes.
Step 1200, form multiple concave configurations in the light receiving surface side of first semiconductor regions.
Preferably, the multiple concave configuration is multiple grooves or multiple pits.
In one preferred embodiment, step 1200 can with cover the light receiving surface, with multiple holes
Metal level as mask silicon etching is carried out to form the concave configuration.
The present embodiment is in the case where the light receiving surface side of the first semiconductor regions of existing visible ray photodiode is formed
Recessed structure is so that its is sensitive to UV light.Thus, it is possible to it is purple to be based on conventional semiconductor technology (such as CMOS technology) manufacture
Outer detection photodiode, reduces production cost.Also, due to that can be manufactured using conventional semiconductor technology, this implementation
The photodiode of example can be with other circuit element Integrated manufactures.
PMOS source drain region is also based on using existing standard CMOS process manufacture photodiode on piece.That is, base
P+ heavily doped regions are diffuseed to form in the N traps being formed in P-type silicon substrate and in N traps and forms PN junction.Wherein, P+ heavily doped regions
As the light area of photodiode, with light receiving surface.Multiple concave configurations are formed by P+ heavily doped regions surface
Photodiode sensitive to UV light can be obtained.Fig. 2 is another pole of preferred embodiment photoelectricity two of first embodiment of the invention
The sectional view of pipe.As shown in Fig. 2 photodiode 2 includes silicon base 21 and the first semiconductor region with the first conduction type
Domain 22.First semiconductor regions 22 are formed in silicon base 21.In the present embodiment, the first semiconductor regions 22 are to be formed in silicon
P+ heavily doped regions 22 in the N traps 21a of substrate 21.Wherein, the first semiconductor regions 22 (namely P+ heavily doped region 21b) are in light
Surface side is formed with multiple concave configuration 22a.
Concave configuration 22a can be multiple grooves of parallel or non-parallel setting.Alternately, concave configuration can also be
Multiple pits of light receiving surface side are formed at array way.The pit can be square, circular or other shapes.
Meanwhile, photodiode 2 also includes the second semiconductor regions 23 and first electrode with the second conduction type
24 and second electrode 25.In the present embodiment, the second semiconductor regions 23 are distinguished to be formed in N traps 21a and P+ heavy doping
From the N+ heavily doped regions for setting.First electrode 24 is connected with the first semiconductor regions 21, the semiconductor of second electrode 25 and second
Region 23 connects.The shape of each semiconductor regions and the shape of electrode are similar with Figure 1A, will not be repeated here.
N traps are also based on using existing standard CMOS process manufacture photodiode on piece.That is, being based on P-type silicon
Substrate and the N traps being formed in P-type silicon substrate form PN junction.Wherein N traps are the light area of photodiode, with light table
Face.Photodiode sensitive to UV light can also be obtained by forming multiple concave configurations on N traps surface.Fig. 3 is this hair
The sectional view of the photodiode of bright another preferred embodiment of first embodiment.As shown in figure 3, photodiode 3 includes silicon substrate
Bottom 31 and the first semiconductor regions 32 with the first conduction type.First semiconductor regions 32 are formed in silicon base 31.
In the present embodiment, the first semiconductor regions are the N traps 32 for being formed in silicon base 31.Wherein, the first semiconductor regions 32 (namely P+
Heavily doped region 21b) it is formed with multiple concave configuration 32a in light receiving surface side.
Concave configuration 32a can be multiple grooves of parallel or non-parallel setting.Alternately, concave configuration can also be
Multiple pits of light receiving surface side are formed at array way.The pit can be square, circular or other shapes.
Meanwhile, photodiode 3 also includes the second semiconductor regions 33 and first electrode with the second conduction type
34 and second electrode 35.In the present embodiment, the second semiconductor regions 33 are to be formed in P-type semiconductor substrate and N traps 32
The P+ heavily doped regions of separation.First electrode 34 is connected with the first semiconductor regions 31, the semiconductor region of second electrode 35 and second
Domain 33 connects.The shape of each semiconductor regions and the shape of electrode are similar with Figure 1A, will not be repeated here.
It should be understood that the present embodiment accordingly can also be formed by the corresponding standard semi-conductor processes in N-type silicon base
Photodiode.
As described above, the photodiode of example first embodiment of the invention can manufacture the ultraviolet detector of low cost.
Fig. 4 A are the circuit diagrams of the ultraviolet detector integrated circuit of second embodiment of the invention.As shown in Figure 4 A, ultraviolet detector 4
Including the first photodiode D1 and the second photodiode D2.First photodiode D1 is photoelectricity two sensitive to UV light
Pole pipe, it can be formed as all kinds of forms as described above.Second photodiode D2 is photoelectricity two only sensitive to visible ray
Pole pipe.Due to the photoelectric current sign ultraviolet and the sum of visual intensity of the first photodiode D1 outputs, and the second photoelectricity two
The photoelectric current of pole pipe D2 outputs characterizes the intensity of visible ray.Therefore, by detecting circuit 41 by the first photodiode D1 and
Data signal is converted to after the photoelectric current amplification of two photodiode D2 outputs to subtract each other, can obtain the ginseng for characterizing uitraviolet intensity
Number.The spectral sensitivity after the photoelectric current of the first photodiode D1 and the second photodiode D2 is subtracted each other is shown in Fig. 4 B
Curve.Preferably, detection circuit 41 includes the first amplifier AMP1, the second amplifier AMP2, the first analog-digital converter ADC1, the
Two analog-digital converter ADC2 and subtracter SUB.First amplifier AMP1 is used for the first light to the first photodiode D1 outputs
Electric current is amplified, and is converted into the first signal of amplification.First signal is curtage signal.Second amplifier AMP2
For being amplified to the second photoelectric current that the second photodiode D2 is exported, the secondary signal of amplification is converted into.Second
Signal is curtage signal.First analog-digital converter ADC1 and the second analog-digital converter ADC2 are respectively used to the first signal
The first data signal and the second data signal are converted to secondary signal.Subtracter SUB is used to calculate the first data signal and the
The difference of two digital signal obtains the signal for characterizing uitraviolet intensity.
It should be understood that the detection circuit 41 shown in Fig. 4 A is merely illustrative, those skilled in the art can be any using other
Two circuits of photodiode output current difference can be detected to realize detecting circuit 41.
Fig. 4 C are the structural representations of the ultraviolet detector integrated circuit of second embodiment of the invention.As shown in Figure 4 C, by
Can be manufactured using standard CMOS process in the first photodiode D1 and the second photodiode D2, the integrated electricity of ultraviolet detector
First photodiode D1, the second photodiode D2 and detection circuit 41 on road can be manufactured in same silicon base.Its
In, the first photodiode D1, the second photodiode D2 and detection circuit 41 are respectively formed in different zones in silicon base.Its
In, the first photodiode D1 has the first light receiving surface for exposing, and it is formed with multiple recessed in the first light receiving surface side
Structure.Thus, the first photodiode D1 is simultaneously sensitive to ultraviolet and visible ray.Second photodiode D2 has and first
Photodiode D2 essentially identical configurations, it has the second light receiving surface for exposing, and the second light receiving surface is substantially flat table
Face, in the absence of concave configuration.Thus, the second photodiode D2 is only sensitive to visible ray.Detection circuit 41 is based on CMOS works
The analog to digital hydrid integrated circuit that skill is formed, it is used to obtain the first photodiode D1's and the second photodiode D2
Difference, so as to detect ultraviolet.As described above, detection circuit 41 can use various existing circuit realirations.
It should be understood that the statement " exposing " referred in the present embodiment refers to surface and can expose and be not blocked under light illumination, this
Outer situation is directly exposed to including surface, is also included within surface and transparent layer is set so that surface is not directly exposed to
Outer situation.
Although it should be understood that what is shown in Fig. 4 C is the integrated circuit using N+ heavily doped regions as the first semiconductor regions, showing
Photoelectric diode structure in right Fig. 2 and Fig. 3 can also be applied to the present embodiment.
Thus, the ultraviolet detector integrated circuit of the present embodiment can be manufactured in same silicon base with the CMOS technology of standard
On, low cost, integrated level is high.
Fig. 5 is the flow chart of the manufacture method of the ultraviolet detector integrated circuit of third embodiment of the invention.Such as Fig. 5 institutes
Show, methods described includes:
Step 5100, based on silicon base formed semiconductor structure 60a, semiconductor structure 60a include detection circuit semiconductor
Structure 61, the first photoelectric diode structure 62 and the second photoelectric diode structure 63.Wherein, first photoelectric diode structure 62
The metal level with hole is provided with light receiving surface, with complete metal on the light receiving surface of the second photoelectric diode structure 63
Layer covering.
Preferably, the region that the first photoelectric diode structure 62 and the second photoelectric diode structure 63 take on a silicon substrate
Area is essentially identical.
Because Each part is compatible with the semiconductor technology of standard, therefore, it can based on standard semi-conductor processes same
Above-mentioned semiconductor structure is formed in one silicon base.As shown in Figure 6A, N can be included in detecting circuit structure 61 after step 5100
+ heavily doped region 61a, P+ heavily doped region 61b, polysilicon gate 61c, N trap 61d and metal connecting line 61e.First photoelectric diode structure
62 are used to form photodiode sensitive to UV light.It include the first semiconductor regions 62a, the second semiconductor regions 62b,
First electrode 62c and second electrode 62d, also including covering the metal level 62e of the first semiconductor regions 62a and being arranged at the first half
Insulating barrier 62f between conductive region 62a and metal level 62e.Insulating barrier 62f can be silica.Metal level 62e is formed with
Multiple holes, described hole can be by strip is parallel or less parallel is distributed, or array format multiple it is square, circular or
Other shapes of hole.Second photoelectric diode structure 63 is used to be formed photodiode only sensitive to visible ray, and it includes
First semiconductor regions 63a, the second semiconductor regions 63b, first electrode 63c and second electrode 63d, also including covering the first half
The metal level 63e of the conductive region 63a and insulating barrier 63f being arranged between the first semiconductor regions 63a and metal level 63e.Absolutely
Edge layer 63f can be silica.Metal level 63e intactly covers light area.Thus, in follow-up technological process, the
The region that two photoelectric diode structures 63 are covered by metal level 63e can be protected and is not etched.And due to there is hole, the
The region that one photoelectric diode structure 62 is covered by metal level 62e can be partially etched to form concave configuration, be consequently formed difference
The photodiode of structure.Metal layer material can use aluminium.
Semiconductor structure 60a can also include filling to realize the insulating barrier 64 and passivation layer 65 of planarization.Insulating barrier 64
Silica can be used.
The present embodiment is illustrated as a example by forming the integrated circuit shown in Fig. 4 C.In fig. 6, the first semiconductor regions
62a, 63a are the N+ heavily doped regions being formed in silicon base, and second semiconductor regions 62b, 63b is to be formed in silicon base
P+ heavily doped regions.It should be understood that the manufacture method of the present embodiment can be used for manufacturing the photoelectricity of structure shown in application drawing 2, Fig. 3
The ultraviolet detector integrated circuit of diode.
The light area of step 5200, the first photoelectric diode structure 62 of etching and the second photoelectric diode structure 63, makes
Metal level is obtained to expose.
As shown in Figure 6B, patterned photoresist 66 can be first set and limits the first photoelectric diode structure 62 and second
The light area of photoelectric diode structure 63.
As shown in Figure 6 C, after etching, the passivation layer and insulating barrier of light area are removed.In the first photoelectric diode structure
In 62 light area, the isolation material in the hole of metal level 62e be etched cause hole below the first semiconductor regions
It is exposed.And in the light area of the second photoelectric diode structure 63, metal level 63e is partly exposed, due to metal level 63e
Protection, isolation material below is not etched.Thus, the first semiconductor regions of the second photoelectric diode structure 63 do not reveal
Go out.
Step 5300, silicon etching is carried out as mask using metal level.Thus, it is possible to receiving in the first photoelectric diode structure
Light region forms multiple concave configurations.
Etching in this step can use dry etching, isotropism wet etching or anisotropic wet etch.Fig. 6 D
Show the state after carrying out isotropism wet etching.First semiconductor regions of the second photodiode 63 are due to by metal
Layer 63e protections, so will not be etched.And the first semiconductor regions of the first photodiode 62 are below metal level 62e
Part is exposed, therefore, concave configuration can be formed in corresponding position.
Metal level and the lower section of step 5400, the first photoelectric diode structure 62 of etching and the second photoelectric diode structure 63
Insulating barrier.Thus, the first semiconductor regions of the first photoelectric diode structure 62 and the second photoelectric diode structure 63 are revealed
Go out, as illustrated in fig. 6e.
The present embodiment can also include the photoresist 66 formed in step 5500 (not shown), removal step 5100.
Thus, it is possible to ultraviolet detector integrated circuit is obtained, as fig 6 f illustrates.
Preferably, protective layer, Ran Houjin can also be deposited in the first semiconductor region area deposition antireflection film being exposed
Row scribing is encapsulated.
Thus, the first semiconductor regions of the first photoelectric diode structure are covered by the metal level of hole, by not having
The metal level of hole covers the first semiconductor regions of the second photoelectric diode structure, can be based on standard semi-conductor processes
(such as CMOS technology) is while manufacture ultraviolet detection photodiode and the sensitive photodiode of visible ray, reduce and be produced into
This.
The preferred embodiments of the present invention are the foregoing is only, is not intended to limit the invention, for those skilled in the art
For, the present invention can have various changes and change.It is all any modifications made within spirit and principles of the present invention, equivalent
Replace, improve etc., should be included within the scope of the present invention.
Claims (27)
1. a kind of photodiode, including
Silicon base;
First semiconductor regions, with the first conduction type, are formed in the silicon base, and first semiconductor regions are used for
PN junction is formed, so as to ultraviolet is converted into photoelectric current, the light receiving surface side of first semiconductor regions is with multiple
Recessed structure, the multiple concave configuration is used to reduce the space-charge region of PN junction to the distance on surface, and the multiple recessed
Projection between structure is connected to each other.
2. photodiode according to claim 1, it is characterised in that the photodiode also includes:
Second semiconductor regions, with the second conduction type, the silicon substrate are separately formed at first semiconductor regions
In bottom;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
3. photodiode according to claim 1, it is characterised in that the multiple concave configuration is multiple grooves or many
Individual pit.
4. photodiode according to claim 2, it is characterised in that the silicon base is P-type silicon substrate, described first
Semiconductor regions are N+ heavily doped regions, and second semiconductor regions are P+ heavily doped regions.
5. photodiode according to claim 2, it is characterised in that the silicon base is P-type silicon substrate, described first
Semiconductor regions are N traps, and second semiconductor regions are P+ heavily doped regions.
6. photodiode according to claim 2, it is characterised in that the silicon base is P-type silicon substrate, described first
Semiconductor regions are the P+ heavily doped regions being formed in N traps, and second semiconductor regions are the N+ weights being formed in the N traps
Doped region.
7. a kind of photodiode manufacture method, including:
The photoelectric diode structure sensitive to visible ray is formed on a silicon substrate, and the photoelectric diode structure includes being formed in institute
The first semiconductor regions in silicon base are stated, first semiconductor regions have the first conduction type, first semiconductor
Region is used to form PN junction, so as to ultraviolet is converted into photoelectric current;
Multiple concave configurations are formed in the light receiving surface side of first semiconductor regions, the multiple concave configuration is used to subtract
Projection between the distance on the space-charge region of small PN junction to surface, and the multiple concave configuration is connected to each other.
8. method according to claim 7, it is characterised in that the multiple concave configuration is multiple grooves or multiple recessed
Hole.
9. method according to claim 7, it is characterised in that the light receiving surface one in first semiconductor regions
Side forms multiple concave configurations to be included:
Using cover the light receiving surface, the metal level with multiple holes carries out silicon etching and forms the recessed knot as mask
Structure.
10. method according to claim 7, it is characterised in that the photoelectric diode structure also includes:
Second semiconductor regions, with the second conduction type, the silicon substrate are separately formed at first semiconductor regions
In bottom;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
11. methods according to claim 10, it is characterised in that the silicon base is P-type silicon substrate, described the first half lead
Body region is N+ heavily doped regions, and second semiconductor regions are P+ heavily doped regions.
12. methods according to claim 10, it is characterised in that the silicon base is P-type silicon substrate, described the first half lead
Body region is N traps, and second semiconductor regions are P+ heavily doped regions.
13. methods according to claim 10, it is characterised in that the silicon base is P-type silicon substrate, described the first half lead
Body region is the P+ heavily doped regions being formed in N traps, and second semiconductor regions are the N+ heavy doping being formed in the N traps
Area.
A kind of 14. ultraviolet detector integrated circuits, including:
First photoelectric diode structure, is formed in silicon base, for detecting ultraviolet and visible ray;
Second photoelectric diode structure, including it is formed in the silicon base, the first semiconductor with flat light receiving surface
Region;With
Detection circuit structure, is formed in same silicon base with first photodiode and the second photodiode, is used for
The parameter related to the difference of the photoelectric current that first photodiode and the second photodiode are exported is obtained,
Wherein, first photoelectric diode structure includes:
First semiconductor regions, with the first conduction type, first semiconductor regions are used to form PN junction, so that will be ultraviolet
Line is converted to photoelectric current, and the light receiving surface side of first semiconductor regions has multiple concave configurations, the multiple recessed
The projection that structure is used to reduce between the space-charge region of PN junction to the distance on surface, and the multiple concave configuration connects each other
It is connected together.
15. ultraviolet detector integrated circuits according to claim 14, it is characterised in that first photodiode is also
Including:
Second semiconductor regions, with the second conduction type, the silicon substrate are separately formed at first semiconductor regions
In bottom;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
16. ultraviolet detector integrated circuits according to claim 14, it is characterised in that the multiple concave configuration is many
Individual groove or multiple pits.
17. ultraviolet detector integrated circuits according to claim 15, it is characterised in that the silicon base is P-type silicon base
Bottom, first semiconductor regions are N+ heavily doped regions, and second semiconductor regions are P+ heavily doped regions.
18. ultraviolet detector integrated circuits according to claim 15, it is characterised in that the silicon base is P-type silicon base
Bottom, first semiconductor regions are N traps, and second semiconductor regions are P+ heavily doped regions.
19. ultraviolet detector integrated circuits according to claim 15, it is characterised in that the silicon base is P-type silicon base
Bottom, first semiconductor regions are the P+ heavily doped regions being formed in N traps, and second semiconductor regions are described to be formed in
N+ heavily doped regions in N traps.
20. ultraviolet detector integrated circuits according to claim 14, it is characterised in that the first photodiode knot
Structure and second photoelectric diode structure take identical area in the silicon base.
21. ultraviolet detector integrated circuits according to claim 14, it is characterised in that the detection circuit structure bag
Include:
First amplifier, for being amplified to the first photoelectric current that the first photodiode is exported and is converted to the first of amplification
Signal;
Second amplifier, for being amplified to the second photoelectric current that the second photodiode is exported and is converted to the second of amplification
Signal;
First analog-digital converter, for first signal to be converted into the first data signal;
Second mode converter, for the secondary signal to be converted into the second data signal;
Subtracter, the difference for calculating first data signal and second data signal is obtained and characterizes uitraviolet intensity
Signal.
A kind of 22. manufacture methods of ultraviolet detector integrated circuit, including:
Obtain includes detection circuit semiconductor structure, the first photoelectric diode structure and the second photoelectricity two based on silicon base formation
The semiconductor structure of pole pipe structure, wherein, the light receiving surface of the first photoelectric diode structure is located in the first semiconductor regions, and
And by the metal level covering with multiple holes, the light receiving surface of the second photoelectric diode structure is by the metal level without hole
Covering;
Etch the light area of first photoelectric diode structure and second photoelectric diode structure so that the metal
Layer exposes;
Silicon etching is carried out as mask using metal level;
The metal level and the insulating barrier of lower section of the first photoelectric diode structure and the second photoelectric diode structure are etched,
Wherein, first semiconductor regions are used to form PN junction, so as to ultraviolet is converted into photoelectric current, described the first half
The light receiving surface side of conductive region forms multiple concave configurations, and the multiple concave configuration is used to reduce the space charge of PN junction
Projection between the distance on area to surface, and the multiple concave configuration is connected to each other.
23. methods according to claim 22, it is characterised in that described hole is strip hole or array arranged in parallel
The circular or square hole of arrangement.
24. methods according to claim 22, it is characterised in that first photoelectric diode structure also includes:
Second semiconductor regions, with the second conduction type, the silicon substrate are separately formed at first semiconductor regions
In bottom;
First electrode, is connected with first semiconductor regions;
Second electrode, is connected with second semiconductor regions.
25. methods according to claim 24, it is characterised in that the silicon base is P-type silicon substrate, described the first half lead
Body region is N+ heavily doped regions, and second semiconductor regions are P+ heavily doped regions.
26. methods according to claim 24, it is characterised in that the silicon base is P-type silicon substrate, described the first half lead
Body region is N traps, and second semiconductor regions are P+ heavily doped regions.
27. methods according to claim 24, it is characterised in that the silicon base is P-type silicon substrate, described the first half lead
Body region is the P+ heavily doped regions being formed in N traps, and second semiconductor regions are the N+ heavy doping being formed in the N traps
Area.
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