CN104505410A - Photoelectric diode, ultraviolet detector integrated circuit and manufacturing method thereof - Google Patents
Photoelectric diode, ultraviolet detector integrated circuit and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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Abstract
Disclosed is a photoelectric diode, an ultraviolet detector integrated circuit and a manufacturing method thereof. A concave structure is formed on one side of a light-irradiated surface of a first semiconductor area of the existing visible light photoelectric diode, so as to make the photoelectric diode be sensitive to ultraviolet. Therefore, an ultraviolet detection photoelectric diode can be manufactured based on a standard semiconductor technology (such as the CMOS technology), thereby reducing the manufacturing cost. Additionally, due to the standard semiconductor technology can be employed for manufacturing, other circuit elements can be integrated therewith in order to manufacture an ultraviolet detector integrated circuit.
Description
Technical field
The present invention relates to semiconductor technology, be specifically related to a kind of photodiode, ultraviolet detector integrated circuit and manufacture method thereof.
Background technology
In the prior art, ultraviolet detector adopts the special process manufacture incompatible with integrated circuit mostly, and testing circuit cannot be on the same chip integrated, and cost is higher.Meanwhile, adopt the ultraviolet detector of the manufacture technics of ic process compatibility to need to use expensive SOI silicon wafer (Silicon-On-Insulator, the silicon in dielectric substrate), or need plating multilayer dielectricity filter coating, its cost is higher.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of photodiode, ultraviolet detector integrated circuit and manufacture method thereof, make can manufacture semiconductor ultraviolet detector based on standard semi-conductor processes, reduce manufacturing cost.
First aspect, provides a kind of photodiode, comprises
Silicon base;
First semiconductor regions, has the first conduction type, is formed in described silicon base, has multiple concave configuration in light receiving surface side.
Preferably, described photodiode also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
Preferably, described multiple concave configuration is multiple groove arranged in parallel or multiple pits of array format.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
Second aspect, a kind of photodiode manufacture method, comprising:
Form the photoelectric diode structure to visible ray sensitivity on a silicon substrate, described photoelectric diode structure comprises the first semiconductor regions be formed in described silicon base, and described first semiconductor regions has the first conduction type;
Multiple concave configuration is formed in the light receiving surface side of described first semiconductor regions.
Preferably, described multiple concave configuration is multiple groove or multiple pit.
Preferably, the described light receiving surface side at described first semiconductor regions forms multiple concave configuration and comprises:
Using cover described light receiving surface, the metal level with multiple hole carries out silicon etching as mask and forms described concave configuration.
It is characterized in that, described photoelectric diode structure also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
The third aspect, provides a kind of ultraviolet detector integrated circuit, comprising:
First photoelectric diode structure, is formed in silicon base, for detecting ultraviolet and visible ray;
Second photoelectric diode structure, comprises and is formed at the first semiconductor regions in described silicon base, that have smooth light receiving surface; With
Testing circuit structure, is formed in same silicon base with described first photodiode and the second photodiode, for obtaining the parameter relevant to the difference of the photoelectric current that described first photodiode and the second photodiode export.
Preferably, described first photoelectric diode structure comprises:
First semiconductor regions, has the first conduction type, has multiple concave configuration in light receiving surface side.
Preferably, described first photodiode also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
Preferably, described multiple concave configuration is multiple groove or multiple pit.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
Preferably, described first photoelectric diode structure and described second photoelectric diode structure take identical area in described silicon base.
Preferably, described testing circuit structure comprises:
First amplifier, amplifies for the first photoelectric current exported the first photodiode and is converted to the first signal of amplification;
Second amplifier, amplifies for the second photoelectric current exported the second photodiode and is converted to the secondary signal of amplification;
First analog to digital converter, for being converted to the first digital signal by described first signal;
Second mode converter, for being converted to the second digital signal by described secondary signal;
Subtracter, obtains for the difference calculating described first digital signal and described second digital signal the signal characterizing uitraviolet intensity.
Fourth aspect, provides a kind of manufacture method of ultraviolet detector integrated circuit, comprising:
Obtain the semiconductor structure comprising testing circuit semiconductor structure, the first photoelectric diode structure and the second photoelectric diode structure formed based on silicon base, wherein, the light receiving surface of the first photoelectric diode structure is covered by the metal level with multiple hole, and the light receiving surface of the second photoelectric diode structure is covered by the not pertusate metal level of tool;
Etch the light area of described first photoelectric diode structure and described second photoelectric diode structure, described metal level is exposed;
Silicon etching is carried out using metal level as mask;
Etch the metal level of the first photoelectric diode structure and the second photoelectric diode structure and the insulating barrier of below.
Preferably, described hole is the circle of strip hole arranged in parallel or array arrangement or square hole.
Preferably, described first photoelectric diode structure also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
Preferably, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
By forming multiple concave configuration existing based on the N polar region in the diode structure of general semiconductor technology or P polar region, make in concave configuration region, the distance of the empty charged region of silicon chip surface distance PN junction is nearer, thus makes this diode effectively can detect ultraviolet.This photodiode and existing structure can be formed in same silicon base for the diode and testing circuit detecting visible ray, realize ultraviolet detection.Structure of the present invention is simple, and cost is low.
Accompanying drawing explanation
By referring to the description of accompanying drawing to the embodiment of the present invention, above-mentioned and other objects, features and advantages of the present invention will be more clear, in the accompanying drawings:
Figure 1A is the vertical view of the photodiode of first embodiment of the invention;
Figure 1B is the sectional view of the photodiode of first embodiment of the invention;
Fig. 1 C is the sectional view of the photodiode for detecting visible ray;
Fig. 1 D is the flow chart of the manufacture method of the photodiode of first embodiment of the invention;
Fig. 2 is the sectional view of the photodiode of another optimal way of first embodiment of the invention;
Fig. 3 is the sectional view of the photodiode of another optimal way of first embodiment of the invention;
Fig. 4 A is the circuit diagram of the ultraviolet detector integrated circuit of second embodiment of the invention;
Fig. 4 B is the spectral response curve figure of the ultraviolet detector of second embodiment of the invention;
Fig. 4 C is the structural representation of the ultraviolet detector integrated circuit of second embodiment of the invention;
Fig. 5 is the flow chart of the manufacture method of the ultraviolet detector integrated circuit of second embodiment of the invention;
Fig. 6 A-Fig. 6 F is the sectional view of ultraviolet detector integrated circuit in manufacture method different phase of second embodiment of the invention.
Embodiment
In more detail the present invention is described hereinafter with reference to accompanying drawing.In various figures, identical element adopts similar Reference numeral to represent.For the sake of clarity, the various piece in accompanying drawing is not drawn in proportion.In addition, may some known part not shown.For brevity, in a width figure, the semiconductor structure obtained after several step can be described.
Be to be understood that, when the structure of outlines device, when one deck, region are called be positioned at another layer, another region " above " or " top " time, can refer to be located immediately at another layer, another over, or itself and another layer, also comprise other layer or region between another region.Further, if overturn by device, this one deck, a region will be positioned at another layer, another region " below " or " below ".
If in order to describe the situation being located immediately at another layer, another over, will adopt herein " directly exist ... above " or " ... above and adjoin with it " form of presentation.
In this application, term " semiconductor structure " refers to, in the general designation manufacturing the whole semiconductor structure formed in each step of semiconductor device, comprise all layers or region that have been formed.Describe hereinafter many specific details of the present invention, the structure of such as device, material, size, treatment process and technology, more clearly to understand the present invention.But just as the skilled person will understand like that, the present invention can be realized not in accordance with these specific details.
Unless particularly pointed out hereinafter, the various piece of semiconductor device can be made up of the known material of those skilled in the art.
Unless the context clearly requires otherwise, similar words such as " comprising ", " comprising " otherwise in whole specification and claims should be interpreted as the implication that comprises instead of exclusive or exhaustive implication; That is, be the implication of " including but not limited to ".
In describing the invention, it is to be appreciated that term " first ", " second " etc. are only for describing object, and instruction or hint relative importance can not be interpreted as.In addition, in describing the invention, except as otherwise noted, the implication of " multiple " is two or more.
The present invention can present in a variety of manners, below will describe some of them example.
Figure 1A is the vertical view of the photodiode of first embodiment of the invention.Figure 1B is the sectional view of the photodiode of first embodiment of the invention.The semiconductor structure of the photodiode of the present embodiment is described below in conjunction with Figure 1A and Figure 1B.Photodiode 1 comprises silicon base 11, has the first semiconductor regions 12 of the first conduction type.First semiconductor regions 12 is formed in silicon base 11.Preferably, the first semiconductor regions 12 by spreading N-type or p type impurity formation in silicon base 11.Preferably, the first semiconductor regions 12 is formed as rectangle.Wherein, the first semiconductor regions 12 is formed with multiple concave configuration 12a in light receiving surface side.
In Figure 1A and Figure 1B, concave configuration 12a is multiple grooves of parallel or non-parallel setting.Alternately, concave configuration 12a can also be the multiple pits being formed at light receiving surface side with array way.Described pit can be square, circular or other arbitrary shape.
Photodiode 1 can also comprise second semiconductor regions 13, first electrode 14 and second electrode 15 with the second conduction type.Preferably, the second semiconductor regions 13 is formed as the open annular around the first semiconductor regions 12.First electrode 14 is arranged on the first semiconductor regions, is connected with the first semiconductor regions 12.Preferably, the first electrode 14 is formed as ring-type.Second electrode 15 is arranged on the second semiconductor regions, is connected with the second semiconductor regions 13.Preferably, the second electrode 15 is set to the shape identical with the second semiconductor regions.
First conduction type is the one in N-type or P type, and the second conduction type is the another kind in N-type or P type.
First semiconductor regions 12 with the first conduction type and silicon base 11 or the semiconductor regions being formed in other type in silicon base 11 form the PN junction of photodiode.First semiconductor regions 12 receives visible ray and ultraviolet at sensitive surface, produces charge carrier thus and produces photoelectric current by the space charge region of PN junction, realize visible ray and UV detection.
Fig. 1 C is the sectional view of the photodiode for detecting visible ray.Photodiode 1 ' in Fig. 1 C is substantially identical with the photoelectric diode structure shown in Figure 1B.Both differences are that the sensitive surface of first semiconductor regions of Fig. 1 C is smooth, do not form the concave configuration shown in Figure 1B.
In the present embodiment, silicon base 11 is P-type silicon substrate, and the first semiconductor regions 12 is N+ heavily doped region, and it can utilize N+ particle to diffuse to form in presumptive area silicon base.
In the present embodiment, CMOS (Complementary Metal Oxide Semiconductor, complementary metal oxide semiconductors (CMOS)) technique is utilized to make for detecting ultraviolet diode semiconductor structure.Particularly, it can utilize the source-drain area of the nmos device made based on CMOS technology to be formed.
According to the absorption characteristic of light in silicon, the wavelength of light is shorter, then its degree of depth penetrated in silicon is more shallow; Wavelength is longer, then penetration depth is darker.Ultraviolet wavelength ratio is shorter, and therefore, ultraviolet most of photon is absorbed and is converted into photo-generated carrier (electronics, hole) or heat energy in first semiconductor regions very thin surface one deck of silicon base.In addition, according to the characteristic of photodiode, the photo-generated carrier only produced near (in Figure 1B and Fig. 1 C sectional view between two dotted lines) or space charge region in the space charge region of PN junction could form effective photoelectric current and export to testing circuit.In the photodiode 1 ' of the detection visible ray shown in Fig. 1 C, space charge region distance silicon chip surface is comparatively far away, and in main one deck very thin at the first semiconductor regions of photo-generated carrier that ultraviolet produces, cannot form effective photoelectric current, therefore, it is only responsive to visible ray.And pass through in the multiple concave configuration of the surface etch of common photodiode, in the shortening space charge region, bottom of concave configuration and the spacing of silicon chip surface, more ultraviolet can be allowed to arrive space charge region, and the photo-generated carrier that such ultraviolet produces just more can form effective photoelectric current and export.Therefore, the 1 pair of ultraviolet of the photodiode shown in Figure 1A and Figure 1B is more responsive.
Meanwhile, namely there is recessed part in the first semiconductor regions of photodiode 1, there is again the part carried over that some are not etched, and recessed position is used for being converted to photoelectric current by more effective for ultraviolet; Not recessed part can be used for collecting visible photo-generated carrier, and as the path of the photoelectric current of visible ray, the place of all these projections all connects together, and the N pole eventually through photodiode exports.Therefore, the photoelectric current that photodiode 1 exports can characterize ultraviolet intensity and visual intensity sum.
By asking for the difference of the output of photodiode 1 and photodiode 1 ', the detection to uitraviolet intensity can be realized.
Fig. 1 D is the flow chart of the manufacture method of the photodiode of first embodiment of the invention.As shown in figure ip, described method comprises:
Step 1100, form photoelectric diode structure to visible ray sensitivity on a silicon substrate.
This photoelectric diode structure is any existing photoelectric diode structure prepared based on standard semi-conductor processes.
Step 1200, form multiple concave configuration in the light receiving surface side of described first semiconductor regions.
Preferably, described multiple concave configuration is multiple groove or multiple pit.
In one preferred embodiment, step 1200 can using cover described light receiving surface, the metal level with multiple hole carries out silicon etching to form described concave configuration as mask.
The present embodiment forms concave configuration in the light receiving surface side of the first semiconductor regions of existing visible ray photodiode thus makes it to ultraviolet-sensitive.Thus, ultraviolet detection photodiode can be manufactured based on conventional semiconductor technology (such as CMOS technology), reduce production cost.Further, due to conventional semiconductor technology manufacture can be adopted, the photodiode of the present embodiment can with other circuit element Integrated manufacture.
Use existing standard CMOS process can also manufacture photodiode on sheet based on PMOS source drain region.Also namely, PN junction is formed based on being formed in the suprabasil N trap of P-type silicon and diffuseing to form P+ heavily doped region in N trap.Wherein, P+ heavily doped region, as the light area of photodiode, has light receiving surface.Also can obtain ultraviosensitive photodiode by forming multiple concave configuration on surface, P+ heavily doped region.Fig. 2 is the sectional view of another optimal way photodiode of first embodiment of the invention.As shown in Figure 2, photodiode 2 comprises silicon base 21 and has the first semiconductor regions 22 of the first conduction type.First semiconductor regions 22 is formed in silicon base 21.In the present embodiment, the first semiconductor regions 22 is for being formed in the P+ heavily doped region 22 in the N trap 21a of silicon base 21.Wherein, the first semiconductor regions 22 (being also P+ heavily doped region 21b) is formed with multiple concave configuration 22a in light receiving surface side.
Concave configuration 22a can be multiple grooves of parallel or non-parallel setting.Alternately, concave configuration can also be the multiple pits being formed at light receiving surface side with array way.Described pit can be square, circular or other shape.
Meanwhile, photodiode 2 also comprises second semiconductor regions 23 and first electrode 24 and second electrode 25 with the second conduction type.In the present embodiment, the second semiconductor regions 23 is for being formed in N trap 21a, be separated setting with P+ heavily doped region N+ heavily doped region.First electrode 24 is connected with the first semiconductor regions 21, and the second electrode 25 is connected with the second semiconductor regions 23.Similar in the shape of each semiconductor regions and the shape of electrode and Figure 1A, do not repeat them here.
Use existing standard CMOS process can also manufacture photodiode on sheet based on N trap.Also namely, based on P-type silicon substrate be formed in the suprabasil N trap of P-type silicon and form PN junction.Wherein N trap is the light area of photodiode, has light receiving surface.Also can obtain ultraviosensitive photodiode by forming multiple concave configuration on N trap surface.Fig. 3 is the sectional view of the photodiode of another optimal way of first embodiment of the invention.As shown in Figure 3, photodiode 3 comprises silicon base 31 and has the first semiconductor regions 32 of the first conduction type.First semiconductor regions 32 is formed in silicon base 31.In the present embodiment, the first semiconductor regions is the N trap 32 being formed in silicon base 31.Wherein, the first semiconductor regions 32 (being also P+ heavily doped region 21b) is formed with multiple concave configuration 32a in light receiving surface side.
Concave configuration 32a can be multiple grooves of parallel or non-parallel setting.Alternately, concave configuration can also be the multiple pits being formed at light receiving surface side with array way.Described pit can be square, circular or other shape.
Meanwhile, photodiode 3 also comprises second semiconductor regions 33 and first electrode 34 and second electrode 35 with the second conduction type.In the present embodiment, the second semiconductor regions 33 is for being formed in P+ heavily doped region in P type semiconductor substrate, that be separated with N trap 32.First electrode 34 is connected with the first semiconductor regions 31, and the second electrode 35 is connected with the second semiconductor regions 33.Similar in the shape of each semiconductor regions and the shape of electrode and Figure 1A, do not repeat them here.
Should be understood that the photodiode that also can be formed the present embodiment accordingly by standard semi-conductor processes corresponding in N-type silicon base.
As mentioned above, the photodiode of example first embodiment of the invention can manufacture the ultraviolet detector of low cost.Fig. 4 A is the circuit diagram of the ultraviolet detector integrated circuit of second embodiment of the invention.As shown in Figure 4 A, ultraviolet detector 4 comprises the first photodiode D1 and the second photodiode D2.First photodiode D1 is to ultraviosensitive photodiode, and it can be formed as all kinds of form as above.Second photodiode D2 is only to the photodiode of visible ray sensitivity.The photoelectric current exported due to the first photodiode D1 characterize ultraviolet and visual intensity and, and the photoelectric current that the second photodiode D2 exports characterizes the intensity of visible ray.Therefore, be converted to digital signal after the photoelectric current amplification exported by the first photodiode D1 and the second photodiode D2 by testing circuit 41 and subtract each other, the parameter characterizing uitraviolet intensity can be obtained.Spectral response curve after being subtracted each other by the photoelectric current of the first photodiode D1 and the second photodiode D2 has been shown in Fig. 4 B.Preferably, testing circuit 41 comprises the first amplifier AMP1, the second amplifier AMP2, the first analog to digital converter ADC1, the second analog to digital converter ADC2 and subtracter SUB.The first photoelectric current that first amplifier AMP1 is used for the first photodiode D1 exports amplifies, and is converted into the first signal of amplification.First signal is curtage signal.The second photoelectric current that second amplifier AMP2 is used for the second photodiode D2 exports amplifies, and is converted into the secondary signal of amplification.Secondary signal is curtage signal.First analog to digital converter ADC1 and the second analog to digital converter ADC2 is respectively used to the first signal and secondary signal to be converted to the first digital signal and the second digital signal.Subtracter SUB obtains for the difference calculating the first digital signal and the second digital signal the signal characterizing uitraviolet intensity.
Should be understood that the testing circuit 41 shown in Fig. 4 A is only example, those skilled in the art can adopt other any circuit that can detect two photodiode output current differences to realize testing circuit 41.
Fig. 4 C is the structural representation of the ultraviolet detector integrated circuit of second embodiment of the invention.As shown in Figure 4 C, because the first photodiode D1 and the second photodiode D2 can adopt standard CMOS process manufacture, the first photodiode D1, the second photodiode D2 of ultraviolet detector integrated circuit and testing circuit 41 can be manufactured in same silicon base.Wherein, the first photodiode D1, the second photodiode D2 and testing circuit 41 are formed at zones of different in silicon base respectively.Wherein, the first photodiode D1 has the first light receiving surface exposed, and it is formed with multiple concave configuration in the first light receiving surface side.Thus, the first photodiode D1 is simultaneously to ultraviolet and visible ray sensitivity.Second photodiode D2 has the structure substantially identical with the first photodiode D2, and it has the second light receiving surface exposed, and the second light receiving surface is substantially flat surface, there is not concave configuration.Thus, the second photodiode D2 is only responsive to visible ray.Testing circuit 41 is the analog to digital hybrid integrated circuit formed based on CMOS technology, and it is for obtaining the difference of the first photodiode D1 and the second photodiode D2, thus detects ultraviolet.As mentioned above, testing circuit 41 can adopt various existing circuit realiration.
Should be understood that the statement mentioned in the present embodiment " is exposed " to refer to that surface can expose and be not blocked under light illumination, this comprises surface and is directly exposed to outer situation, is also included within and arranges transparent layer on the surface, makes surface not be directly exposed to outer situation.
Although should be understood that shown in Fig. 4 C to be integrated circuit using N+ heavily doped region as the first semiconductor regions, the photoelectric diode structure in obvious Fig. 2 and Fig. 3 also can be applied to the present embodiment.
Thus, the ultraviolet detector integrated circuit of the present embodiment can be manufactured in same silicon base with the CMOS technology of standard, and cost is low, and integrated level is high.
Fig. 5 is the flow chart of the manufacture method of the ultraviolet detector integrated circuit of third embodiment of the invention.As shown in Figure 5, described method comprises:
Step 5100, form semiconductor structure 60a based on silicon base, semiconductor structure 60a comprises testing circuit semiconductor structure 61, first photoelectric diode structure 62 and the second photoelectric diode structure 63.Wherein, the light receiving surface of the first photoelectric diode structure 62 is provided with the pertusate metal level of tool, the light receiving surface of the second photoelectric diode structure 63 covers with complete metal level.
Preferably, the region area that takies on a silicon substrate of the first photoelectric diode structure 62 and the second photoelectric diode structure 63 is substantially identical.
Because the semiconductor technology of Each part and standard is compatible, therefore, above-mentioned semiconductor structure can be formed based on standard semi-conductor processes in same silicon base.As shown in Figure 6A, after step 5100,61a, P+ heavily doped region, N+ heavily doped region 61b, polysilicon gate 61c, N trap 61d and metal connecting line 61e can be comprised in testing circuit structure 61.First photoelectric diode structure 62 is for the formation of to ultraviosensitive photodiode.It comprises the first semiconductor regions 62a, the second semiconductor regions 62b, the first electrode 62c and the second electrode 62d, the metal level 62e also comprising covering first semiconductor regions 62a and the insulating barrier 62f be arranged between the first semiconductor regions 62a and metal level 62e.Insulating barrier 62f can be silicon dioxide.Metal level 62e is formed with multiple hole, and described hole can the parallel or less parallel distribution by strip, also can be the hole of multiple square, the circle of array format or other shape.Second photoelectric diode structure 63 is for the formation of only to the photodiode of visible ray sensitivity, it comprises the first semiconductor regions 63a, the second semiconductor regions 63b, the first electrode 63c and the second electrode 63d, the metal level 63e also comprising covering first semiconductor regions 63a and the insulating barrier 63f be arranged between the first semiconductor regions 63a and metal level 63e.Insulating barrier 63f can be silicon dioxide.Metal level 63e intactly covers light area.Thus, in follow-up technological process, the second photoelectric diode structure 63 is covered, typically with metal layers the region that 63e covers can be protected and be not etched.And owing to there is hole, the region that the first photoelectric diode structure 62 is covered, typically with metal layers 62e covering can be partially etched formation concave configuration, form the photodiode of different structure thus.Metal layer material can adopt aluminium.
Semiconductor structure 60a can also comprise filling with the insulating barrier 64 and the passivation layer 65 that realize planarization.Insulating barrier 64 can adopt silicon dioxide.
The present embodiment is described to form the integrated circuit shown in Fig. 4 C.In fig. 6, first semiconductor regions 62a, 63a is the N+ heavily doped region be formed in silicon base, and second semiconductor regions 62b, 63b is the P+ heavily doped region be formed in silicon base.Should be understood that the manufacture method of the present embodiment also may be used for the ultraviolet detector integrated circuit of the photodiode manufacturing structure shown in application drawing 2, Fig. 3.
Step 5200, etch the light area of the first photoelectric diode structure 62 and the second photoelectric diode structure 63, metal level is exposed.
As shown in Figure 6B, first the light area that patterned photoresist 66 limits the first photoelectric diode structure 62 and the second photoelectric diode structure 63 can be set.
As shown in Figure 6 C, after etching, passivation layer and the insulating barrier of light area are removed.In the light area of the first photoelectric diode structure 62, the isolation material in the hole of metal level 62e is etched and the first semiconductor regions below hole is exposed.And in the light area of the second photoelectric diode structure 63, metal level 63e is partly exposed, due to the protection of metal level 63e, the isolation material below it is not etched.Thus, the first semiconductor regions of the second photoelectric diode structure 63 does not expose.
Step 5300, carry out silicon etching using metal level as mask.Thus, multiple concave configuration can be formed in the light area of the first photoelectric diode structure.
Etching in this step can use dry etching, isotropism wet etching or anisotropic wet etch.Fig. 6 D shows the state after carrying out isotropism wet etching.First semiconductor regions of the second photodiode 63 is protected, so can not be etched owing to being covered, typically with metal layers 63e.And the part of the first semiconductor regions of the first photodiode 62 below metal level 62e is exposed, therefore, concave configuration can be formed in corresponding position.
Step 5400, etch the first photoelectric diode structure 62 and the metal level of the second photoelectric diode structure 63 and the insulating barrier of below.Thus, the first semiconductor regions of the first photoelectric diode structure 62 and the second photoelectric diode structure 63 is exposed, as illustrated in fig. 6e.
The present embodiment can also comprise the photoresist 66 formed in step 5500 (not shown), removal step 5100.
Thus, ultraviolet detector integrated circuit can be obtained, as fig 6 f illustrates.
Preferably, can also by the first semiconductor region area deposition antireflection film exposed, Deposition of protective layer, then carries out scribing encapsulation.
Thus, the first semiconductor regions of the first photoelectric diode structure is covered by pertusate metal level, by the first semiconductor regions not having pertusate metal level to cover the second photoelectric diode structure, the photodiode of ultraviolet detection photodiode and visible ray sensitivity can be manufactured based on standard semi-conductor processes (such as CMOS technology) simultaneously, reduce production cost.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, to those skilled in the art, the present invention can have various change and change.All do within spirit of the present invention and principle any amendment, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (28)
1. a photodiode, comprises
Silicon base;
First semiconductor regions, has the first conduction type, is formed in described silicon base, has multiple concave configuration in light receiving surface side.
2. photodiode according to claim 1, is characterized in that, described photodiode also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
3. photodiode according to claim 1, is characterized in that, described multiple concave configuration is multiple groove or multiple pit.
4. photodiode according to claim 2, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
5. photodiode according to claim 2, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
6. photodiode according to claim 2, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
7. a photodiode manufacture method, comprising:
Form the photoelectric diode structure to visible ray sensitivity on a silicon substrate, described photoelectric diode structure comprises the first semiconductor regions be formed in described silicon base, and described first semiconductor regions has the first conduction type;
Multiple concave configuration is formed in the light receiving surface side of described first semiconductor regions.
8. method according to claim 7, is characterized in that, described multiple concave configuration is multiple groove or multiple pit.
9. method according to claim 7, is characterized in that, the described light receiving surface side at described first semiconductor regions forms multiple concave configuration and comprises:
Using cover described light receiving surface, the metal level with multiple hole carries out silicon etching as mask and forms described concave configuration.
10. method according to claim 7, is characterized in that, described photoelectric diode structure also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
11. methods according to claim 10, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
12. methods according to claim 10, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
13. methods according to claim 10, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
14. 1 kinds of ultraviolet detector integrated circuits, comprising:
First photoelectric diode structure, is formed in silicon base, for detecting ultraviolet and visible ray;
Second photoelectric diode structure, comprises and is formed at the first semiconductor regions in described silicon base, that have smooth light receiving surface; With
Testing circuit structure, is formed in same silicon base with described first photodiode and the second photodiode, for obtaining the parameter relevant to the difference of the photoelectric current that described first photodiode and the second photodiode export.
15. ultraviolet detector integrated circuits according to claim 14, is characterized in that, described first photoelectric diode structure comprises:
First semiconductor regions, has the first conduction type, has multiple concave configuration in light receiving surface side.
16. ultraviolet detector integrated circuits according to claim 15, is characterized in that, described first photodiode also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
17. ultraviolet detector integrated circuits according to claim 15, is characterized in that, described multiple concave configuration is multiple groove or multiple pit.
18. ultraviolet detector integrated circuits according to claim 16, it is characterized in that, described silicon base is P-type silicon substrate, described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
19. ultraviolet detector integrated circuits according to claim 16, it is characterized in that, described silicon base is P-type silicon substrate, described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
20. ultraviolet detector integrated circuits according to claim 16, it is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
21. ultraviolet detector integrated circuits according to claim 14, is characterized in that, described first photoelectric diode structure and described second photoelectric diode structure take identical area in described silicon base.
22. ultraviolet detector integrated circuits according to claim 14, is characterized in that, described testing circuit structure comprises:
First amplifier, amplifies for the first photoelectric current exported the first photodiode and is converted to the first signal of amplification;
Second amplifier, amplifies for the second photoelectric current exported the second photodiode and is converted to the secondary signal of amplification;
First analog to digital converter, for being converted to the first digital signal by described first signal;
Second mode converter, for being converted to the second digital signal by described secondary signal;
Subtracter, obtains for the difference calculating described first digital signal and described second digital signal the signal characterizing uitraviolet intensity.
The manufacture method of 23. 1 kinds of ultraviolet detector integrated circuits, comprising:
Obtain the semiconductor structure comprising testing circuit semiconductor structure, the first photoelectric diode structure and the second photoelectric diode structure formed based on silicon base, wherein, the light receiving surface of the first photoelectric diode structure is covered by the metal level with multiple hole, and the light receiving surface of the second photoelectric diode structure is covered by the not pertusate metal level of tool;
Etch the light area of described first photoelectric diode structure and described second photoelectric diode structure, described metal level is exposed;
Silicon etching is carried out using metal level as mask;
Etch the metal level of the first photoelectric diode structure and the second photoelectric diode structure and the insulating barrier of below.
24. methods according to claim 23, is characterized in that, described hole is the circle of strip hole arranged in parallel or array arrangement or square hole.
25. methods according to claim 23, is characterized in that, described first photoelectric diode structure also comprises:
Second semiconductor regions, has the second conduction type, is formed in described silicon base discretely with described first semiconductor regions;
First electrode, is connected with described first semiconductor regions;
Second electrode, is connected with described second semiconductor regions.
26. methods according to claim 25, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is N+ heavily doped region, and described second semiconductor regions is P+ heavily doped region.
27. methods according to claim 25, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is N trap, and described second semiconductor regions is P+ heavily doped region.
28. methods according to claim 25, is characterized in that, described silicon base is P-type silicon substrate, and described first semiconductor regions is the P+ heavily doped region be formed in N trap, and described second semiconductor regions is be formed in the N+ heavily doped region in described N trap.
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| CN106952968A (en) * | 2017-04-26 | 2017-07-14 | 黄晓敏 | Visible ray and ultraviolet selective light electric explorer |
| WO2017190392A1 (en) * | 2016-05-05 | 2017-11-09 | 李成 | Single-chip integrated ultraviolet focal planar device and preparation method therefor |
| CN109148640A (en) * | 2018-09-28 | 2019-01-04 | 河南大学 | A kind of porous active layer field-effect ultraviolet detector and preparation method thereof |
| CN110224038A (en) * | 2018-03-02 | 2019-09-10 | 中芯国际集成电路制造(上海)有限公司 | Photodiode and forming method thereof |
| CN113990983A (en) * | 2021-10-25 | 2022-01-28 | 西安微电子技术研究所 | Photosensitive diode with strong light absorption capacity and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113990983A (en) * | 2021-10-25 | 2022-01-28 | 西安微电子技术研究所 | Photosensitive diode with strong light absorption capacity and preparation method thereof |
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