CN104504209B - A kind of PHY characteristic Simulations method and system - Google Patents
A kind of PHY characteristic Simulations method and system Download PDFInfo
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- CN104504209B CN104504209B CN201410838130.2A CN201410838130A CN104504209B CN 104504209 B CN104504209 B CN 104504209B CN 201410838130 A CN201410838130 A CN 201410838130A CN 104504209 B CN104504209 B CN 104504209B
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Abstract
The invention discloses a kind of physical layer (PHY) characteristic Simulation method and system.The above method comprises the following steps:Configure SBus buses;After the completion of the SBus bus configurations, PHY is configured;After the SBus buses and the PHY are configured correctly, the configuration information of the PHY is transmitted to the PHY;Configure and verify the characteristic of the PHY.PHY characteristic Simulations method and system disclosed by the invention, can more effectively carry out the property verification of PHY, reduce proving period, and being capable of control cost.
Description
Technical field
The present invention relates to chip design and verification field, more particularly to a kind of PHY characteristic Simulations method and system.
Background technology
Higher and higher with the integrated level of chip, design scale is increasing, and the difficulty of verification is also higher and higher.Wherein,
One principal element is exactly that proving period is increasingly longer, in order to solve this problem, is also occurred in succession such as using emulation speed
The technology such as faster software, hardware-accelerated is spent to improve simulation velocity, shorten proving period.But the introduction of new technology can make
Into the rising of cost.
The content of the invention
The present invention provides a kind of PHY characteristic Simulations method and system, can more effectively carry out the property verification of PHY, subtract
Few proving period, and being capable of control cost.
To solve the above-mentioned problems, the present invention provides a kind of physical layer (PHY) characteristic Simulation method, comprises the following steps:
Configure SBus buses;After the completion of the SBus bus configurations, PHY is configured;The SBus buses and the PHY are configured correctly
Afterwards, the configuration information of the PHY is transmitted to the PHY;Configure and verify the characteristic of the PHY.
Further, the configuration SBus buses include:The sequential of SBus buses is configured, which meets SBus buses pair
The requirement of sequential, then the SBus bus configurations are correct.
Further, after the completion of the SBus bus configurations, configuration PHY includes:After the SBus bus configurations are completed,
The state machine of the PHY is configured by Sbus orders, if the state machine of the PHY redirects normally, the PHY configurations are correct.
Further, after the SBus buses and the PHY are configured correctly, the configuration information of the PHY is transmitted to
The PHY includes:After the SBus buses and the PHY are configured correctly, match somebody with somebody confidence described in by data processing (DP) module
Breath is input in SBus modules, is then identified the configuration information by the SBus modules and is configured the PHY.
The present invention also provides a kind of PHY characteristic Simulations system, including:SBus modules, PHY, data processing (DP) module with
And simulation model.The SBus modules, for configuring SBus buses;The SBus modules, in the SBus bus configurations
After the completion of, configure the PHY;The DP modules, described in after the SBus buses and the PHY configure correctly, inciting somebody to action
The configuration information of PHY is transmitted to the PHY;The DP modules and the simulation model, for configuring and verifying the spy of the PHY
Property.
Further, the SBus modules, for during the configuration SBus buses, configuring the SBus buses
Sequential, which meets requirement of the SBus buses to sequential, then the SBus bus configurations are correct.
Further, the SBus modules, for after SBus bus configurations completion, being configured by Sbus orders
The state machine of the PHY, if the state machine of the PHY redirects normally, the PHY configurations are correct.
Further, the DP modules, for the SBus buses and the PHY configure it is correct after, the PHY
Configuration information be input in the SBus modules, the configuration information is then identified and described in configuring as the SBus modules
PHY。
PHY characteristic Simulations are divided into staged according to the characteristic Simulation feature of PHY by the present invention, make it have emulation week
The characteristics of phase is short, and simulation efficiency is high, while can avoid the problem that because new technology draws and in turn results in cost increase.
Brief description of the drawings
Fig. 1 show the flow chart of the PHY characteristic Simulation methods of present pre-ferred embodiments offer;
Fig. 2 show the schematic diagram of the PHY characteristic Simulation systems of present pre-ferred embodiments offer;
Fig. 3 show the schematic diagram of the difficulty of PHY characteristic Simulations and the relation of simulation time.
Embodiment
As shown in Figure 1, present pre-ferred embodiments provide a kind of PHY characteristic Simulations method, comprise the following steps:S01:Match somebody with somebody
Put SBus buses;S02:After the completion of the SBus bus configurations, PHY is configured;S03:The SBus buses and the PHY are configured
After correct, the configuration information of the PHY is transmitted to the PHY;S04:Configure and verify the characteristic of the PHY.
Present pre-ferred embodiments also provide a kind of PHY characteristic Simulations system, including:SBus modules, PHY, data processing
(Data Processing, DP) module and simulation model.The SBus modules, for configuring SBus buses;The SBus moulds
Block, for after the completion of the SBus bus configurations, configuring the PHY;The DP modules, in the SBus buses and institute
State PHY configure it is correct after, the configuration information of the PHY is transmitted to the PHY;The DP modules and the emulation module,
For configuring and verifying the characteristic of the PHY.
Referring to Fig. 2 and Fig. 3 the present invention will be described in detail preferred embodiment.
Fig. 2 show the schematic diagram of the PHY characteristic Simulation systems of present pre-ferred embodiments offer.As shown in Fig. 2, this hair
The PHY characteristic Simulations system that bright preferred embodiment provides includes SBus modules, PHY, DP module and simulation model.
Specifically, simulation model is, for example, BFM simulation models, the emulation for PHY characteristics.
SBus modules are a bus modules for being linked into Avago IP kernels so that the IP kernel of Avago can allow user to go
Configuration, debugging, the state for characterizing and observing terminal IP and operation.Wherein, the IP kernel of any compatibility SBus agreements of Avago all needs
Want SBus technologies.SBus agreements are a kind of bus protocols that Avago is provided, its data to transmission has stringent timing requirements,
If the data sent are unsatisfactory for requirement of the SBus buses to sequential, receiving terminal can not normal identification data, so, configuration
The sequential of SBus buses always meets specific timing closure mode.That is, the sequential for configuring SBus buses can be just for SBus buses
Convergence sequential when often transmission instruction, data.
PHY is the physical layer provided by Avago.In this, the purpose of PHY verifications is the Lane Width for checking that PHY is grand
The correctness of the characteristics such as Reduction, Lane Reversal, DFE tunning, it is ensured that these characteristics are in whole design chips
The availability of middle function.Specifically, controlled by SBus modules (for example, SBus Master) and configure PHY, by SBus
The modularization design of bus is defined as task, and PHY is configured by calling, if the state machine of PHY redirects normally, PHY is configured just
Really.
The register of the whole design chips of DP module managements, it is necessary to will match somebody with somebody from register port when the characteristic of PHY is verified
Confidence breath is input in design chips.In this, if SBus buses and PHY are configured correctly, it is possible to by DP modules PHY's
Configuration information is transferred in PHY.As shown in Figure 1, configuration information is input to SBus modules (for example, SBus from DP modules
Master in), configuration information is then identified by SBus modules (SBus Master) and configures PHY.Afterwards, can further do
The characteristic test of PHY.
The characteristic Simulation process of PHY is divided into four-stage by present pre-ferred embodiments.Specifically, the first stage is
Configure SBus buses:Since PHY is provided by Avago, this needs SBus technologies, so, the first step of emulation needs to configure
And verify SBus buses, make its normal work, verify that this partial content only needs the simulation time of 100,000 ns or so.Second stage
It is configuration PHY:, it is necessary to configure the state machine of PHY by SBus orders after the completion of SBus bus configurations, this process needs
The simulation time of 500000 ns.Phase III is from DP modules direction configuration SBus buses, PHY:This stage is not required extra
Simulation time, the problem of but helping to run into location simulation.Fourth stage is to configure the characteristic of PHY:During the emulation of this part
Between, maximum needs millions of nss related with the characteristic of PHY, it is minimum even without extra simulation time.Wherein, in order to
The reusability of simulated environment is improved, each simulation stage can be defined as to an artificial tasks, is appointed by calling and changing
Business, can complete the emulation of other characteristics.
Fig. 3 show the schematic diagram of the difficulty of PHY characteristic Simulations and the relation of simulation time.As shown in figure 3, pass through analysis
The characteristics of emulation, it can be seen that with deepening continuously for emulation, simulation time is increasingly longer, and emulation difficulty is increasing.Assuming that
It is T that the characteristic test of PHY, which needs simulation time, and for emulating by different level, the characteristic Simulation of a PHY needs to do n times experiment, is put down
Equal simulation time t=60+T+ (N-1)/4*10+ (N-1)/2*50+ (N-1)/4*T.And for directly carrying out the imitative of PHY characteristics
Very, then t=(60+T) * N are needed.Contrast understands that, when emulation difficulty is larger, experiment number is more, the emulation of the characteristic needs of PHY
Time gets over for a long time, and simulation model can greatly reduce simulation times by different level, improves average simulation efficiency.
In conclusion the present invention is write data into design chips by DP modules, by design chips by data access
Into SBus modules, then using the characteristic of SBus modules configuration PHY, by effectively analyzing the characteristic Simulation of PHY, by PHY
Characteristic Simulation process stage division, only by the emulation in a upper stage, the emulation of next stage could be entered.This
Sample not only can quickly location simulation problem, but also can reduce unnecessary simulation time.
The basic principles, main features and the advantages of the invention have been shown and described above.The present invention is from upper
The limitation of embodiment is stated, the above embodiments and description only illustrate the principle of the present invention, is not departing from the present invention
On the premise of spirit and scope, various changes and modifications of the present invention are possible, these changes and improvements both fall within claimed
In the scope of the invention.
Claims (8)
- A kind of 1. PHY characteristic Simulations method, it is characterised in that comprise the following steps:Configure SBus buses;After the completion of the SBus bus configurations, PHY is configured;After the SBus buses and the PHY are configured correctly, the configuration information of the PHY is transmitted to the PHY;Configure and verify the characteristic of the PHY, including:Write data into by DP modules in design chips, by design chips By data access into SBus modules, the characteristic of PHY, and the PHY as described in Validation of Simulation Models are then configured using SBus modules Characteristic.
- 2. PHY characteristic Simulations method as claimed in claim 1, it is characterised in that:The configuration SBus buses include:Configuration The sequential of SBus buses, the sequential meet requirement of the SBus buses to sequential, then the SBus bus configurations are correct.
- 3. PHY characteristic Simulations method as claimed in claim 1, it is characterised in that:After the completion of the SBus bus configurations, configuration PHY includes:After the SBus bus configurations are completed, the state machine of the PHY is configured by Sbus orders, if the PHY State machine redirects normally, then the PHY configurations are correct.
- 4. PHY characteristic Simulations method as claimed in claim 1, it is characterised in that:The SBus buses and the PHY are configured After correct, the configuration information of the PHY is transmitted to the PHY includes:The SBus buses and the PHY are configured correctly Afterwards, the configuration information is input in SBus modules by data processing (DP) module, institute is then identified by the SBus modules State configuration information and configure the PHY.
- A kind of 5. PHY characteristic Simulations system, it is characterised in that including:SBus modules, PHY, data processing (DP) module and imitative True mode,The SBus modules, for configuring SBus buses;The SBus modules, for after the completion of the SBus bus configurations, configuring the PHY;The DP modules, for after the SBus buses and the PHY configure correctly, the configuration information of the PHY to be passed Transport to the PHY;The DP modules and the simulation model, for configuring and verifying the characteristic of the PHY, including by DP modules by data Be written in design chips, by design chips by data access into SBus modules, then using SBus modules configuration PHY spy Property, and as described in Validation of Simulation Models PHY characteristic.
- 6. PHY characteristic Simulations system as claimed in claim 5, it is characterised in that:The SBus modules, in the configuration During SBus buses, the sequential of the SBus buses is configured, which meets requirement of the SBus buses to sequential, then described SBus bus configurations are correct.
- 7. PHY characteristic Simulations system as claimed in claim 5, it is characterised in that:The SBus modules, in the SBus After bus configuration is completed, the state machine of the PHY is configured by Sbus orders, if the state machine of the PHY redirects normally, Then the PHY configurations are correct.
- 8. PHY characteristic Simulations system as claimed in claim 5, it is characterised in that:The DP modules, for total in the SBus After line and the PHY are configured correctly, the configuration information of the PHY is input in the SBus modules, then by described SBus modules identify the configuration information and configure the PHY.
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Citations (5)
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EP1091280A2 (en) * | 1999-10-05 | 2001-04-11 | Siemens Aktiengesellschaft | Interface connecter for connection to a hardware emulator |
CN101118788A (en) * | 2007-07-19 | 2008-02-06 | 中兴通讯股份有限公司 | Memory controller automatization testing method and apparatus |
CN101387995A (en) * | 2008-10-06 | 2009-03-18 | 北京中星微电子有限公司 | USB interface device and method |
CN101820450A (en) * | 2009-01-13 | 2010-09-01 | 三星电子株式会社 | The device of the method that parallel interface connects and this method of use |
CN102567168A (en) * | 2010-12-27 | 2012-07-11 | 北京国睿中数科技股份有限公司 | BIST (Built-in Self-test) automatic test circuit and test method aiming at PHY (Physical Layer) high-speed interface circuit |
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2014
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1091280A2 (en) * | 1999-10-05 | 2001-04-11 | Siemens Aktiengesellschaft | Interface connecter for connection to a hardware emulator |
CN101118788A (en) * | 2007-07-19 | 2008-02-06 | 中兴通讯股份有限公司 | Memory controller automatization testing method and apparatus |
CN101387995A (en) * | 2008-10-06 | 2009-03-18 | 北京中星微电子有限公司 | USB interface device and method |
CN101820450A (en) * | 2009-01-13 | 2010-09-01 | 三星电子株式会社 | The device of the method that parallel interface connects and this method of use |
CN102567168A (en) * | 2010-12-27 | 2012-07-11 | 北京国睿中数科技股份有限公司 | BIST (Built-in Self-test) automatic test circuit and test method aiming at PHY (Physical Layer) high-speed interface circuit |
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