CN104410419A - Analog-digital converter with digital programmable gating window - Google Patents
Analog-digital converter with digital programmable gating window Download PDFInfo
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- CN104410419A CN104410419A CN201410743034.XA CN201410743034A CN104410419A CN 104410419 A CN104410419 A CN 104410419A CN 201410743034 A CN201410743034 A CN 201410743034A CN 104410419 A CN104410419 A CN 104410419A
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Abstract
The invention discloses an analog-digital converter with a digital programmable gating window and solves the power consumption waste problem of the existing analog-digital converter. The analog-digital converter comprises a sampling hold circuit, a comparator, an analog-digital conversion circuit, a successive approximation register and a logic controller, wherein capacitor arrays are shared by the sampling hold circuit and the analog-digital conversion circuit; the capacitor arrays are used for collecting analog signals and varying differential voltage by rules during successive approximation so as to realize the output of each comparison position, and the amplitude size of the gating window is controlled by digital programming switches of the capacitor arrays; the comparator is used for comparing the voltage values of upper polar plates on the capacitor arrays on the two sides, and the logic controller carries out subsequent logic control and outputs the digital codes of the position according to the voltage values; the logic controller is used for providing the system with a control signal of a successive approximation algorithm and determining whether capacitors are sequentially switched or the turning-over of high-position capacitors above a gating position is skipped over to directly compare low-position capacitors.
Description
Technical field
The present invention relates to electronic circuit technology field, particularly relate to a kind of analog to digital converter with digital programmable gating window.
Background technology
In recent years, the development of medical nerve electronics device is swift and violent, and the mankind are monitored, treat by main equipment to health indices by initial, develop into gradually and are monitored in real time and transfer of data vital sign by portable equipment.In order to for longer periods use portable set, the power consumption reducing equipment use chip just becomes the inexorable trend of portable nerve signal acquiring system.In different Neural Signal Collecting systems, MEMS (Micro-Electro-Mechanical Systems, MEMS (micro electro mechanical system)) inductor and frontend amplifying circuit are all not quite similar, and need to design according to actual signal situation.And one of analog to digital converter assembly that to be all Neural Signal Collecting systems all required, it is responsible for the vital task signal digitalization collected exported.Therefore, the reduction of reduction to various Neural Signal Collecting overall system power consumption of analog to digital converter power consumption all has positive meaning.
Due to the restriction requirement of extremely low power dissipation, the analog to digital converter being applied to Neural Signal Collecting system must meet harsh power consumption constraints.Successive approximation analog-to-digital conversion framework becomes the first-selected framework towards Neural Signal Collecting application analog to digital converter with its lower power consumption.
Realizing in process of the present invention, inventor finds at least there is following technical problem in prior art:
Due to each digitaling analoging signal of gradual approaching A/D converter, need to travel through all positions electric capacity, the electric current that electric capacity upset consumes is excessive, and nerve signal has, and noise duration is by a small margin long, the characteristic of information pulse interval appearance, therefore for the most of the time, the upset of the high-order electric capacity of analog to digital converter when noise transforms causes the waste of power consumption.
Summary of the invention
Analog to digital converter with digital programmable gating window provided by the invention, can reduce the power consumption of analog to digital converter in Neural Signal Collecting system.
The invention provides a kind of analog to digital converter with digital programmable gating window, comprise sampling hold circuit, comparator, D/A converting circuit, successive approximation register and logic controller, described sampling hold circuit and D/A converting circuit share capacitor array, the top crown of described capacitor array is output, is connected with the input of described comparator;
Described capacitor array, for gathering analog signal, and regularly changes to realize each position of comparing and exports, the digital programmable switch control rule gating window amplitude size of described capacitor array by differential voltage when Approach by inchmeal;
Described comparator, for comparing bilateral capacitor array top crown voltage swing, supply logic controller carries out subsequent logic control and exports this position digital coding;
Described logic controller, for being supplied to the control signal of system successive approximation algorithm, determining it is sequentially switch-capacitor according to comparing of switching signal and gating window size, being also to skip the upset of the high-order electric capacity in more than gating position, directly carrying out bit capacitor and compare.
Analog to digital converter with digital programmable gating window provided by the invention, controls gating window gating position by digital programmable, can change gating window size; Logic controller can skip the electric capacity switching process of the high control bit of more than gating window program bit automatically, thus shortens digitization time, reduces the power consumption of electric capacity upset.The digital programmable of gating window selects design and the multiplex technique with capacitor array, makes the selection of gating window amplitude convenient, accurately simple, makes analog to digital converter have more practicality and applicability widely.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The framework of the analog to digital converter with digital programmable gating window that Fig. 1 provides for the embodiment of the present invention;
The algorithm logic flow chart of the analog to digital converter with digital programmable gating window that Fig. 2 provides for the embodiment of the present invention;
The nerve signal exploded view that Fig. 3 provides for the embodiment of the present invention;
The comparison diagram of the analog to digital converter with digital programmable gating window that Fig. 4 provides for the embodiment of the present invention and change in voltage on the differential capacitance array of the analog to digital converter not with digital programmable gating window.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making other embodiments all obtained under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the present invention provides a kind of analog to digital converter with digital programmable gating window, as shown in Figure 1, for the framework of the described analog to digital converter with digital programmable gating window, comprise sampling hold circuit, comparator, D/A converting circuit, successive approximation register and logic controller, described sampling hold circuit and D/A converting circuit share capacitor array, and the weight in capacitor array is distributed according to binary system, the top crown of whole capacitor array is output, is connected with the input of described comparator;
Described capacitor array, for gathering analog signal, and regularly changes to realize each position of comparing and exports, the digital programmable switch control rule gating window amplitude size of described capacitor array by differential voltage when Approach by inchmeal;
Described comparator, for comparing bilateral capacitor array top crown voltage swing, supply logic controller carries out subsequent logic control and exports this position digital coding;
Described logic controller, for being supplied to the control signal of system successive approximation algorithm, determining it is sequentially switch-capacitor according to comparing of switching signal and gating window size, being also to skip the upset of the high-order electric capacity in more than gating position, directly carrying out bit capacitor and compare.
Wherein, sampled signal enters system behind differentiation output symbol position, second compare cycle first compares with specifying gating window, when signal is less than gating window size, then logic controller directly skips high-order electric capacity comparison phase, and more than Auto-matching gating window program bit compares the corresponding output digital code in position; When signal is greater than gating window size, then logic controller conveniently Approach by inchmeal logic operation, compares from highest order electric capacity.
Wherein, the gating window of described analog to digital converter is by realization multiplexing with Approach by inchmeal capacitor array.
Wherein, the gating window of described analog to digital converter has N-1 position control bit, and wherein N is the conversion figure place of analog to digital converter, by the amplitude size of the control break gating window to described gating window digit order number.
Wherein, when sampled signal is less than gating window size, digital control logic automatically skip high-order capacity ratio compared with while, logic controller exports assignment automatically to high bit comparison position, guarantees that analog-to-digital conversion exports integrality and the correctness of digital code.
For the successive approximation register type difference A/D converter of N position, difference two ends capacitor array is identical, and every lateral capacitance array should contain N-2 electric capacity, if unit capacitance values is set to C, then highest order (MSB) capacitance size is 2
n-2c, lowest order (LSB) capacitance size is C.The top crown of differential capacitance array bilateral electric capacity, receives the positive-negative input end of comparator respectively.The bottom crown of differential capacitance array bilateral electric capacity, is connected into differential analog signal respectively in sampling instant and samples; At switch instant, electric capacity is controlled to be connected into V by digital module
refpor V
refn, compare to realize differential voltage Approach by inchmeal.
Its workflow is: difference analogue input voltage V
ipand V
inkept by the bottom crown collection of symmetric difference capacitor array; After first compare cycle starts, capacitor array bottom crown disconnects with input, access reference level V
refpor V
refn, within this cycle, comparative result instruction V
ipand V
insize, namely export the sign bit of digital code, by its highest order stored in successive approximation register; Afterwards, according to sign bit, logic controller will handle highest order electric capacity bottom crown access V
refpor V
refn, and all the other electric capacity bottom crowns access level is constant, draws (V
ip-V
in) and (V
refp-V
refnthe size of)/2, and result is write a successive approximation register time high position, then according to binary search algorithm, the electric capacity bottom crown of capacitor array will according to a upper bit register comparative result, the reference voltage of regular change present bit electric capacity bottom crown access, until least significant bit compares end.Whole process terminates, and namely complete the conversion to digital quantity of analog quantity, N position transformation result is stored in register, and finally exports the digital code of institute's converts analog amount thus.
As shown in Figure 2, be the algorithm logic flow chart of the described analog to digital converter with digital programmable gating window.Figure 3 shows that general nerve signal exploded view, in nerve signal, collision signal (AP) interval with information occurs, all the other mosts of the time are noise signal by a small margin.Therefore, when nerve signal digitlization, the analog to digital converter with gating window has obvious advantage, it avoid the upset of high-order electric capacity when noise signal transforms, thus saves most of power consumption for system.And for different nerve signals, as EEG signals, electrocardiosignal and electromyographic signal etc., because generating unit is strong and weak different with signal, the amplitude of noise signal is also not quite similar.Therefore select the digital programmable controllable characteristics of window size, make the present invention can by application extension in multiple nerve signal detection system.
What the embodiment of the present invention provided accesses corresponding reference voltage V with digital programmable gating window by controlling specific bit differential capacitance array switch
refpor V
refnrealize.Digital programmable gating window control signal n
gating window, choosing value scope is the integer of 1 to N-1, and N is analog-digital bit.For 10 analog to digital converters, if the digital control code of gating window is 010000000, then mean that digital code is by control switch S
7+and S
7-at gating window and V
sampling=V
ip-V
incomparison phase, respectively according to V
ipand V
inmagnitude relationship access V
refpor V
refn, thus realize V
sampling=V
ip-V
indirectly and V
gating window=(V
refp-V
refn)/2
2comparison, and then determine subsequent logic control flow trend.
After analog-to-digital conversion starts, after the electric capacity sampling period terminates, first compare cycle determination comparator Differential Input two ends signal magnitude, namely determines the sign bit exporting digital code, this result input logic controller.At second compare cycle, logic controller according to the digital control position of gating window write in advance, to compare in conjunction with first and export the digital code determined, corresponding for differential capacitance array specific bit is accessed V respectively
refpor V
refn, to realize within this cycle sampled signal V
sampling=V
ip-V
inwith gating window signal V
gating window=(V
refp-V
refn)/2
ngating window compares.(wherein n
gating windowfor digital programmable gating window control signal, choosing value scope is the integer of 1 to N-1, and N is analog-digital bit) work as V
samplingwith V
gating windowafter relatively terminating, result is inputed to logic controller by comparator, if result is 1, i.e. and V
samplingbe greater than V
gating windowthen the gating window electric capacity bit switch changed at second period is accessed sample states by logic controller again, capacitor array top crown electric capacity is made to recover sampled voltage, then at the 3rd compare cycle, logic controller traditionally successive approximation algorithm, from the upset of control highest order electric capacity, makes V
samplingcompare with stepped-up voltage one by one, until all digit order number transforms complete; If result is 0, i.e. V
samplingbe less than V
gating windowthen logic controller will skip the high-order electric capacity upset stage on the digital control position of gating window, and give these high bit comparison positions correct Output rusults, at the 3rd compare cycle, logic controller will travel through the capacitor array of its bottom from gating window selection position, until whole digit order number conversion is complete.
Logic control algorithm involved in the present invention is on the basis of traditional binary searching algorithm, with the addition of the design of gating window, thus achieves the process that rapid and convenient more completes analog signal figure.The operational process of its whole circuit can from the clear explanation of change of differential capacitance array top crown voltage V+ and V-.
As shown in Figure 4, in synchronous sequence successive approximation register pattern number converter: first clock cycle is used for resetting circuit various piece, releases to the residual charge of the previous comparison of capacitor array; Second clock cycle completes analog voltage sampling; 3rd clock cycle, comparator is rapidly to V
ipand V
insize judge, and as guidance corresponding gating window digit order number anode electric capacity and negative terminal electric capacity be connected into V respectively
refpor V
refnfoundation, and V+ and V-voltage along with selected position electric capacity bottom crown access reference voltage change and change; 4th clock cycle opens, and comparator exports the voltage compare result of the 3rd cycle V+ and V-fast, and guides the action of corresponding capacitance bit switch, and its result is V
sampling=V
ip-V
inwith V
gating window=(V
refp-V
refn)/2
n gating windowsize;
If V
samplingbe less than V
gating window, then the 5th clock cycle, capacitor array from gating window digital programmable position, according to binary search algorithm, will travel through each position of below gating window digital programmable code, and skips the comparison procedure of high-order electric capacity, and according to V
ipand V
insize comparative result, to the correct assignment 1 or 0 of each high-order output digital code;
If V
samplingbe greater than V
gating window, then the 5th clock cycle, capacitor array, from highest order, according to binary search algorithm, compares one by one and draws digits Output rusults.
Idea behind the present invention is in logic controller, controls gating window gating position, can change gating window size by digital programmable.Meanwhile, when comparing sampled voltage and being less than gating window-voltage, logic controller skips the switching process of more than gating window program bit high control bit electric capacity automatically, thus reduces electric capacity upset power consumption, saves and compares the time, improve chip and use flexibility ratio.In addition, the algorithm design of logic controller, is not limited to comparator form and capacitor array figure place, has the broad applicability of application.
The present invention is based on capacitor array sampled charge conservation principle, the gating window size of design changes generation by digital switch control capacitance array, when sampled voltage is greater than gating window size, capacitor array can recover sampled voltage, thus does not affect it and re-start conventional successive approximate algorithm and compare.Charge conservation principle ensure that correctly carrying out of said process theoretically, namely whether adds gating window function, can't affect the number of sampled charge, therefore, when signal is greater than gating window, can continues to recover to run according to original binary searching algorithm, and not affect its correctness.As can be seen from Figure 4, traditional analog to digital converter with gating window wastes a large amount of power consumptions and compares the time when small-signal is sampled, and the analog to digital converter with gating window able to programme that the embodiment of the present invention provides not only avoid the upset of high-order electric capacity, also shorten digitization time, reduce power consumption.
In the embodiment of the present invention, the reference level of gating window provides without the need to outside, but realized by the switch multiplexing of digital algorithm and capacitor array, and the size of gating window accurately can change according to the electric capacity position selected, convenient and efficient, and can by the nerve signal digital applications of application extension to different noise situations.In addition, in the embodiment of the present invention, particular/special requirement be there is no to the common mode electrical level of input signal, make the practical application of this invention become possibility.
The analog to digital converter with digital programmable gating window that the embodiment of the present invention provides is applicable to the acquisition system of multiple nerve signal, the signal acquiring systems such as such as brain neural signal, electrocardio nerve signal, myoelectricity nerve signal, and in other low-power consumption A/D conversion systems.When the introducing of gating window makes small scale ripple by acquisition system, avoid the level of high-order bulky capacitor to overturn, thus significantly will reduce system power dissipation.The digital programmable of gating window selects design and the multiplex technique with capacitor array, makes the selection of gating window amplitude convenient, accurately simple, makes analog to digital converter have more practicality and applicability widely.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (5)
1. the analog to digital converter with digital programmable gating window, comprise sampling hold circuit, comparator, D/A converting circuit, successive approximation register and logic controller, it is characterized in that: described sampling hold circuit and D/A converting circuit share capacitor array, the top crown of described capacitor array is output, is connected with the input of described comparator;
Described capacitor array, for gathering analog signal, and regularly changes to realize each position of comparing and exports, the digital programmable switch control rule gating window amplitude size of described capacitor array by differential voltage when Approach by inchmeal;
Described comparator, for comparing bilateral capacitor array top crown voltage swing, supply logic controller carries out subsequent logic control and exports this position digital coding;
Described logic controller, for being supplied to the control signal of system successive approximation algorithm, determining it is sequentially switch-capacitor according to comparing of switching signal and gating window size, being also to skip the upset of the high-order electric capacity in more than gating position, directly carrying out bit capacitor and compare.
2. the analog to digital converter with digital programmable gating window according to claim 1, it is characterized in that, sampled signal enters system behind differentiation output symbol position, second compare cycle first compares with specifying gating window, when signal is less than gating window size, then logic controller directly skips high-order electric capacity comparison phase, and more than Auto-matching gating window program bit compares the corresponding output digital code in position; When signal is greater than gating window size, then logic controller conveniently Approach by inchmeal logic operation, compares from highest order electric capacity.
3. the analog to digital converter with digital programmable gating window according to claim 1, is characterized in that, the gating window of described analog to digital converter is by realization multiplexing with Approach by inchmeal capacitor array.
4. the analog to digital converter with digital programmable gating window according to claim 1, it is characterized in that, the gating window of described analog to digital converter has N-1 position control bit, wherein N is the conversion figure place of analog to digital converter, by the amplitude size of the control break gating window to described gating window digit order number.
5. the analog to digital converter with digital programmable gating window according to claim 1, it is characterized in that, when sampled signal is less than gating window size, digital control logic automatically skip high-order capacity ratio compared with while, logic controller exports assignment automatically to high bit comparison position, guarantees that analog-to-digital conversion exports integrality and the correctness of digital code.
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| CN106992785A (en) * | 2017-03-21 | 2017-07-28 | 清华大学深圳研究生院 | A kind of delta modulator and its analog-digital converter |
| CN108880553A (en) * | 2018-07-05 | 2018-11-23 | 福建工程学院 | The alternate gradual approaching A/D converter of low power consumption adaptive and control method |
| CN110365338A (en) * | 2018-03-26 | 2019-10-22 | 三星电子株式会社 | For skipping the analog-digital converter (ADC) and D conversion method of reset |
| CN110545105A (en) * | 2019-07-18 | 2019-12-06 | 西安交通大学 | Quantization and conversion method, control circuit, analog-to-digital converter and cardiac pacemaker |
| CN112968704A (en) * | 2021-02-03 | 2021-06-15 | 电子科技大学 | Successive approximation type analog-to-digital converter based on transient capacitance switching mode and quantization method thereof |
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| CN106992785A (en) * | 2017-03-21 | 2017-07-28 | 清华大学深圳研究生院 | A kind of delta modulator and its analog-digital converter |
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| WO2022150939A1 (en) * | 2021-01-12 | 2022-07-21 | 尼奥耐克索斯有限私人贸易公司 | Analog-to-digital converter for differential output voltage, and analog-to-digital conversion method |
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| CN114024550A (en) * | 2021-10-27 | 2022-02-08 | 南方电网数字电网研究院有限公司 | Analog-to-digital converter and automatic power distribution equipment |
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