CN104303195A - 转频层及其制造方法 - Google Patents

转频层及其制造方法 Download PDF

Info

Publication number
CN104303195A
CN104303195A CN201380018642.8A CN201380018642A CN104303195A CN 104303195 A CN104303195 A CN 104303195A CN 201380018642 A CN201380018642 A CN 201380018642A CN 104303195 A CN104303195 A CN 104303195A
Authority
CN
China
Prior art keywords
antenna
chip
antenna substrate
layer
card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201380018642.8A
Other languages
English (en)
Other versions
CN104303195B (zh
Inventor
马丁·古乔斯基
曼弗雷德·雷兹勒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Linxens Holding SAS
Original Assignee
Smartrac IP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smartrac IP BV filed Critical Smartrac IP BV
Publication of CN104303195A publication Critical patent/CN104303195A/zh
Application granted granted Critical
Publication of CN104303195B publication Critical patent/CN104303195B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07754Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being galvanic
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772Physical layout of the record carrier
    • G06K19/07722Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/8122Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/81224Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/8185Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/141Analog devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Credit Cards Or The Like (AREA)
  • Details Of Aerials (AREA)

Abstract

本发明涉及一种转频层(10),特别是用于制造芯片卡的转频层,转频层具有天线基板(12),天线基板设置由导体线路(13)形成的天线(14)在天线基板的天线侧(11),天线基板具有芯片容置空间形成于天线基板内的凹部,且芯片容置空间用于容置芯片(21),其中作为天线末端的导体线路末端(15)形成在天线基板的芯片容置空间的底部(20),底部相对于天线基板(12)的背侧(26)凹入,设置在芯片的接触面(36)上的末端接点(22)与天线的末端(15)上的平坦接面(19)互相接触,以使芯片容置在芯片容置空间,且芯片以其本身的半导体主体(28)的背侧面(27)对末端接点以实质上与天线基板的背侧对齐。此外,本发明进一步涉及一种制造转频层的方法。

Description

转频层及其制造方法
技术领域
本发明涉及一种转频层,特别是用于制造芯片卡的转频层。转频层具有天线基板,天线基板设置有由导体线路形成的天线在天线基板的天线侧,天线基板具有芯片容置空间形成于天线基板内的凹部,且芯片容置空间用于容置芯片,其中作为天线末端的导体线路末端形成在天线基板的芯片容置空间的底部,底部相对于天线基板的背侧凹入,设置在芯片接触侧上的末端接点与天线末端上的平坦接面互相接触,以使芯片容置在芯片容置空间,且芯片以其本身的半导体主体的背侧面对末端接点以实质上与天线基板的背侧齐平。
此外,本发明有关一种具有转频层的卡片内嵌层以及具有卡片内嵌层的芯片卡与制造转频层的方法。
背景技术
使用多层结构的方式制造用于与读取装置进行非接触式的讯息交流以及具有在载体基板上与芯片接触的转频层为大众熟知,其中层迭层具有由导体线路所形成的天线,且天线末端和芯片接触。例如,此种转频层的设置方式可以为一种非接触式芯片、一种转发层标签或一种转发层信标。
特别是在制造非接触式芯片卡时,众所皆知的是,为了芯片可以方便地与天线接触且为了使芯片具有机械性的保护,可使芯片设置于接触载体的壳体内,其中接触载体可与芯片一起形成芯片模块并容置在壳体内。在接触载体形成的接触表面上,芯片模块具有相较于芯片的末端表面放大许多的芯片模块接触表面,且可使芯片与天线的末端有较好的接触。
与芯片半导体本身的尺寸相比较下,芯片模块具有实质上较大的外部尺寸。特别是芯片模块的高度就实质上高于实际的芯片,因此要使芯片模块设置于迭层结构内将需要对应数量的迭层。一般来说,已知的具有迭层结构的芯片卡具有第一层迭层用于容置具有较大端点表面的芯片模块的芯片载体,且还具有第二层迭层用于容置围绕在芯片半导体本体的壳体于整个迭层结构中。假使在一般的情况下,至少还需要额外一层迭层以分别地用于覆盖天线基板的天线以及芯片模块,传统所熟悉的设计为层迭结构的芯片卡,最少都会需要四层迭层,其中额外可视的外部迭层也可能被迭加,作为芯片卡外部设置的材料。
发明内容
(一)要解决的技术问题
本发明的目的是在使制造芯片卡时仅须利用最少可能数目的迭层成为可能。
(二)技术方案
为了实现上述目的,根据本发明用于制造芯片卡的转频层具有如权利要求1所述的技术特征,根据本发明的卡片内嵌层具有如权利要求4所述的技术特征,根据本发明的芯片卡具有如权利要求5所述的技术特征以及根据本发明转频层的制造方式具有如权利要求7所述的技术特征。
根据本发明的转频层可具有天线基板,天线基板可设置由导体线路形成的天线在天线基板的天线侧,天线基板可具有芯片容置空间可形成在天线基板内的凹部,且芯片容置空间可用于容置芯片,其中作为天线末端的导体线路末端可形成在天线基板的芯片容置空间的底部,底部相对于天线基板的背侧可为凹入,设置在芯片接触侧上的末端接点可与天线末端上的平坦接面互相接触,以使芯片容置在芯片容置空间,且芯片可以其本身半导体主体的背侧面对末端接点以实质上与天线基板的背侧齐平。
根据本发明所形成的转频层使得无需使用额外的壳体容置芯片,且使得将芯片仅设置在层迭层内成为可能。特别使用在形成天线末端且用于接触芯片的线路导体末端可包含平坦接面,平坦接面可直接地与芯片的末端接点接触,而不再需要用于提供较大末端表面的接触载体设置在芯片与天线的末端。
与导体线路末端截面的凸出的接触轮廓不同的是,导体线路末端的平坦接面形成有较大的末端接触表面,以使其与芯片的末端接点可以稳固的接触。通过芯片以及芯片的半导体本体个别地设置以与天线基板的表面实质上齐平,芯片可稳固地容置于天线基板的凹部,而不会使芯片容置于天线基板的凹部时产生凸出天线基板表面的部分,以造成可能有额外的迭层的需求。以这种方式,可制造出仅由天线基板相对于其外部尺寸而定义的转频层,因此无须再建立使天线基板为了用于容置芯片的额外的迭层。
在本发明的转频层的较佳实施例中,芯片容置空间可形成为天线基板内的窗孔,且导体线路末端的平坦接面可形成为芯片容置空间的底部。此实施例具有特定的优点在于天线基板的凹部可在从导体线路形成且设置天线在天线基板之前就已经形成好,因此导体线路末端可以自由地与在其之后安装的芯片接触,而无须为了此种需要采用天线基板的特殊工艺。
在本发明的转频层的其它实施例中,芯片容置空间可形成为天线基板内的凹陷且具有由天线基板形成的底部,其中末端的平坦接面可设置于芯片容置空间的底部。此较佳的实施例使得采用一般普通工艺步骤用于形成导体线路末端的平坦接面以及天线基板的凹陷是有可能的。
根据本发明的卡片内嵌层,其可包含根据本发明的转频层,其中转频层可以设置于具有多个覆盖层的复合层所包含的下覆盖层与上覆盖层之间的中间层,其中下覆盖层可设置于天线基板的天线侧且上覆盖层可同时设置于天线基板的背侧以及芯片的半导体主体的背侧。
至此,可使用作为制造芯片卡半完成品的卡片内嵌层可包括了在仅有三个迭层的迭层结构中,受保护地设置有天线以及芯片。
在最少数量的配置中,根据本发明的芯片卡可包括本发明的卡片内嵌层,其中芯片卡的下外层可通过卡片内嵌层的下覆盖层形成,且芯片卡的上外层可通过卡片内嵌层的上覆盖层形成。
由此,芯片卡可以形成所谓的“白卡”,透过如直接标记或印记的外部层就可以使得仅用三个迭层,即转频层、下覆盖层及上覆盖,组成的迭层结构制作出完整的芯片卡成为可能。
即使根据本发明实施例的附加有下覆盖层以及上覆盖层芯片卡,为了达到特定的设置而具有下外层以及上外层,此种芯片卡的设置方式仍然是具有可由最少可能数量的迭层所形成的迭层结构的特点。
当进行根据本发明的转频层的制造方法时,可形成天线基板,天线基板设置有由导体线路形成的天线于天线基板的天线侧,天线基板在形成于天线基板内的芯片容置空间的区域接收来自天线基板背侧的能量,芯片容置空间的区域位于整个底部上,通过导体线路所形成天线的末端朝向天线基板背侧的平坦接面而延伸形成。然后,设置于芯片接触侧的平坦接面与芯片末端接点的接触通过芯片被容置在天线基板中且芯片可以其本身的半导体主体的背侧面对末端接点以实质上与天线基板的背侧齐平。
根据本发明方法的有利变化,更包含透过使导体线路形成天线末端的重制工艺,以形成平坦接面。例如,形成平坦接面的方式可通过冲压工具(stamping tool)以使导体线路的截面产生变形以形成平坦接面。
或者通过有效切割方式的机械工艺形成平坦接面也是有可能的。例如,通过铣削刀具或磨具的研磨方式。
当平坦接面通过激光处理导体线路末端的方式形成时,导体线路末端的非接触式工艺以形成平坦接面也是有可能的。
用于将芯片的末端接点与导体线路末端的平坦接面接触的方法,特别是在当芯片的末端接点具有金属接触凸块时,施加压力与温度于形成天线末端的导体线路上以接触已被证明是具有优势的。
尤其是在当从导电胶具有多个接触凸块的芯片上的末端接点用于后续接触的情况下,通过施加压力于形成天线末端的导体线路以完成接触亦被证实是具有优势的。
除了上述在芯片上的末端接点可具有接触凸块的方式之外,在接触的过程中利用施加压力至接触凸块的方式以使芯片的半导体本体的后侧与天线基板的后侧调整成为水平等高的排列方式,在任何实施情况下都是具有其优势的。
附图说明
在下文中,本发明的转频层以及使用转频层分别地制造卡片内嵌层及芯片卡的较佳实施例将会参照附图方式进行详细的描述。
在附图中:
图1示出了本发明的转频层的上视图。
图2示出了本发明的转频层的纵向剖面图。
图3示出了本发明的转频层制造芯片卡的卡片内嵌层的纵向剖面图。
图4a与图4b示出了本发明基于第一实施例的天线基板的转频层的制造示意图。
图5a与图5b示出了本发明的芯片与图4a与图4b的天线基板的接触示意图。
图6a与图6b示出了本发明基于第二实施例的天线基板的转频层的制造示意图。
图7示出了本发明的芯片与图6a与图6b的天线基板的接触示意图。
具体实施方式
请参照图1与图2,设置于天线基板12的天线侧11的转频层10可具有由导体线路13所形成的天线14。天线14可包括由位于天线侧11的导体线路13形成的两个末端15,天线14穿过形成位于天线基板12内的窗孔17。
再参照图2,在此实施例中,用于形成天线14的导体线路13能以其部分导体线路的截面18嵌入天线基板12,例如可由PVC所构成的天线基板12。再从图1与图2中得知,天线14的末端15的区域可穿过窗孔17,导体线路13可包括平坦接面19,其可形成于通过窗孔17所形成于天线基板12的凹部的底部20。在窗孔17内,芯片21可嵌入,其中芯片21的末端接点22可具有接触凸块24并与平坦接面19相接触,例如接触凸块24可为金属形成,接触凸块24可直接地朝向天线基板12的背侧26。在此,芯片21可容置于窗孔17中,且芯片12本身的半导体主体28的背侧27与天线基板12的背侧26齐平。
图3示出了卡片内嵌层29,其形成为迭层结构且可容置如图2所示出的转频层10,以使转频层10作为设置于下覆盖层30与上覆盖层31之间的中间层,其中下覆盖层30设置于天线基板12的天线侧11,上覆盖层31设置于天线基板12的背侧26,下覆盖层30与上覆盖层31组成复合层。
值得注意的是,上覆盖层31同时设置于天线基板12的背侧以及芯片半导体主体28的背侧。
在图4a以及图4b中,制造由导体线路13形成天线14的末端15的平坦接面19的可能性已被描述。请依照图4a至图4b的顺序来看,由图4a开始,具有未加工的导体线路截面18的导体线路13延伸跨越天线基板12的窗孔17,具有实质上对应至窗孔17截面积的末端截面32的压缩印模33可从天线基板12的背侧26压印导体线路13,以使其通过在窗孔17的区域内进行重制工艺的方式,形成平坦接面19,平坦接面19具有背离未加工的导体线路截面18的接触截面34,接触截面34在平坦接面19的区域上形成实质上平坦接触表面35。
在图5a以及图5b中,示出接触工艺,在进行过程中,芯片21从天线基板12的背侧26嵌入窗孔17且通过其接触侧36直接地与平坦接面19接触,其中接触凸块24邻接平坦接面19的接触表面35。以热压印的方式作为描述图5a以及图5b的示范情况,热熔接触凸块24且同时施加压力至芯片21。如图5b所示出的,通过温度与压力互相配合完成芯片21的半导体本体28的背侧27与天线基板12的背侧26齐平。优选地,在接触过程中所需要的压力施加在半导体本体28的背侧27,然而使接触凸块24热熔的热能在接触过程中可通过安装板37加热导体线路13而达成。
在图6a以及图6b中,在形成天线14的末端15的导体线路13形成平坦接面19的另一种可能性也被描述。其中在天线基板12上形成凹陷40的同时也可一并形成平坦接面38,凹陷40可用于容置芯片21(如图7所示出)。
根据本实施所示出的另一实施情况,旋转铣削刀具41可朝着设置于天线基板12天线侧11的导体线路13从天线基板12的背侧26被引导。在此过程中,凹陷40的底部42形成于天线基板内12,且平坦接面38与其接触表面43为齐平设置。
如图5a以及图5b的描述,芯片21与设置于天线基板12天线14的接触可通过将芯片21嵌入天线基板12的背侧26的凹陷40处完成,且在同一时间,芯片21也可透过设置其的末端接点22的接触凸块24与平坦接面38互相接触。

Claims (12)

1.一种转频层(10),用于制造芯片卡,其特征在于,包括:
天线基板(12),该天线基板装备由导体线路(13)形成的天线(14)在该天线基板的天线侧(11),该天线基板具有芯片容置空间形成于该天线基板内的凹部且该芯片容置空间用于容置芯片(21),其中作为该天线末端(15)的导体线路末端形成在该天线基板的该芯片容置空间的底部(20),该底部相对于该天线基板(12)的背侧(26)凹入,设置在该芯片的接触侧(36)上的末端接点(22)与该天线的该末端(15)的平坦接面(19)互相接触,以使该芯片容置在该芯片容置空间,且该芯片以其本身的半导体主体(28)的背侧(27)面对该末端接点以实质上与该天线基板的该背侧齐平。
2.根据权利要求1所述的转频层,其特征在于,该芯片容置空间形成为在该天线基板(12)内的窗孔(17)内,该末端(15)的该平坦接面(19)形成该芯片容置空间的该底部(20)。
3.根据权利要求1所述的转频层,其特征在于,该芯片容置空间形成为在该天线基板(12)内的凹陷(40)且该芯片容置空间具有由该天线基板(12)形成的底部(42),其中,该末端(15)的该平坦接(38)设置于该芯片容置空间的该底部(42)。
4.一种卡片内嵌层(29),其具有根据前述权利要求中任一项所述的转频层(10),其特征在于,该转频层为设置在具有多个覆盖层的复合层的下覆盖层(30)与上覆盖层(31)之间的中间层,其中,该下覆盖层设置于该天线基板(12)的该天线侧(11)且该上覆盖层同时设置于该天线基板(12)的该背侧(26)以及该芯片(21)的该半导体主体(28)的该背侧(27)。
5.一种芯片卡,其具有根据权利要求4所述的卡片内嵌层,其特征在于,该芯片卡的下外层通过该卡片内嵌层(29)的该下覆盖层(30)形成,且该芯片卡的上外层通过该卡片内嵌层的该上覆盖层(31)形成。
6.一种芯片卡,其具有根据权利要求4所述的卡片内嵌层,其特征在于,该芯片卡的下外层设置于该卡片内嵌层的该下覆盖层上,且该芯片卡的上外层设置于该卡片内嵌层的该上覆盖层上。
7.一种制造根据权利要求1至3中任一项所述的转频层(10)的方法,其特征在于:
设置有由该导体线路(13)形成的该天线(14)在该天线侧(11)的天线基板(12),该天线基板在形成于该天线基板内的该芯片容置空间的区域接收来自该天线基板的该背侧(26)的能量,该芯片容置空间的区域位于该底部(20,42)上,通过该导体线路所形成的该天线的该末端(15)朝向该天线基板的该背侧的该平坦接面(19,38)而延伸形成,
且接着,设置在该芯片(21)的该接触侧(36)上的该平坦接面与该芯片的该末端接点的接触通过该芯片被容置在该天线基板中且该芯片以其本身的该半导体主体的该背侧面(27)对该末端接点以实质上与该天线基板的该背侧齐平。
8.根据权利要求7所述的方法,其特征在于,透过形成该天线(14)的该末端(15)的该导体线路(13)的重制工艺,以形成该平坦接面(19)。
9.根据权利要求7所述的方法,其特征在于,透过形成该天线(14)的该末端(15)的该导体线路(13)的机械加工工艺,以形成该平坦接面(38)。
10.根据权利要求7所述的方法,其特征在于,透过形成该天线的该末端的该导体线路激光处理方法,以形成该平坦接面。
11.根据权利要求7至10中任一项所述的方法,其特征在于,透过施加压力与温度于形成该天线(14)的该末端(15)的该导体线路(13),以使具有多个金属接触凸块(24)的该芯片(21)上的该末端接点(22)与该平坦接面(19,38)互相接触。
12.根据权利要求7至10中任一项所述的方法,其特征在于,通过施加压力于形成该天线的该末端的该导体线路,以使通过导电胶而具有多个接触凸块的该芯片上的该末端接点与该平坦接面互相接触。
CN201380018642.8A 2012-04-10 2013-04-04 转频层及其制造方法 Active CN104303195B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102012205768.4A DE102012205768B4 (de) 2012-04-10 2012-04-10 Transponderlage und Verfahren zu deren Herstellung
DE102012205768.4 2012-04-10
PCT/EP2013/001000 WO2013152840A1 (de) 2012-04-10 2013-04-04 Transponderlage und verfahren zu deren herstellung

Publications (2)

Publication Number Publication Date
CN104303195A true CN104303195A (zh) 2015-01-21
CN104303195B CN104303195B (zh) 2018-08-31

Family

ID=48143236

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380018642.8A Active CN104303195B (zh) 2012-04-10 2013-04-04 转频层及其制造方法

Country Status (10)

Country Link
US (1) US9792543B2 (zh)
EP (1) EP2836966B1 (zh)
CN (1) CN104303195B (zh)
DE (1) DE102012205768B4 (zh)
ES (1) ES2670664T3 (zh)
PL (1) PL2836966T3 (zh)
PT (1) PT2836966T (zh)
TR (1) TR201808589T4 (zh)
TW (1) TWI623883B (zh)
WO (1) WO2013152840A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110676556A (zh) * 2018-07-03 2020-01-10 三星电子株式会社 天线模块

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011114635A1 (de) * 2011-10-04 2013-04-04 Smartrac Ip B.V. Chipkarte und Verfahren zur Herstellung einer Chipkarte
CN111279361B (zh) 2017-09-29 2023-08-04 艾利丹尼森零售信息服务公司 用于将柔性导体转移到移动幅材上的***和方法
CN111295672B (zh) * 2017-09-29 2023-08-29 艾利丹尼森零售信息服务公司 有线格式天线的条安装技术
SE542007C2 (en) * 2017-10-13 2020-02-11 Stora Enso Oyj A method and an apparatus for producing a radio-frequency identification transponder
US11443160B2 (en) 2019-09-18 2022-09-13 Sensormatic Electronics, LLC Systems and methods for laser tuning and attaching RFID tags to products
US10970613B1 (en) 2019-09-18 2021-04-06 Sensormatic Electronics, LLC Systems and methods for providing tags adapted to be incorporated with or in items
US11055588B2 (en) 2019-11-27 2021-07-06 Sensormatic Electronics, LLC Flexible water-resistant sensor tag
US11755874B2 (en) 2021-03-03 2023-09-12 Sensormatic Electronics, LLC Methods and systems for heat applied sensor tag
US11869324B2 (en) 2021-12-23 2024-01-09 Sensormatic Electronics, LLC Securing a security tag into an article

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1200185A (zh) * 1995-08-01 1998-11-25 奥地利塑料卡及证件***股份有限公司 具有一个构件和一个无接触应用的传输装置的无接触应用的卡片型数据载体和用于制造一种
US6142381A (en) * 1996-03-15 2000-11-07 Finn; David Contact or contactless chip card with brace
US6374486B1 (en) * 1998-07-20 2002-04-23 Stmicroelectronics S.A. Smart card and process for manufacturing the same
US20030057536A1 (en) * 1999-05-21 2003-03-27 Shinko Electric Industries Co., Ltd. Non-contact type IC card
US20060097911A1 (en) * 2002-07-03 2006-05-11 Quelis Id Systems Inc. Wire positioning and mechanical attachment for a radio-frequency indentification device

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19500925C2 (de) 1995-01-16 1999-04-08 Orga Kartensysteme Gmbh Verfahren zur Herstellung einer kontaktlosen Chipkarte
DE19632813C2 (de) * 1996-08-14 2000-11-02 Siemens Ag Verfahren zur Herstellung eines Chipkarten-Moduls, unter Verwendung dieses Verfahrens hergestellter Chipkarten-Modul und diesen Chipkarten-Modul enthaltende Kombi-Chipkarte
DE19710144C2 (de) * 1997-03-13 1999-10-14 Orga Kartensysteme Gmbh Verfahren zur Herstellung einer Chipkarte und nach dem Verfahren hergestellte Chipkarte
US6164551A (en) * 1997-10-29 2000-12-26 Meto International Gmbh Radio frequency identification transponder having non-encapsulated IC chip
US6161761A (en) * 1998-07-09 2000-12-19 Motorola, Inc. Card assembly having a loop antenna formed of a bare conductor and method for manufacturing the card assembly
JP3335938B2 (ja) * 1999-03-01 2002-10-21 新光電気工業株式会社 Icカード用アンテナフレーム及びicカードの製造方法
DE19942932C2 (de) 1999-09-08 2002-01-24 Giesecke & Devrient Gmbh Verfahren zum Herstellen von Chipkarten
FR2820548A1 (fr) * 2001-02-02 2002-08-09 Schlumberger Systems & Service Objet portatif a puce et a antenne, module destine a former un objet portatif a puce et a antenne et leurs procedes de fabrication
US6951596B2 (en) * 2002-01-18 2005-10-04 Avery Dennison Corporation RFID label technique
US7253735B2 (en) * 2003-03-24 2007-08-07 Alien Technology Corporation RFID tags and processes for producing RFID tags
US7694883B2 (en) * 2003-05-01 2010-04-13 Brother Kogyo Kabushiki Kaisha RFID label, method for producing the RFID label, device for producing the RFID label, sheet member (tag sheet) used for the RFID label, and cartridge attached to the device for producing the RFID label
DE10324043B4 (de) 2003-05-27 2006-08-31 Giesecke & Devrient Gmbh Kartenförmiger elektronischer Datenträger, Funktionsinlett dafür und ihre Herstellungsverfahren
TWI284842B (en) * 2003-07-14 2007-08-01 Nec Tokin Corp Communication medium capable of carrying out contactless communication and method of producing the same
US7384496B2 (en) * 2004-02-23 2008-06-10 Checkpoint Systems, Inc. Security tag system for fabricating a tag including an integrated surface processing system
US7749350B2 (en) * 2005-04-27 2010-07-06 Avery Dennison Retail Information Services Webs and methods of making same
TWI339358B (en) * 2005-07-04 2011-03-21 Hitachi Ltd Rfid tag and manufacturing method thereof
US20070040686A1 (en) * 2005-08-16 2007-02-22 X-Cyte, Inc., A California Corporation RFID inlays and methods of their manufacture
US20070096917A1 (en) * 2005-11-02 2007-05-03 San-Lien Yang Label of radio frequency identification by thermal transfer printing antenna
JP5108661B2 (ja) * 2008-07-03 2012-12-26 浜松ホトニクス株式会社 レーザ加工装置およびレーザ加工方法
US20120040128A1 (en) * 2010-08-12 2012-02-16 Feinics Amatech Nominee Limited Transferring antenna structures to rfid components

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1200185A (zh) * 1995-08-01 1998-11-25 奥地利塑料卡及证件***股份有限公司 具有一个构件和一个无接触应用的传输装置的无接触应用的卡片型数据载体和用于制造一种
US6142381A (en) * 1996-03-15 2000-11-07 Finn; David Contact or contactless chip card with brace
US6374486B1 (en) * 1998-07-20 2002-04-23 Stmicroelectronics S.A. Smart card and process for manufacturing the same
US20030057536A1 (en) * 1999-05-21 2003-03-27 Shinko Electric Industries Co., Ltd. Non-contact type IC card
US20060097911A1 (en) * 2002-07-03 2006-05-11 Quelis Id Systems Inc. Wire positioning and mechanical attachment for a radio-frequency indentification device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110676556A (zh) * 2018-07-03 2020-01-10 三星电子株式会社 天线模块
US10938090B2 (en) 2018-07-03 2021-03-02 Samsung Electronics Co., Ltd. Antenna module
CN110676556B (zh) * 2018-07-03 2021-07-06 三星电子株式会社 天线模块

Also Published As

Publication number Publication date
DE102012205768A1 (de) 2013-10-10
EP2836966B1 (de) 2018-03-28
CN104303195B (zh) 2018-08-31
TWI623883B (zh) 2018-05-11
EP2836966A1 (de) 2015-02-18
WO2013152840A1 (de) 2013-10-17
US20150115038A1 (en) 2015-04-30
TW201351298A (zh) 2013-12-16
TR201808589T4 (tr) 2018-07-23
US9792543B2 (en) 2017-10-17
DE102012205768B4 (de) 2019-02-21
ES2670664T3 (es) 2018-05-31
PL2836966T3 (pl) 2018-08-31
PT2836966T (pt) 2018-05-28

Similar Documents

Publication Publication Date Title
CN104303195A (zh) 转频层及其制造方法
EP2212975B1 (en) Electronic interface apparatus and method and system for manufacturing same
CN103946874B (zh) 复合ic卡
KR101652357B1 (ko) 동시에 두 가지 읽기와 쓰기 모드가 구비된 스마트 카드 및 이것의 생산 방법
AU2009201458B2 (en) Functional laminate
MY154934A (en) Chip card and method for the production of a chip card
ATE497223T1 (de) Einlagen mit doppelschnittstelle
AU2008203252A1 (en) Manufacturing method for a card and card obtained by said method
JP2016500864A (ja) 透明なロゴを有する非接触型スマートカードの製造方法
CN206757681U (zh) 双界面智能卡
CN102567766A (zh) 双界面卡的制作方法以及双界面卡
CN108496187A (zh) 用于制造芯片卡模块的方法和芯片卡
CN105453115A (zh) 用于制造抗龟裂电子设备的方法
CN204680045U (zh) 带指纹模块封装结构的双界面ic卡装置
KR101151025B1 (ko) 접촉 및 비접촉 겸용 카드의 제조방법
US20080191029A1 (en) Method For Manufacturing a Smart Card, a Thus Manufactured Smart Card, and a Method For Manufacturing a Wired Antenna
CN102016886A (zh) 带有收发器的空间结构以及制造其的方法
US7387259B2 (en) Hybrid card
CN104137124B (zh) 便携式数据载体的制造
WO2012059813A2 (en) Sim card and manufacturing method
US20040173377A1 (en) Carrier foil for electronic components, for laminating inside chip cards
CN206178945U (zh) 智能卡
CA2702160C (en) Electronic interface apparatus and method and system for manufacturing same
CN113469319A (zh) 一种采用蚀刻天线的智能卡加工方法
EP1796024A1 (en) Method for the connection of a printed antenna with a RFID module and unit produced by said method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20190621

Address after: Manst, France

Patentee after: LINXENS HOLDING

Address before: Amsterdam city of Holland

Patentee before: Smartrac IP BV