CN104281051A - Method for generating high-precision PWM signal through FPGA - Google Patents
Method for generating high-precision PWM signal through FPGA Download PDFInfo
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- CN104281051A CN104281051A CN201310292135.5A CN201310292135A CN104281051A CN 104281051 A CN104281051 A CN 104281051A CN 201310292135 A CN201310292135 A CN 201310292135A CN 104281051 A CN104281051 A CN 104281051A
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Abstract
The invention relates to a method for generating a high-precision PWM signal through an FPGA and belongs to the technical field of signal processing. The FPGA is adopted for generating a high-frequency time clock signal, and then the high-precision PWM signal is generated. In this way, the problem that according to an existing scheme, the selected model of a DSP chip conflicts with the frequency and precision of the PWM signal is solved, besides, circuit implementation is easy, and the method is suitable for high-precision and small-size control systems including a follow-up image stabilization platform of an imaging guiding system and others.
Description
Technical field
The present invention relates to signal processing technology field, be specifically related to a kind of method utilizing FPGA to produce High-Accuracy PWM signal.
Background technology
For improving system effectiveness, reducing system bulk, PWM (pulse-length modulation) signal in control system, is often adopted to be rotated by H bridge power amplifier drive motor.For the servo-actuated steady picture platform of image-guided systems as the control system of a kind of high precision, small size, mainly at present special DSP (digital signal processing) chip is adopted to produce pwm signal.And the DSP clock of conventional band PWM peripheral hardware is generally no more than 150MHz, the internal clock frequencies of dsp chip determines frequency, the precision of pwm signal, therefore dsp chip select the frequency and precision that limit the pwm signal that it can produce, conversely, the requirement of PWM frequency and precision be also limit to the type selecting of dsp chip.
Therefore, how to design a kind of method of the generation High-Accuracy PWM signal of restriction of not selecting by dsp chip and become technical matters urgently to be resolved hurrily.
Summary of the invention
(1) technical matters that will solve
The technical problem to be solved in the present invention is: how to design a kind of method not selecting the generation High-Accuracy PWM signal of restriction by dsp chip.
(2) technical scheme
In order to solve the problems of the technologies described above, the invention provides a kind of method utilizing FPGA to produce High-Accuracy PWM signal, comprising the following steps:
S1, utilize on-site programmable gate array FPGA to produce high frequency clock signal, and send to counter;
S2, described counter to receive after described high frequency clock signal clock count, count 2
nrear clearing, then counts again, and so circulation is until reach default cycle index, thus produces sawtooth wave, wherein, and the precision figure place of pulse width modulation (PWM) signal of n for producing;
S3, the n-bit data inputted outside by comparer are compared with described sawtooth wave, thus produce pwm signal.
Preferably, described high frequency clock signal is produced by the clock-signal generator module of FPGA.
Preferably, frequency/2 of the frequency=described high frequency clock signal of the pwm signal produced
n.
Preferably, described high frequency clock signal is the clock signal of 300MHz.
Preferably, n=14.
(3) beneficial effect
The present invention adopts FPGA to produce high frequency clock signal, achieve the generation of High-Accuracy PWM signal, not only solve the contradiction between the frequency of dsp chip type selecting and pwm signal in existing scheme, precision, and circuit realiration is simple, is applicable to this kind of high precision of servo-actuated steady picture platform of such as image-guided systems, the control system of small size.
Accompanying drawing explanation
Fig. 1 is method flow diagram of the present invention;
Fig. 2 is the hardware implementing block diagram of method of the present invention;
Fig. 3 is the oscillogram utilizing method of the present invention to produce pwm signal.
Embodiment
For making object of the present invention, content and advantage clearly, below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.
As shown in Figure 1, the invention provides a kind of method utilizing FPGA to produce High-Accuracy PWM signal, comprise the following steps:
S1, utilize inside IP kernel DCM module (clock-signal generator module) of on-site programmable gate array FPGA to produce high frequency clock signal, and send to counter;
S2, described counter to receive after described high frequency clock signal clock count, count 2
nrear clearing, then again count, so circulation is until reach default cycle index (such as 3 times), thus produces sawtooth wave (as shown in the waveform 1 in Fig. 3), wherein, the precision figure place of pulse width modulation (PWM) signal of n for producing;
S3, the n-bit data (as shown in the waveform 2 in Fig. 3) that outside inputted by comparer with as described in sawtooth wave compare, thus produce pwm signal (as shown in the waveform 3 in Fig. 3).
Wherein, frequency/2 of the frequency=described high frequency clock signal of the pwm signal produced
n.When described high frequency clock signal is the clock signal of 300MHz, during the precision figure place n=14 of pwm signal (as shown in Figure 2), the frequency of the pwm signal produced is 18.31KHz.
As can be seen from the above embodiments, the present invention adopts FPGA to produce high frequency clock signal, achieve the generation (realizing by hardware description language) of High-Accuracy PWM signal, not only solve the contradiction between the frequency of dsp chip type selecting and pwm signal in existing scheme, precision, and circuit realiration is simple, is applicable to this kind of high precision of servo-actuated steady picture platform of such as image-guided systems, the control system of small size.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the technology of the present invention principle; can also make some improvement and distortion, these improve and distortion also should be considered as protection scope of the present invention.
Claims (5)
1. utilize FPGA to produce a method for High-Accuracy PWM signal, it is characterized in that, comprise the following steps:
S1, utilize on-site programmable gate array FPGA to produce high frequency clock signal, and send to counter;
S2, described counter to receive after described high frequency clock signal clock count, count 2
nrear clearing, then counts again, and so circulation is until reach default cycle index, thus produces sawtooth wave, wherein, and the precision figure place of pulse width modulation (PWM) signal of n for producing;
S3, the n-bit data inputted outside by comparer are compared with described sawtooth wave, thus produce pwm signal.
2. the method for claim 1, is characterized in that, described high frequency clock signal is produced by the clock-signal generator module of FPGA.
3. the method for claim 1, is characterized in that, frequency/2 of the frequency=described high frequency clock signal of the pwm signal produced
n.
4. the method for claim 1, is characterized in that, described high frequency clock signal is the clock signal of 300MHz.
5. the method according to any one of Claims 1 to 4, is characterized in that, n=14.
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CN201310292135.5A CN104281051A (en) | 2013-07-12 | 2013-07-12 | Method for generating high-precision PWM signal through FPGA |
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Citations (5)
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US20050065618A1 (en) * | 2003-09-22 | 2005-03-24 | Vitaly Burkatovsky | Configurable controller |
CN1778037A (en) * | 2003-05-12 | 2006-05-24 | D2音频有限公司 | Systems and methods for providing multi channel pulse width modulated audio with staggered outputs |
US20070063197A1 (en) * | 2005-09-22 | 2007-03-22 | Vitaly Burkatovsky | Adaptive input-cell circuitry useful in configurable electronic controllers |
CN101304247A (en) * | 2008-04-29 | 2008-11-12 | 哈尔滨工业大学深圳研究生院 | Multi-period random digit pulse-width modulation circuit and method |
CN101499791A (en) * | 2008-01-29 | 2009-08-05 | 力博特公司 | PWM control method |
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2013
- 2013-07-12 CN CN201310292135.5A patent/CN104281051A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1778037A (en) * | 2003-05-12 | 2006-05-24 | D2音频有限公司 | Systems and methods for providing multi channel pulse width modulated audio with staggered outputs |
US20050065618A1 (en) * | 2003-09-22 | 2005-03-24 | Vitaly Burkatovsky | Configurable controller |
US20070063197A1 (en) * | 2005-09-22 | 2007-03-22 | Vitaly Burkatovsky | Adaptive input-cell circuitry useful in configurable electronic controllers |
CN101499791A (en) * | 2008-01-29 | 2009-08-05 | 力博特公司 | PWM control method |
CN101304247A (en) * | 2008-04-29 | 2008-11-12 | 哈尔滨工业大学深圳研究生院 | Multi-period random digit pulse-width modulation circuit and method |
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Application publication date: 20150114 |