CN104218787B - The control method and equipment of a kind of PFC - Google Patents
The control method and equipment of a kind of PFC Download PDFInfo
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- CN104218787B CN104218787B CN201310215279.0A CN201310215279A CN104218787B CN 104218787 B CN104218787 B CN 104218787B CN 201310215279 A CN201310215279 A CN 201310215279A CN 104218787 B CN104218787 B CN 104218787B
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Abstract
The present invention provides a kind of control method and equipment of PFC, using the half period of AC power as a controlling cycle, one controlling cycle is divided into three phases,, as the first control stage and the 3rd control stage, the stage is being controlled using current peak part as second close to the part of voltage over zero；Electric current is smaller in first control stage and the second control stage, pwm pulse signal is exported to power device, and the high level width of first pwm pulse signal in the first control stage successively decreases successively, the high level width of second pwm pulse signal in the second control stage is incremented by successively；Electric current corresponding to second control stage is bigger, therefore the stage does not export pwm pulse signal, and power device is constantly in off state.The regional compensation relatively low to controlling cycle both ends electric current, intermediate peak region uncompensation, current waveform adjustment is tended into sine wave, power device need not frequent break-make always, improve power factor, reduce harmonic wave.
Description
Technical field
The present invention relates to power factor correction technology field, the control method of more particularly to a kind of PFC and set
It is standby.
Background technology
With the offer of commercial production levels and living standards of the people, the non-linear electrical equipment largely used is in power network
Increasing harmonic wave is generated, not only increases the loss of power network power supply, influences the normal operation of electric network protection device, and
Reduce the power factor of electrical equipment.
Transducer air conditioning just belongs to non-linear electrical equipment, therefore, in order to suppress the generation of harmonic wave and provide power because
Number, introduces PFC in transducer air conditioning（PFC, Power Factor Correction）Technology.
PFC basic ideas are exactly that input current waveform tends to sine wave and small with input voltage phase subtractive as far as possible.
At present, PFC technologies can be divided into PPFC（PPFC）And APFC（APFC）.
PPFC mainly forms filter using inductance and electric capacity etc., the waveform of filter adjustment input current and
Phase offset.The advantages of PPFC is that circuit is fairly simple, cost is low, electromagnetic interference is few, working stability.This is that PPFC is electrically being returned
On the basis of road determines, current waveform and phase are adjusted by electric elements self performance, therefore adjustable extent is smaller, power
Factor raising is also limited, typically can only be to 0.9 or so.
APFC is mainly that the make-and-break time for controlling power device adjusts input current waveform and its phase offset.According to work(
The number of rate device break-make can be divided into simple active and complete active.
Simple active APFC refers to only carry out the break-make of 1 to 5 times after each supply voltage zero passage inputs.This mode
Advantage is that circuit design is simpler, but needs to use high-capacity reactor just harmonic wave can be made to reach better effects, and power factor
Lifted limited.The current harmonics effect in inductor loop to suppressing the general relatively low capacity in market is also undesirable.From cost and
It is not good scheme in effect.
Complete active APFC is to carry out continual quick on-off to power device（Pulse frequency typically 20kHz with
On), current waveform can be similar to sine wave, and power factor can reach 0.99.But this technology has the disadvantage that：Hardware
On, if using power frequency device, because break-make frequency is high, device is caused compared with lossy, influence service life；If using high
Frequency device, loop complex designing can be more complicated, considerably increase use cost again.Further, since carrier frequency is very high, typically
Special PFC driving chips or Master control chip is needed to use to realize that the two all can using the MCU or DSP of high operational capability
Use cost is improved, is unfavorable for market competition.
To sum up, or the PFC in currently available technology is exactly that cost simple in construction is low, but effect is bad；It is exactly
Effect is pretty good, but cost is high.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of control method and equipment of transducer power factor correcting, work(
Rate factor compensation effect is good, can improve power factor, and cost is low.
The embodiment of the present invention provides a kind of control method of PFC, comprises the following steps：
Using between the adjacent zero crossing twice of AC supply voltage as a controlling cycle, in the controlling cycle
Three control stages are divided into according to the input current value of AC or DC side；
The first stage refers to rise to peak value to the input current value since the zero crossing of AC supply voltage
The a% of electric current；The phase III refers to drop to the b% of the peak point current to next AC power from the input current value
Voltage over zero；The second stage referred in a controlling cycle except the interstage after first stage and phase III；
In first control stage, with the on or off of the first pwm pulse signal driving power device；It is described the first
The high level width of pwm pulse signal successively decreases successively；
In second control stage, stop output pwm pulse signal, the power device shut-off；
In 3rd control stage, with the on or off of second of pwm pulse signal driving power device；Described second
The high level width of pwm pulse signal is incremented by successively.
Preferably, including：In each control stage, the high level width of first pwm pulse be by DC voltage and
Set what reference voltage determined, the DC voltage is the DC voltage of detection in each controlling cycle；Specially：
When DC voltage is less than the setting reference voltage, by the height electricity of first pwm pulse in the control stage
Flat width increase；Otherwise reduce.
Preferably, the high level width of the first pwm pulse signal successively decreases successively；Specifically according to below equation：
Tn=Tn-1-Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
Preferably, the high level width of second of pwm pulse signal is incremented by successively；Specifically according to below equation：
Tn=Tn-1+Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；N is positive integer；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
Preferably, a is equal with b；
A is the ratio of effective current and peak point current
The embodiment of the present invention also provides a kind of control device of PFC, including：Control divided stages unit and
Control unit；
It is described control divided stages unit, between the adjacent zero crossing twice using AC supply voltage as one
Controlling cycle, three control stages are divided into according to the input current value of AC or DC side in the controlling cycle；Institute
State the a% that the first stage refers to rise to peak point current to the input current value since the zero crossing of AC supply voltage；Institute
Stating the phase III refers to drop to the b% of the peak point current to next AC supply voltage zero crossing from the input current value；
The second stage referred in a controlling cycle except the interstage after first stage and phase III；
Described control unit, in the first control stage, with the conducting of the first pwm pulse signal driving power device or pass
It is disconnected；The high level width of the first pwm pulse signal successively decreases successively；In second control stage, stop output pwm pulse letter
Number, the power device shut-off；In 3rd control stage, with the conducting of second pwm pulse signal driving power device or pass
It is disconnected；The high level width of second of pwm pulse signal is incremented by successively.
Preferably, in addition to DC voltage detection unit；
The DC voltage detection unit, will for the voltage of each controlling cycle detection active PFC circuit DC side
The voltage of DC side is sent to described control unit；
Described control unit includes the high level width determining unit of comparing subunit and first pwm pulse；
The comparing subunit, for by the DC voltage compared with setting reference voltage；
The high level width determining unit of first pwm pulse, join when the DC voltage is less than the setting
When examining voltage, increased with by the high level width of first pwm pulse in the control stage, otherwise reduced.
Preferably, described control unit also includes the first pwm pulse signal generating subunit, is obtained by below equation
The high level width of each pwm pulse signal in the first pwm pulse signal；
Tn=Tn-1-Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
Preferably, described control unit also includes second of pwm pulse signal generating subunit, is obtained by below equation
The high level width of each pwm pulse signal in second of pwm pulse signal；
Tn=Tn-1+Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；N is positive integer；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
Preferably,
The a is equal with b；
A is the ratio of effective current and peak point current
Compared with prior art, the present invention has advantages below：
The control method of PFC provided by the invention, using the half period of AC power as a control week
Phase, naturally it is also possible to be interpreted as using a cycle of dc source as a controlling cycle.This method is by a controlling cycle
It is divided into three phases, the stage is being controlled as the first control stage and the 3rd close to the part of voltage over zero, by current peak
Part is as the second control stage；Because electric current is smaller in the first control stage and the second control stage, therefore export PWM arteries and veins
Signal is rushed to power device, and the high level width of first pwm pulse signal in the first control stage successively decreases successively, the second control
The high level width of second pwm pulse signal in stage processed is incremented by successively；Because electric current corresponding to the second control stage is bigger,
Therefore the stage does not export pwm pulse signal, and power device is constantly in off state.This method is to a controlling cycle both ends
The relatively low region of electric current compensates, and intermediate peak region does not compensate, and so can both adjust current waveform tends to be sinusoidal
Ripple, at the same power device need not frequent break-make always, can so effectively improve power factor, reduce harmonic wave, power because
Number compensation effect is good.
Brief description of the drawings
Fig. 1 is a kind of active PFC provided by the invention circuit diagram；
Fig. 2 is the flow chart of control method embodiment one of PFC provided by the invention；
Fig. 3 is the present invention waveform diagram of input voltage and input current in the prior art；
Fig. 4 is the pwm pulse signal schematic diagram in the first control stage in the embodiment of the present invention；
Fig. 5 is the oscillogram of AC input current and AC-input voltage provided by the invention；
Fig. 6 is the schematic diagram of control device embodiment one of PFC provided by the invention；
Fig. 7 is the schematic diagram of control device embodiment two of PFC provided by the invention；
Fig. 8 is the schematic diagram of control device embodiment three of PFC provided by the invention.
Embodiment
First of all for better understood when those skilled in the art and implement technical scheme provided by the invention, below
Basic the composition structure and its operation principle of following active PFC circuit is discussed in detail with reference to accompanying drawing first.
Referring to Fig. 1, the figure is a kind of active PFC provided by the invention circuit diagram.
AC power AC by the rectification of rectifier 100 be direct current after export.Rectifier in Fig. 1 is full-bridge, by four
Diode connection composition, respectively the first diode D1, the second diode D2, the 3rd diode D3 and the 4th diode D4.
It should be noted that the voltage of the output end of rectifier 100 is exactly direct current, it is to be understood that AC power AC is passed through
After over commutation, the cycle of dc source is exactly the half in the cycle of AC power.
After power device G is turned on, DC voltage is added in radio-frequency rector L both sides, and L produces instantaneous large-current；The electric current
Power device G is flowed into from the output cathode of rectifier 100, then flow back into DC power cathode DC-.
It should be noted that the L can also be industrial frequency reactor, the cost of industrial frequency reactor than radio-frequency rector into
This is low.
To give L chargings when power device G is turned on, electric current flow through power device G and without load R.As power device G
During disconnection, L electric discharges, load R and C is flowed to together with source current, but electric current is just only when A points voltage is more than B point voltages
Can be by D, at this moment current direction electric capacity C is charged, and when A points voltage is less than B point voltages, electric current can not pass through diode
D, at this moment electric capacity C, which discharges, gives load R power supplies, so electric capacity C discharge and recharges are frequent, supply load R voltage pulsation is just smaller.
When power device G ends, positive voltage of inducting caused by radio-frequency rector L makes electric current pass through fast recovery diode
D, flow to electrochemical capacitor C and it is charged；Because fast recovery diode D one-way conduction characteristic, the voltage on C will not add
In power device G drain electrode；When the pwm pulse using high carrier frequency makes the frequent turn-on and turn-off of G, DC current can quilt
Pull-up is simultaneously constantly charged by L, D to C, so as to play a part of power factor compensation and lifting DC voltage.
In order to facilitate the understanding of the purposes, features and advantages of the present invention, below in conjunction with the accompanying drawings to the present invention
Embodiment be described in detail.
Referring to Fig. 2, the figure is the flow chart of control method embodiment one of PFC provided by the invention.
A kind of control method for PFC that the present embodiment provides, comprises the following steps：
S201：Using between the adjacent zero crossing twice of AC supply voltage as a controlling cycle, in the control
Three control stages are divided into according to the input current value of AC or DC side in cycle；
The first stage refers to rise to peak value to the input current value since the zero crossing of AC supply voltage
The a% of electric current；The phase III refers to drop to the b% of the peak point current to next AC power from the input current value
Voltage over zero；The second stage referred in a controlling cycle except the interstage after first stage and phase III；
S202：In first control stage, with the on or off of the first pwm pulse signal driving power device；It is described
The high level width of the first pwm pulse signal successively decreases successively；In second control stage, stop output pwm pulse signal, it is described
Power device turns off；In 3rd control stage, with the on or off of second of pwm pulse signal driving power device；It is described
The high level width of second of pwm pulse signal is incremented by successively.
Because in the first control stage, input current gradually increases, therefore, the height electricity of the first pwm pulse signal
Flat width successively decreases successively；In second control stage, because input current is maximum peak phase, therefore, this stage does not have PWM
Output of pulse signal, power device are off state；3rd control stage, because input current is gradually reduced, therefore,
The high level width of second of pwm pulse signal is incremented by successively.So control, the waveform and input electricity of input current can be adjusted
The waveform of pressure approaches, and tends to sine wave.
The control method of PFC provided by the invention, using the half period of AC power as a control week
Phase, naturally it is also possible to be interpreted as using a cycle of dc source as a controlling cycle.This method is by a controlling cycle
It is divided into three phases, the stage is being controlled as the first control stage and the 3rd close to the part of voltage over zero, by current peak
Part is as the second control stage；Because electric current is smaller in the first control stage and the second control stage, therefore export PWM arteries and veins
Signal is rushed to power device；And the high level width of first pwm pulse signal in the first control stage successively decreases successively, the second control
The high level width of second pwm pulse signal in stage processed is incremented by successively；Because electric current corresponding to the second control stage is bigger,
Therefore the stage does not export pwm pulse signal, and power device is constantly in off state.This method is to a controlling cycle both ends
The relatively low region of electric current compensates, and intermediate peak region does not compensate, and so can both adjust current waveform tends to be sinusoidal
Ripple, at the same power device need not frequent break-make always, can so effectively improve power factor, reduce harmonic wave, power because
Number compensation effect is good.
In addition, relative to the complete active PFC using power frequency device, present invention employs more low-frequency driving carrier wave,
And controlled for discontinuous break-make.Although harmonic suppression effect and power factor are declined slightly, because break-make frequency is low, and part
Power device is turned off in time, power device loss is greatly reduced；And carry out module using in general main control chip
It can be achieved after changing programming, it is not high (16 MCU can be achieved) to integrated main control chip requirement without special chip yet, because
This, cost is relatively low.
In order that those skilled in the art more fully understand and known from experience the advantages of above method of the present invention is brought, it is described below
In the prior art not power factor correcting when, the waveform of input voltage and input current.
Referring to Fig. 3, the figure is the waveform diagram of input voltage and input current in the prior art.
Vdc in Fig. 3 represents to load the voltage at R both ends in Fig. 1；Vac represents the voltage of AC power output；Iac is represented
When having load R, the input current of the output current of AC power, i.e. rectifier.
From the figures it is clear that Vac is the sine wave of a standard, and Iac is not the sine wave of a standard,
It is zero that Iac crosses null part to have one section close to Vac.Therefore Vac and Iac phase is inconsistent, and caused current harmonics can be to power network
Cause a certain degree of pollution；This is exactly the cause of PFC because the effect of PFC be exactly in order that
Vac and Iac phase is consistent as much as possible, is so ensured higher power factor, can also be suppressed the influence of harmonic wave.
A specific embodiment of the present invention is described in detail below.
In first control stage, because input current is the trend that gradually increases before not compensating, therefore, at this
In the individual stage, the high level width of pwm pulse signal is successively decreased successively.
Referring specifically to Fig. 4, the figure is the pwm pulse signal schematic diagram in the first control stage in the embodiment of the present invention.
In order to facilitate understanding, only it is introduced in Fig. 4 by taking the pwm pulse signal in several controlling cycles as an example.
0-t1For the first controlling cycle, the like, t7-t8It is the 8th controlling cycle.
First controlling cycle to the 5th controlling cycle it is apparent that the high level width of pwm pulse signal be according to
It is secondary to successively decrease, the high level width per n controlling cycle pwm pulse signals, i.e. T1 are represented with Tn>T2>T3>T4>T5>T6.
Figure 4, it is seen that stop output pwm pulse signal since the 6th controlling cycle, i.e., corresponding power
Device is constantly in off-state.
Specifically, the high level width that pwm pulse signal is specifically introduced with reference to formula is passed with what kind of rule
Subtract.
The high level width of the first pwm pulse signal successively decreases successively；Specifically according to below equation：
Tn=Tn-1-Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
It should be noted that in each control stage（Including the first control stage and the 3rd control stage）, first PWM
The high level width of pulse is determined by DC voltage and setting reference voltage, and the DC voltage is each control week
The DC voltage of detection in phase；Specially：
When DC voltage is less than the setting reference voltage, by the height electricity of first pwm pulse in the control stage
Flat width increase；Otherwise reduce.
Assuming that there be M1 pwm pulse in the first control stage；Utilize method provided by the invention, i.e., the height of the 1st pwm pulse
Level width is maximum, and the time of power device conducting is most long；The high level width of the M1 pwm pulse is minimum, and power device is led
The logical time is most short.
The high level width of the 1st pwm pulse refers to according to the DC voltage of detection and setting in each controlling cycle
The difference of voltage makes adjustments, and the 2nd to M1 pwm pulse follows the 1st pwm pulse respective change.
The form that the high level width of pwm pulse signal successively decreases successively is described above, was described below for the 3rd control stage
It is interior, the high level width of second of pwm pulse signal form incremented by successively, in fact, principle and the above-mentioned phase increased and decreased successively
Together.
The high level width of second of pwm pulse signal is incremented by successively specifically according to below equation：
Tn=Tn-1+Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；N is positive integer；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
Because within the 3rd control stage, input current is gradually reduced, therefore, the pwm pulse signal in this stage
Corresponding high level width is incremented by successively, and when detecting supply voltage zero passage next time, the 3rd control stage completed, i.e., one
Individual controlling cycle terminates.
It is, of course, understood that a and b value can also differ.
It should be noted that the peak point current is obtained by the average current in a upper mains voltage cycle.
In order that beneficial effects of the present invention are more clear understandable, carry out labor with reference to Fig. 5 and Fig. 3.
From figure 5 it can be seen that after method provided by the invention regulation, input current Iac waveform and input
Voltage Vac phase equalization is improved.
Most importantly, Iac is being not no signal close to the part of Vac zero crossings, is zero there is no one section.This hair
Iac in bright gradually rises to peak value since zero crossing, then gradually decreases to zero point from peak value.T1 is first control week
Phase, by that analogy, t4 are the 4th controlling cycles.
Iac corresponding to ta is the a% of current peak；Iac corresponding to tb is the b% of current peak.
In order that control method is simpler, a can be made equal with b；I.e.
A and b can be the ratio of effective current and peak point current
It should be noted that preferably selecting, above method provided by the invention is to the power device in active PFC circuit
Part uses 8~14KHz pwm pulse signal frequency.Due to this frequency range, more than the 20KHz of more whole active PFC type of drive
Frequency range it is much lower, the requirement to MCU processing speeds declines to a great extent, and reduces the loss of power device, while again
It can keep to the preferable lifting effect of D/C voltage.MCU is the master controller in active PFC.
The method of control method based on above-mentioned transducer power factor correcting, present invention also offers transducer power because
The control device of number correction, its part is described in detail with reference to specific embodiment.
Referring to Fig. 6, the figure is the schematic diagram of control device embodiment one of PFC provided by the invention.
The control device for the PFC that the present embodiment provides, including：Control divided stages unit 600 and control single
Member 700；
The control divided stages unit 600, between the adjacent zero crossing twice using AC supply voltage as
One controlling cycle, three control ranks are divided into according to the input current value of AC or DC side in the controlling cycle
Section；The first stage refers to rise to peak point current to the input current value since the zero crossing of AC supply voltage
a%；The phase III refers to drop to the b% of the peak point current to next AC supply voltage mistake from the input current value
Zero point；The second stage referred in a controlling cycle except the interstage after first stage and phase III；
Described control unit 700, in the first control stage, with the conducting of the first pwm pulse signal driving power device
Or shut-off；The high level width of the first pwm pulse signal successively decreases successively；In second control stage, stop output PWM arteries and veins
Rush signal, the power device shut-off；In 3rd control stage, with the conducting of second of pwm pulse signal driving power device
Or shut-off；The high level width of second of pwm pulse signal is incremented by successively.
Because in the first control stage, input current gradually increases, therefore, the height electricity of the first pwm pulse signal
Flat width successively decreases successively；In second control stage, because input current is maximum peak phase, therefore, this stage does not have PWM
Output of pulse signal, power device are off state；3rd control stage, because input current is gradually reduced, therefore,
The high level width of second of pwm pulse signal is incremented by successively.So control, the waveform and input electricity of input current can be adjusted
The waveform of pressure approaches, and tends to sine wave.
The control device of PFC provided by the invention, using the half period of AC power as a control week
Phase, naturally it is also possible to be interpreted as using a cycle of dc source as a controlling cycle.This method is by a controlling cycle
It is divided into three phases, the stage is being controlled as the first control stage and the 3rd close to the part of voltage over zero, by current peak
Part is as the second control stage；Because electric current is smaller in the first control stage and the second control stage, therefore export PWM arteries and veins
Signal is rushed to power device；And the high level width of first pwm pulse signal in the first control stage successively decreases successively, the second control
The high level width of second pwm pulse signal in stage processed is incremented by successively；Because electric current corresponding to the second control stage is bigger,
Therefore the stage does not export pwm pulse signal, and power device is constantly in off state.This equipment is to a controlling cycle both ends
The relatively low region of electric current compensates, and intermediate peak region does not compensate, and so can both adjust current waveform tends to be sinusoidal
Ripple, at the same power device need not frequent break-make always, can so effectively improve power factor, reduce harmonic wave, power because
Number compensation effect is good.
In addition, relative to the complete active PFC using power frequency device, present invention employs more low-frequency driving carrier wave,
And controlled for discontinuous break-make.Although harmonic suppression effect and power factor are declined slightly, because break-make frequency is low, and part
Power device is turned off in time, power device loss is greatly reduced；And carry out module using in general main control chip
It can be achieved after changing programming, it is not high (16 MCU can be achieved) to integrated main control chip requirement without special chip yet, because
This, cost is relatively low.
Referring to Fig. 7, the figure is the schematic diagram of control device embodiment two of PFC provided by the invention.
The control device for the PFC that the present embodiment provides, in addition to DC voltage detection unit 800；
The DC voltage detection unit 800, the electricity for each controlling cycle detection active PFC circuit DC side
Pressure, described control unit 700 is sent to by the voltage of DC side；
Described control unit 700 includes the high level width determining unit of comparing subunit 701 and first pwm pulse
702；
The comparing subunit 701, for by the DC voltage compared with setting reference voltage；
The high level width determining unit 702 of first pwm pulse, when the DC voltage is less than the setting
During reference voltage, use will control the stage（Including the first control stage and the 3rd control stage）The height of first interior pwm pulse
The increase of level width, on the contrary reduce.
Referring to Fig. 8, the figure is the schematic diagram of control device embodiment three of PFC provided by the invention.
The described control unit that the present embodiment provides includes the first pwm pulse signal generating subunit 703, by following public affairs
Formula obtains the high level width of each pwm pulse signal in the first pwm pulse signal；
Tn=Tn-1-Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
Assuming that there be M1 pwm pulse in the first control stage；Utilize method provided by the invention, i.e., the height of the 1st pwm pulse
Level width is maximum, and the time of power device conducting is most long；The high level width of the M1 pwm pulse is minimum, and power device is led
The logical time is most short.
The high level width of the 1st pwm pulse refers to according to the DC voltage of detection and setting in each controlling cycle
The difference of voltage makes adjustments, and the 2nd to M1 pwm pulse follows the 1st pwm pulse respective change.
Described control unit includes second of pwm pulse signal generating subunit 704, is obtained second by below equation
The high level width of each pwm pulse signal in pwm pulse signal；
Tn=Tn-1+Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；N is positive integer；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
Because within the 3rd control stage, input current is gradually reduced, therefore, the pwm pulse signal in this stage
Corresponding high level width is incremented by successively, and when detecting supply voltage zero passage next time, the 3rd control stage completed, i.e., one
Individual controlling cycle terminates.
It is, of course, understood that a and b value can also differ.
It should be noted that the peak point current is obtained by the average current in a upper mains voltage cycle.
From figure 5 it can be seen that after method provided by the invention regulation, the input current Idc of DC side ripple
The input voltage Vdc of shape and DC side phase equalization is improved.
Most importantly, Idc is being not no signal close to the part of Vdc zero crossings, is zero there is no one section.This hair
Idc in bright gradually rises to peak value since zero crossing, then gradually decreases to zero point from peak value.T1 is first control week
Phase, by that analogy, t4 are the 4th controlling cycles.
Idc corresponding to ta is the a% of current peak；Idc corresponding to tb is the b% of current peak.
In order that control method is simpler, a can be made equal with b；I.e.
A and b can be the ratio of effective current and peak point current
It should be noted that preferably selecting, above equipment provided by the invention is to the power device in active PFC circuit
Part uses 8~14KHz pwm pulse signal frequency.Due to this frequency range, more than the 20KHz of more whole active PFC type of drive
Frequency range it is much lower, the requirement to MCU processing speeds declines to a great extent, and reduces the loss of power device, while again
It can keep to the preferable lifting effect of D/C voltage.MCU is the master controller in active PFC.
The above described is only a preferred embodiment of the present invention, any formal limitation not is made to the present invention.Though
So the present invention is disclosed above with preferred embodiment, but is not limited to the present invention.It is any to be familiar with those skilled in the art
Member, without departing from the scope of the technical proposal of the invention, all using the methods and technical content of the disclosure above to the present invention
Technical scheme makes many possible changes and modifications, or is revised as the equivalent embodiment of equivalent variations.Therefore, it is every without departing from
The content of technical solution of the present invention, the technical spirit according to the present invention is to any simple modification made for any of the above embodiments, equivalent
Change and modification, still fall within technical solution of the present invention protection in the range of.
Claims (8)
1. a kind of control method of PFC, it is characterised in that comprise the following steps：
Using between the adjacent zero crossing twice of AC supply voltage as a controlling cycle, the basis in the controlling cycle
The input current value of AC or DC side is divided into three control stages；
The first stage refers to rise to peak point current to the input current value since the zero crossing of AC supply voltage
A%；The phase III refers to that the b% for dropping to the peak point current from the input current value is electric to next AC power
Press through zero point；The second stage referred in a controlling cycle except the interstage after first stage and phase III；
In first control stage, with the on or off of the first pwm pulse signal driving power device；The first described PWM
The high level width of pulse signal successively decreases successively；
In second control stage, stop output pwm pulse signal, the power device shut-off；
In 3rd control stage, with the on or off of second of pwm pulse signal driving power device；Second of PWM
The high level width of pulse signal is incremented by successively；
The high level width of the first pwm pulse signal successively decreases successively；Specifically according to below equation：
Tn=Tn-1-Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
2. the control method of PFC according to claim 1, it is characterised in that including：Each control stage
Interior, the high level width of first pwm pulse is determined by DC voltage and setting reference voltage, the DC voltage
For the DC voltage detected in each controlling cycle；Specially：
It is when DC voltage is less than the setting reference voltage, the high level of first pwm pulse in the control stage is wide
Degree increase；Otherwise reduce.
3. the control method of PFC according to claim 2, it is characterised in that second of pwm pulse
The high level width of signal is incremented by successively；Specifically according to below equation：
Tn=Tn-1+Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；N is positive integer；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
4. the control method of the PFC according to claim any one of 1-3, it is characterised in that a and b phases
Deng；
A is the ratio of effective current and peak point current
A kind of 5. control device of PFC, it is characterised in that including：Control divided stages unit and control unit；
The control divided stages unit, for being controlled between the adjacent zero crossing twice using AC supply voltage as one
In the cycle, three control stages are divided into according to the input current value of AC or DC side in the controlling cycle；Described
One stage referred to the a% for rising to peak point current to the input current value since the zero crossing of AC supply voltage；It is described
Phase III refers to drop to the b% of the peak point current to next AC supply voltage zero crossing from the input current value；
The second stage referred in a controlling cycle except the interstage after first stage and phase III；
Described control unit, in the first control stage, with the on or off of the first pwm pulse signal driving power device；
The high level width of the first pwm pulse signal successively decreases successively；In second control stage, stop output pwm pulse signal,
The power device shut-off；In 3rd control stage, with the on or off of second of pwm pulse signal driving power device；
The high level width of second of pwm pulse signal is incremented by successively；
Described control unit also includes the first pwm pulse signal generating subunit, and the first PWM arteries and veins is obtained by below equation
The high level width of each pwm pulse signal rushed in signal；
Tn=Tn-1-Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
6. the control device of PFC according to claim 5, it is characterised in that also examined including DC voltage
Survey unit；
The DC voltage detection unit, for the voltage of each controlling cycle detection active PFC circuit DC side, by direct current
The voltage of side is sent to described control unit；
Described control unit includes the high level width determining unit of comparing subunit and first pwm pulse；
The comparing subunit, for by the DC voltage compared with setting reference voltage；
The high level width determining unit of first pwm pulse, when the DC voltage is less than the setting with reference to electricity
During pressure, increased with by the high level width of first pwm pulse in the control stage, otherwise reduced.
7. the control device of PFC according to claim 6, it is characterised in that described control unit also includes
Second of pwm pulse signal generating subunit, believed by below equation to obtain each pwm pulse in second of pwm pulse signal
Number high level width；
Tn=Tn-1+Kp/ΔIn
Inref=Ipk*sin(π*n(2Fqs)/Fqc)
Wherein, KpFor attenuation coefficient；
TnFor the high level width of n-th of pwm pulse signal；N is positive integer；
InThe total current of corresponding DC loop when being n-th of pwm pulse signal output；
InrefIt is the reference current of n-th of pwm pulse signal；
IpkIt is the peak point current of previous controlling cycle；
FqsIt is mains frequency, FqcIt is the frequency of pwm pulse signal.
8. the control device of the PFC according to claim any one of 5-7, it is characterised in that
The a is equal with b；
A is the ratio of effective current and peak point current
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| CN111999542A (en) * | 2019-05-08 | 2020-11-27 | 上海海立电器有限公司 | Method for debugging harmonic current |
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| TW200507431A (en) * | 2003-08-11 | 2005-02-16 | Delta Electronics Inc | Current-balancing method and device for controlling the power-factor-correction circuit interlacedly |
| KR20050111204A (en) * | 2004-05-21 | 2005-11-24 | 엘지전자 주식회사 | Method for power factor compensation of inverter control circuit |
| CN101217255B (en) * | 2008-01-16 | 2010-12-22 | 艾默生网络能源有限公司 | A PFC circuit with current sharing control module and the corresponding current sharing control method |
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