CN104181844B - interactive platform terminal - Google Patents

interactive platform terminal Download PDF

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Publication number
CN104181844B
CN104181844B CN201410411074.4A CN201410411074A CN104181844B CN 104181844 B CN104181844 B CN 104181844B CN 201410411074 A CN201410411074 A CN 201410411074A CN 104181844 B CN104181844 B CN 104181844B
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chip
signal input
shell
am335x
directionally connected
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CN104181844A (en
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颜庆国
董立军
钱昱
王金铭
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Nanjing Xinlian Electronic Co., Ltd.
State Grid Jiangsu Electric Power Co Ltd
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NANJING XINLIAN ELECTRONIC CO Ltd
State Grid Jiangsu Electric Power Co Ltd
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Abstract

The present invention is interactive platform terminal, its structure is the top that touch screen 1 and LCM 2 is fixed on A shell 3 respectively by double faced adhesive tape, speaker 5 and process plate Ass 6 are separately fixed at the bottom of A shell 3, handle 4 is fixed on the side of A shell 3 by buckle structure, A shell 3 is fixedly connected with B shell 14, sliding support 12, B shell 14, C shell 17 are combined successively, can relative slide between B shell 14 with C shell 17;Setting communication module storehouse between A shell 3 and B shell 14, communication module is fixed by snap in this communication module storehouse.Advantage: brand-new surface structure, contact action;Vast capacity internal memory is big, improves the density of data storage;Functional configuration is comprehensive, it is achieved demanding party's requirement;Maintenance is installed convenient;Information can be preserved the most for a long time;Possessing UPS function, alternating current alarm for power-off, battery ensure that power supply more than 3h;Work more reliable and more stable.

Description

Interactive platform terminal
Technical field
The present invention is interactive platform terminal, belongs to wireless data transmission technology field.
Background technology
There is a lot of problem in existing power information acquisition terminal, such as: complex management, for specially becoming user, each power distribution station is equipped with a terminal, and each terminal is managed by system, and management difficulty is bigger;Construction trouble: in the face of collection point, control point disperses;The existing terminal of situation gathered and control to separate cannot solve, or needs to increase difficulty of construction solution;Enterprises service lacks: existing terminal is arranged on user side, but does not provide well service for enterprise customer.Specifically, user cannot see curve distribution or the block diagram distribution of the data collected by terminal, cannot understand to understand power load trend and the power consumption trend of oneself enterprises;The secondary table data of enterprise customer cannot gather, it is impossible to allows enterprise be clearly seen that the use distribution situation of internal electric resources;Enterprise customer cannot see data in terminal etc. easily.
Summary of the invention
What the present invention proposed is interactive platform terminal, its purpose is intended to the drawbacks described above overcoming prior art to exist, realize good interactive, reduce install, the work difficulty of attendant, it is provided that with the interaction function of enterprise customer, provide the user electric energy efficiency management service, and use simple, accomplish that a user only needs a corresponding file administration in system, it is possible to distributed installation nearby gathers and control module, wireless mode can be used, reduce difficulty of construction.
The technical solution of the present invention: interactive platform terminal, its structure includes touch screen, LCM, A shell, handle, speaker, process plate Ass, communication module, sliding support, B shell, MS729-30 door lock, C shell, interface board Ass, radio antenna cable, antenna fixing stand, radio station, D shell, end cap, hook, battery cover, set of cells, power subsystem;Wherein touch screen and LCM are fixed on the top of A shell respectively by double faced adhesive tape, speaker and process plate Ass are separately fixed at the bottom of A shell, handle is fixed on the side of A shell by buckle structure, A shell is fixedly connected with B shell, sliding support, B shell, C shell are combined successively, can relative slide between B shell with C shell;Communication module storehouse is set between A shell and B shell, communication module is fixed by snap in this communication module storehouse, this communication module includes antenna, communication module upper cover, communication module PCB Ass, communication module lower cover, wherein antenna is arranged on the side of communication module upper cover, communication module upper cover passes through buckle and communication module lower cover stationary positioned, communication module PCB Ass is set between communication module upper cover and communication module lower cover, AM335x master chip is set on this communication module PCB Ass, MS729-30 door lock is set in lockhole on B shell, this MS729-30 door lock is fixed on the front portion of B shell by the nut carried;Interface board Ass and antenna fixing stand are separately fixed at the front portion of C shell, power subsystem is fixed on the bottom of C shell, this C shell sets battery compartment, sets set of cells in this battery compartment, battery cover it is stamped on battery compartment, this battery cover is fixed by snap with C shell, and the front portion of C shell sets radio antenna cable, and C shell is fixing with D shell to be connected, storehouse, radio station is set between C shell and D shell, setting radio station in this storehouse, radio station, end cap is fixed on the front portion of D shell, and hook is fixed on the bottom of D shell.
Advantages of the present invention:
1) brand-new outward appearance, structure, giant-screen taps operation, brings complete new experience;
2) vast capacity internal memory, " memory " is higher, is greatly improved the density of data storage;
3) comprehensive functional configuration, realizes demanding party's requirement comprehensively;
4) maintenance is installed convenient, with A13 terminal installing hole, terminal interface definition compatibility;
5) preservation of hardware clock, parameter preservation and historical data can keep more than 1 year in the event of a power failure;
6) terminal possesses UPS function, alternating current alarm for power-off, and battery ensure that power supply more than 3h under communication state;
7) the brand-new software and hardware unified platform, the work making whole system is more stable, reliable;
8) brand-new platform terminal concept, brings the system scheme of most worthy.
Accompanying drawing explanation
Fig. 1 is the mounting structure schematic diagram of interactive platform terminal.
Fig. 2-1 is the Part I electrical schematic diagram of interactive platform terminal.
Fig. 2-2 is the Part II electrical schematic diagram of interactive platform terminal.
nullIn figure 1 is touch screen、2 is LCM、3 is A shell、4 is handle、5 is speaker、6 is to process plate Ass、7 is antenna、8 is ST2.9 tapping screw (totally 13 pieces)、9 is communication module upper cover、10 is communication module PCB Ass、11 is communication module lower cover、12 is sliding support、13 is M4 screw assemblies (totally 10 pieces)、14 is B shell、15 is GB/T818 M3 screw (totally 11 pieces)、16 is MS729-30 door lock、17 is C shell、18 is interface board Ass、19 is radio antenna cable、20 is antenna fixing stand、21 is radio station、22 is D shell、23 is M4 customization screw (totally 2 pieces)、24 is end cap、25 is hook、26 is battery cover、27 is set of cells、28 is GB/T9074.4 M3 screw association part (totally 4 pieces)、29 is power subsystem.
Detailed description of the invention
As shown in Figure 1, interactive platform terminal, its structure includes touch screen 1, LCM 2, A shell 3, handle 4, speaker 5, processes plate Ass 6, communication module, sliding support 12, B shell 14, MS729-30 door lock 16, C shell 17, interface board Ass 18, radio antenna cable 19, antenna fixing stand 20, radio station 21, D shell 22, end cap 24, hook 25, battery cover 26, set of cells 27, power subsystem 29;Wherein touch screen 1 and LCM 2 is fixed on the top of A shell 3 respectively by double faced adhesive tape, speaker 5 and process plate Ass 6 are fixed on the bottom of A shell 3 respectively by ST2.9 tapping screw 8, handle 4 is fixed on the side of A shell 3 by buckle structure, A shell 3 is fixedly connected with B shell 14 by GB/T818 M3 screw 15, sliding support 12, B shell 14, C shell 17 pass sequentially through M4 screw assemblies 13 and combine, and can relative slide between B shell 14 with C shell 17;Communication module storehouse is set between A shell 3 and B shell 14, communication module is fixed by snap in this communication module storehouse, this communication module includes antenna 7, communication module upper cover 9, communication module PCB Ass 10, communication module lower cover 11, wherein antenna 7 is arranged on the side of upper cover 9, communication module upper cover 9 is by buckle and communication module lower cover 11 stationary positioned, communication module PCB Ass 10 is set between upper cover 9 and lower cover 11, AM335x master chip is set on this communication module PCB Ass 10, MS729-30 door lock 16 is set in lockhole on B shell 14, this MS729-30 door lock 16 is fixed on the front portion of B shell 14 by the nut carried;Interface board Ass 18 and antenna fixing stand 20 are fixed on the front portion of C shell 17 respectively by ST2.9 tapping screw 8, 29 by 28 bottoms being fixed on C shell 17, battery compartment is set on this C shell 17, set of cells 27 is set in this battery compartment, battery cover 26 it is stamped on battery compartment, this battery cover 26 is fixed by snap with C shell 17, the front portion of C shell 17 sets radio antenna cable 19, C shell 17 is connected by GB/T818 M3 screw 15 is fixing with D shell 22, storehouse, radio station is set between C shell 17 and D shell 22, radio station 21 is set in this storehouse, radio station, end cap 24 is fixed on the front portion of D shell 22 by M4 customization screw 23, hook 25 is fixed on the bottom of D shell 22 by M4 screw assemblies 13.
As shown in Figure 2, the power input of described AM335x master chip is connected with the first power output end of power management chip, voltage 3.3V, the second source outfan of power management chip connects with the power input of General-purpose Memory Controller, voltage 1.8V, 3rd power output end of power management chip connects with the power input of other chips, and the power input of power management chip connects with external power supply, voltage 5V.
NAND_D0 ~ D7 end of described AM335x master chip connects by BUS two-phase is corresponding with I/O0 ~ 7 end of General-purpose Memory Controller, the V6 end of AM335x master chip is bi-directionally connected by NAND_CS end with the CE1 end of General-purpose Memory Controller, and the U17 end of AM335x master chip is bi-directionally connected by NAND_WP with the WP end of General-purpose Memory Controller.
nullThe DDR_DQSP0 end of described AM335x master chip、DDR_DQSN0 end、DDR_DQM0 end、DDR_D0 ~ D7 end respectively with the DQS+ end of external memory storage I、DQS-end、RDQS+ end、DQ0 ~ 7 end is bi-directionally connected,The corresponding connection two-way with A0 ~ A14 end of A0 ~ A14 end of external memory storage I and external memory storage II respectively of DDR_A0 ~ A14 end of AM335x master chip,The DDR_BA0 end of AM335x master chip is bi-directionally connected with the BA0 end of external memory storage I and the BA0 end of external memory storage II respectively,The DDR_BA1 end of AM335x master chip is bi-directionally connected with the BA1 end of external memory storage I and the BA1 end of external memory storage II respectively,The DDR_BA2 end of AM335x master chip is bi-directionally connected with the BA2 end of external memory storage I and the BA2 end of external memory storage II respectively,The DDR_DQSP1 end of AM335x master chip、DDR_DQSN1 end、DDR_DQM1 end、DDR_D8 ~ D15 end respectively with the DQS+ end of external memory storage II、DQS-end、RDQS+ end、DQ0 ~ 7 end is bi-directionally connected;
The AD_IN4 end of described AM335x master chip is connected with the first power output end of battery, and the second source outfan of battery connects with the POW input of RTC.
The I of described AM335x master chip2C0_SDA end is bi-directionally connected with the SDA end of RTC and the SDA end of EEPROM respectively by iic bus, the I of AM335x master chip2C0_SCL end is bi-directionally connected with the SCL end of RTC and the SCL end of EEPROM respectively by iic bus.
The GPIO0_23 outfan of described AM335x master chip is connected with the WDI input of WTD, and the WARMRSTn input of AM335x master chip is connected with the RST outfan of WTD.
The AD Sampling Interface of described AM335x master chip includes AD_IN0 end, AD_IN1 end, AD_IN2 end, AD_IN3 end, and AD_IN0 end, AD_IN1 end, AD_IN2 end, AD_IN3 end are bi-directionally connected with the Y-end of four-wire resistance type touch screen, X+ end, Y+ end, X-end respectively.
nullThe lcd controller interface of described AM335x master chip includes LCD D0 ~ D15 end、V5 end、U5 end、R5 end、R6 end,LCD D0 ~ D15 end is bi-directionally connected with the input of BOOT MOD and the Dn end of TTL-LVDS conversion chip respectively,V5 end is bi-directionally connected by the CLKIN end of LCD_PCLK with TTL-LVDS conversion chip,U5 end is bi-directionally connected by the D25 end of LCD_VSYNC with TTL-LVDS conversion chip,R5 end is bi-directionally connected by the D17 end of LCD_HSYNC with TTL-LVDS conversion chip,R6 end is bi-directionally connected by the D26 end of LCD_DE with TTL-LVDS conversion chip,AM335x master chip GPIO0_22 end connect with the signal input part of backlight control circuit,The Y0M end of TTL-LVDS conversion chip、Y0P end、Y1M end、Y1P end、Y2M end、Y2P end、CLKM end、CLKP end respectively with the D0-end of LCD、D0+ end、D1-end、D1+ end、D2-end、D+ end、CLK-end、CLK+ end is bi-directionally connected,The signal output part of backlight control circuit connects with the signal input part of LCD.
nullThe McASP audio frequency serial ports of described AM335x master chip includes MCA0_D1 outfan、MCA0_CLKX outfan、MCA0_FS outfan、MCA0_MCKX outfan,MCA0_D1 outfan is connected by the SDATA input of IIS_SD0 with D/A conversion chip,MCA0_CLKX outfan is connected by the SCLK input of IIS_SCK with D/A conversion chip,MCA0_FS outfan is connected by the LRCK input of IIS_LRK with D/A conversion chip,MCA0_MCKX outfan is connected by the MCLK input of IIS_MCLK with D/A conversion chip,The ROUT outfan of D/A conversion chip is connected with the IN-input of Audio power amplifier chip,The VO1 outfan of Audio power amplifier chip and VO2 outfan are connected with the first signal input part and the secondary signal input of speaker respectively.
null1st road RGMII interface of described AM335x master chip includes GMII1_TXCK end、GMII1_TXD0-3 end、GMII1_RXCK end、GMII1_RXD0-3 end、GMII1_RXDV end、GMII1_TXEN end、GMII1_MDC end、GMII1_MDIO end,GMII1_TXCK end、GMII1_TXD0-3 end、GMII1_RXCK end、GMII1_RXD0-3 end、GMII1_RXDV end、GMII1_TXEN end respectively with the TXC end of I network card chip、TXD0-3 end、RXC end、RXD0-3 end、RXCTL end、TXCTL end is bi-directionally connected,GMII1_MDC end is bi-directionally connected with the MDC end of I network card chip and the MDC end of II network card chip respectively,GMII1_MDIO end is bi-directionally connected with the MDIO end of network card chip and the MDIO end of II network card chip respectively,2nd road RGMII interface of AM335x master chip includes GMII2_TXCK end、GMII2_TXD0-3 end、GMII2_RXCK end、GMII2_RXD0-3 end、GMII2_RXDV end、GMII2_TXEN end,GMII2_TXCK end、GMII2_TXD0-3 end、GMII2_RXCK end、GMII2_RXD0-3 end、GMII2_RXDV end、GMII2_TXEN end respectively with the TXC end of II network card chip、TXD0-3 end、RXC end、RXD0-3 end、RXCTL end、TXCTL end is bi-directionally connected,3 MDI0+ ends of I network card chip、3 MDI0-ends、LED0 end、LED1 end 8 ports with I gigabit Ethernet mouth respectively are bi-directionally connected,3 MDI0+ ends of II network card chip、3 MDI0-ends、LED0 end、LED1 end 8 ports with II gigabit Ethernet mouth respectively are bi-directionally connected.
The OTG0 end of described AM335x master chip divides two-way to be bi-directionally connected by two signal input/output terminals of USB0_DP and USB0_DM with WIFI module respectively, the OTG1 end of AM335x master chip divides two-way to be bi-directionally connected by two signal input/output terminals of USB1_DP and USB1_DM and USB female seat respectively, the USB1_DRV end of AM335x master chip is bi-directionally connected by the ENB end of USB1_DRV with driving chip, and the OUTB outfan of driving chip inputs with the signal of USB female seat and is connected.
nullDescribed AM335x master chip possesses 6 road UART,Including UART0、UART1、UART2、UART3~5,The first signal input/output end of UART0 is connected with the first signal input/output terminal of A optocoupler and the first signal input/output terminal of signal conversion chip respectively by RXD0,The secondary signal input/output end of UART0 is connected with the first signal input/output terminal of B optocoupler and the secondary signal input/output terminal of signal conversion chip respectively by TXD0,The TXD end of the secondary signal input/output terminal data radio station main with XD230A-CQ of A optocoupler is bi-directionally connected,The RXD end of the secondary signal input/output terminal data radio station main with XD230A-CQ of B optocoupler is bi-directionally connected,3rd signal input/output terminal of signal conversion chip is corresponding with 2 signal input/output ends of debugging serial ports respectively with the 4th signal input/output terminal to be connected;The first signal input/output end of UART1 is connected by the first signal input/output terminal of RXD1 with C optocoupler, the secondary signal input/output end of UART1 is connected by the first signal input/output terminal of TXD1 with D optocoupler, the secondary signal input/output terminal of C optocoupler is bi-directionally connected with the TXD end of GPRS/CDMA, and the secondary signal input/output terminal of D optocoupler is bi-directionally connected with the RXD end of GPRS/CDMA;nullThe first signal input/output end of UART2 is connected by the first signal input/output terminal of RXD2 with E optocoupler,The secondary signal input/output end of UART2 is connected by the first signal input/output terminal of TXD2 with F optocoupler,The TXD/P13 end of secondary signal input/output terminal MCU of E optocoupler is bi-directionally connected,The secondary signal input/output terminal of F optocoupler is bi-directionally connected with the RXD/P14 end of MCU,The P01 end of MCU is bi-directionally connected with the signal input/output terminal of pre-activity circuit,The oneth I/O mouth of MCU connects with the first signal input/output end of driver,The 2nd I/O mouth of MCU and the signal input/output end of 8 tunnel pulses connect,The 3rd I/O mouth of MCU and the signal input/output end of 8 tunnel remote signalling connect,The signal output part of pre-activity circuit and the signal input part of No. 5 relays connect,The secondary signal input/output end of driver and 5 road relay signal input/output terminals;First signal input/output end of UART3 ~ 5 is connected by the first signal input/output terminal of RXD with G optocoupler, the secondary signal signal input/output end of UART3 ~ 5 is connected by the first signal input/output terminal of TXD with H optocoupler, 3rd signal input/output end of UART3 ~ 5 is connected by the first signal input/output terminal of RTS with I optocoupler, the secondary signal input/output terminal of G optocoupler is bi-directionally connected with the RO end of signal conversion chip, the secondary signal input/output terminal of H optocoupler is bi-directionally connected with the DI end of signal conversion chip, the secondary signal input/output terminal of I optocoupler is bi-directionally connected with the DE/RE end of signal conversion chip, the side a and b of signal conversion chip side a and b with RS485 interface respectively is bi-directionally connected.
nullThe spi bus of described AM335x master chip includes SPI0_D0 end、SPI0_D1 end、SPI0_CLK end、SPI0_CS0 end、GPIO1_28 end、GPIO0_19 end,SPI0_D0 end is bi-directionally connected by the SO end of SPI0_SO with SPI-UART conversion chip,SPI0_D1 end is bi-directionally connected by the SI end of SPI0_SI with SPI-UART conversion chip,SPI0_CLK end is bi-directionally connected by the CLK end of SPI0_CLK with SPI-UART conversion chip,SPI0_CS0 end is bi-directionally connected by the CS end of SPI0_CS with SPI-UART conversion chip,GPIO1_28 end is bi-directionally connected by the RESET end of RST with SPI-UART conversion chip,GPIO1_19 end is bi-directionally connected by the IRQ end of IRQ with SPI-UART conversion chip,The UART6 of SPI-UART conversion chip includes TXA end and RXA end,TXA end and RXA end the first signal input/output terminal and secondary signal input/output terminal with GPS module respectively is bi-directionally connected,The UART7 of SPI-UART conversion chip includes TXB end and RXB end,TXB end and RXB end are bi-directionally connected from the first signal input/output terminal and the secondary signal input/output terminal of data radio station with XD230A-CQ respectively.
The GPIO mouth of described AM335x master chip includes GPIO3_17 end, GPIO3_20 end, GPIO3_18 end, GPIO3_19 end, GPIO3_17 end is bi-directionally connected by the MISO end of SPI1_SO with T-ESAM encryption chip, GPIO3_20 end is bi-directionally connected by the MOSI end of SPI1_S1 with T-ESAM encryption chip, GPIO3_18 end is bi-directionally connected by the SCLK end of SPI1_CLK with T-ESAM encryption chip, and GPIO3_19 end is bi-directionally connected by the SSN end of SPI1_CS with T-ESAM encryption chip.
The described 720MHz AM335x ARM that AM335x master chip is TI Cortex-A8 32-bit microprocessor.
Described General-purpose Memory Controller is the NAND chip K9K8G08U0B-PIB0 of SUMSUNG, and capacity 2G ~ 8Gbit is optional.
Described external memory storage is DDR2 chip K4T1G084QF-BCF7, the capacity 1Gbit*2 of SUMSUNG, and 16 parallel port data/address bus connect, and data rate is up to 532MHz.
The analog signal sampling of four-wire resistance type touch screen is processed by the AD Sampling Interface of described AM335x master chip.
Described TTL-LVDS conversion chip is SN75LVDS83B type, and the lcd controller interface of AM335x master chip carries out the LVDS signal of TFT LCD and the conversion of TTL signal by external TTL-LVDS conversion chip;And AM335x master chip is by the existing control to LCD backlight of I/O cause for gossip.
The McASP audio frequency serial ports external D/A conversion chip of described AM335x master chip, then transmission analogue signal carries out Audio power amplifier to Audio power amplifier chip, and last external loudspeaker carries out audio frequency output.
Described network card chip is RTL8211e type, the 2 road external network card chips of RGMII interface of AM335x master chip, is converted to differential signal, accesses gigabit Ethernet mouth (band transformator).
Described UART0 is for the uplink communication of the main data radio station of XD230A-CQ, and signal conversion chip is MAX3232CSE type, and TTL signal and RS232 signal are changed by AM335x master chip outer signal conversion chip, uses for internal debugging serial ports;UART1 is used for and GPRS or cdma communication;UART2 is for the MCU communication of interface board, and MCU is UPD79F8513AGB type, controls relay signal output and the input and output of analog quantity;Signal conversion chip is MAX13085EESA type, and TTL signal and RS485 signal are changed by UART3 ~ 5 outer signal conversion chip, communicates (3 tunnel) for RS485.
Described SPI-UART conversion chip is SC16IS752IBS type, and AM335x master chip uses spi bus external SPI-UART conversion chip to carry out SPI and the conversion of 2 road UART, and the UART6 of conversion is used for GPS module communication;UART7 is used for the XD230A-CQ downlink communication from data radio station.
Described AM335x master chip uses GPIO mouth SPI-bus analogue to communicate with T-ESAM encryption chip, is encrypted whole system.

Claims (9)

  1. The most interactive platform terminal, its feature includes touch screen (1), LCM(2), A shell (3), handle (4), speaker (5), process plate Ass(6), communication module, sliding support (12), B shell (14), MS729-30 door lock (16), C shell (17), interface board Ass(18), radio antenna cable (19), antenna fixing stand (20), radio station (21), D shell (22), end cap (24), hook (25), battery cover (26), set of cells (27), power subsystem (29);Wherein touch screen (1) and LCM(2) be fixed on the top of A shell (3) respectively by double faced adhesive tape, speaker (5) and process plate Ass(6) be separately fixed at the bottom of A shell (3), handle (4) is fixed on the side of A shell (3) by buckle structure, A shell (3) is fixedly connected with B shell (14), sliding support (12), B shell (14), C shell (17) are combined successively, can relative slide between B shell (14) with C shell (17);nullCommunication module storehouse is set between A shell (3) and B shell (14),Communication module is fixed by snap in this communication module storehouse,This communication module includes antenna (7)、Communication module upper cover (9)、Communication module PCB Ass(10)、Communication module lower cover (11),Wherein antenna (7) is arranged on the side of communication module upper cover (9),Communication module upper cover (9) passes through buckle and communication module lower cover (11) stationary positioned,Communication module PCB Ass (10) is set between communication module upper cover (9) and communication module lower cover (11),This communication module PCB Ass(10) on set AM335x master chip,MS729-30 door lock (16) is set in lockhole on B shell (14),This MS729-30 door lock (16) is fixed on the front portion of B shell (14) by the nut carried;Interface board Ass(18) and antenna fixing stand (20) be separately fixed at the front portion of C shell (17), power subsystem (29) is fixed on the bottom of C shell (17), battery compartment is set on this C shell (17), set of cells (27) is set in this battery compartment, battery cover (26) it is stamped on battery compartment, this battery cover (26) is fixed by snap with C shell (17), the front portion of C shell (17) sets radio antenna cable (19), C shell (17) is fixing with D shell (22) to be connected, storehouse, radio station is set between C shell (17) and D shell (22), radio station (21) is set in this storehouse, radio station, end cap (24) is fixed on the front portion of D shell (22), hook (25) is fixed on the bottom of D shell (22);
    The power input of described AM335x master chip is connected with the first power output end of power management chip, the second source outfan of power management chip connects with the power input of General-purpose Memory Controller, 3rd power output end of power management chip connects with the power input of other chips, and the power input of power management chip connects with external power supply;NAND_D0 ~ D7 end of described AM335x master chip connects by BUS two-phase is corresponding with I/O0 ~ 7 end of General-purpose Memory Controller, the V6 end of AM335x master chip is bi-directionally connected by NAND_CS end with the CE1 end of General-purpose Memory Controller, and the U17 end of AM335x master chip is bi-directionally connected by NAND_WP with the WP end of General-purpose Memory Controller.
  2. nullA kind of interactive platform terminal the most as claimed in claim 1,It is characterized in that the DDR_DQSP0 end of described AM335x master chip、DDR_DQSN0 end、DDR_DQM0 end、DDR_D0 ~ D7 end respectively with the DQS+ end of external memory storage I、DQS-end、RDQS+ end、DQ0 ~ 7 end is bi-directionally connected,The corresponding connection two-way with A0 ~ A14 end of A0 ~ A14 end of external memory storage I and external memory storage II respectively of DDR_A0 ~ A14 end of AM335x master chip,The DDR_BA0 end of AM335x master chip is bi-directionally connected with the BA0 end of external memory storage I and the BA0 end of external memory storage II respectively,The DDR_BA1 end of AM335x master chip is bi-directionally connected with the BA1 end of external memory storage I and the BA1 end of external memory storage II respectively,The DDR_BA2 end of AM335x master chip is bi-directionally connected with the BA2 end of external memory storage I and the BA2 end of external memory storage II respectively,The DDR_DQSP1 end of AM335x master chip、DDR_DQSN1 end、DDR_DQM1 end、DDR_D8 ~ D15 end respectively with the DQS+ end of external memory storage II、DQS-end、RDQS+ end、DQ0 ~ 7 end is bi-directionally connected.
  3. A kind of interactive platform terminal the most as claimed in claim 1, is characterized in that the AD_IN4 end of described AM335x master chip is connected with the first power output end of battery, and the second source outfan of battery connects with the POW input of RTC;The I of described AM335x master chip2C0_SDA end is bi-directionally connected with the SDA end of RTC and the SDA end of EEPROM respectively by iic bus, the I of AM335x master chip2C0_SCL end is bi-directionally connected with the SCL end of RTC and the SCL end of EEPROM respectively by iic bus;The GPIO0_23 outfan of described AM335x master chip is connected with the WDI input of WTD, and the WARMRSTn input of AM335x master chip is connected with the RST outfan of WTD.
  4. A kind of interactive platform terminal the most as claimed in claim 1, it is characterized in that the AD Sampling Interface of described AM335x master chip includes AD_IN0 end, AD_IN1 end, AD_IN2 end, AD_IN3 end, AD_IN0 end, AD_IN1 end, AD_IN2 end, AD_IN3 end are bi-directionally connected with the Y-end of four-wire resistance type touch screen, X+ end, Y+ end, X-end respectively;The analog signal sampling of four-wire resistance type touch screen is processed by the AD Sampling Interface of described AM335x master chip.
  5. A kind of interactive platform terminal the most as claimed in claim 1, is characterized in that the lcd controller interface of described AM335x master chip includes LCD D0 ~ D15 end, V5 end, U5 end, R5 end, R6 end, LCD D0 ~ D15 end respectively with BOOT nullThe input of MOD and the Dn end of TTL-LVDS conversion chip are bi-directionally connected,V5 end is bi-directionally connected by the CLKIN end of LCD_PCLK with TTL-LVDS conversion chip,U5 end is bi-directionally connected by the D25 end of LCD_VSYNC with TTL-LVDS conversion chip,R5 end is bi-directionally connected by the D17 end of LCD_HSYNC with TTL-LVDS conversion chip,R6 end is bi-directionally connected by the D26 end of LCD_DE with TTL-LVDS conversion chip,AM335x master chip GPIO0_22 end connect with the signal input part of backlight control circuit,The Y0M end of TTL-LVDS conversion chip、Y0P end、Y1M end、Y1P end、Y2M end、Y2P end、CLKM end、CLKP end respectively with the D0-end of LCD、D0+ end、D1-end、D1+ end、D2-end、D+ end、CLK-end、CLK+ end is bi-directionally connected,The signal output part of backlight control circuit connects with the signal input part of LCD;nullThe McASP audio frequency serial ports of described AM335x master chip includes MCA0_D1 outfan、MCA0_CLKX outfan、MCA0_FS outfan、MCA0_MCKX outfan,MCA0_D1 outfan is connected by the SDATA input of IIS_SD0 with D/A conversion chip,MCA0_CLKX outfan is connected by the SCLK input of IIS_SCK with D/A conversion chip,MCA0_FS outfan is connected by the LRCK input of IIS_LRK with D/A conversion chip,MCA0_MCKX outfan is connected by the MCLK input of IIS_MCLK with D/A conversion chip,The ROUT outfan of D/A conversion chip is connected with the IN-input of Audio power amplifier chip,The VO1 outfan of Audio power amplifier chip and VO2 outfan are connected with the first signal input part and the secondary signal input of speaker respectively;Described TTL-LVDS conversion chip is SN75LVDS83B type, and the lcd controller interface of AM335x master chip carries out the LVDS signal of TFT LCD and the conversion of TTL signal by external TTL-LVDS conversion chip;And AM335x master chip is by the existing control to LCD backlight of I/O cause for gossip;The McASP audio frequency serial ports external D/A conversion chip of described AM335x master chip, then transmission analogue signal carries out Audio power amplifier to Audio power amplifier chip, and last external loudspeaker carries out audio frequency output.
  6. nullA kind of interactive platform terminal the most as claimed in claim 1,It is characterized in that the 1st road RGMII interface of described AM335x master chip includes GMII1_TXCK end、GMII1_TXD0-3 end、GMII1_RXCK end、GMII1_RXD0-3 end、GMII1_RXDV end、GMII1_TXEN end、GMII1_MDC end、GMII1_MDIO end,GMII1_TXCK end、GMII1_TXD0-3 end、GMII1_RXCK end、GMII1_RXD0-3 end、GMII1_RXDV end、GMII1_TXEN end respectively with the TXC end of I network card chip、TXD0-3 end、RXC end、RXD0-3 end、RXCTL end、TXCTL end is bi-directionally connected,GMII1_MDC end is bi-directionally connected with the MDC end of I network card chip and the MDC end of II network card chip respectively,GMII1_MDIO end is bi-directionally connected with the MDIO end of network card chip and the MDIO end of II network card chip respectively,2nd road RGMII interface of AM335x master chip includes GMII2_TXCK end、GMII2_TXD0-3 end、GMII2_RXCK end、GMII2_RXD0-3 end、GMII2_RXDV end、GMII2_TXEN end,GMII2_TXCK end、GMII2_TXD0-3 end、GMII2_RXCK end、GMII2_RXD0-3 end、GMII2_RXDV end、GMII2_TXEN end respectively with the TXC end of II network card chip、TXD0-3 end、RXC end、RXD0-3 end、RXCTL end、TXCTL end is bi-directionally connected,3 MDI0+ ends of I network card chip、3 MDI0-ends、LED0 end、LED1 end 8 ports with I gigabit Ethernet mouth respectively are bi-directionally connected,3 MDI0+ ends of II network card chip、3 MDI0-ends、LED0 end、LED1 end 8 ports with II gigabit Ethernet mouth respectively are bi-directionally connected;The 2 road external network card chips of RGMII interface of described AM335x master chip, are converted to differential signal, access the gigabit Ethernet mouth of band transformator.
  7. A kind of interactive platform terminal the most as claimed in claim 1, it is characterized in that the OTG0 end of described AM335x master chip divides two-way to be bi-directionally connected by two signal input/output terminals of USB0_DP and USB0_DM with WIFI module respectively, the OTG1 end of AM335x master chip divides two-way to be bi-directionally connected by two signal input/output terminals of USB1_DP and USB1_DM and USB female seat respectively, the USB1_DRV end of AM335x master chip is bi-directionally connected by the ENB end of USB1_DRV with driving chip, and the OUTB outfan of driving chip inputs with the signal of USB female seat and is connected.
  8. nullA kind of interactive platform terminal the most as claimed in claim 1,It is characterized in that described AM335x master chip possesses 6 road UART,Including UART0、UART1、UART2、UART3~5,The first signal input/output end of UART0 is connected with the first signal input/output terminal of A optocoupler and the first signal input/output terminal of signal conversion chip respectively by RXD0,The secondary signal input/output end of UART0 is connected with the first signal input/output terminal of B optocoupler and the secondary signal input/output terminal of signal conversion chip respectively by TXD0,The TXD end of the secondary signal input/output terminal data radio station main with XD230A-CQ of A optocoupler is bi-directionally connected,The RXD end of the secondary signal input/output terminal data radio station main with XD230A-CQ of B optocoupler is bi-directionally connected,3rd signal input/output terminal of signal conversion chip is corresponding with 2 signal input/output ends of debugging serial ports respectively with the 4th signal input/output terminal to be connected;The first signal input/output end of UART1 is connected by the first signal input/output terminal of RXD1 with C optocoupler, the secondary signal input/output end of UART1 is connected by the first signal input/output terminal of TXD1 with D optocoupler, the secondary signal input/output terminal of C optocoupler is bi-directionally connected with the TXD end of GPRS/CDMA, and the secondary signal input/output terminal of D optocoupler is bi-directionally connected with the RXD end of GPRS/CDMA;nullThe first signal input/output end of UART2 is connected by the first signal input/output terminal of RXD2 with E optocoupler,The secondary signal input/output end of UART2 is connected by the first signal input/output terminal of TXD2 with F optocoupler,The TXD/P13 end of secondary signal input/output terminal MCU of E optocoupler is bi-directionally connected,The secondary signal input/output terminal of F optocoupler is bi-directionally connected with the RXD/P14 end of MCU,The P01 end of MCU is bi-directionally connected with the signal input/output terminal of pre-activity circuit,The oneth I/O mouth of MCU connects with the first signal input/output end of driver,The 2nd I/O mouth of MCU and the signal input/output end of 8 tunnel pulses connect,The 3rd I/O mouth of MCU and the signal input/output end of 8 tunnel remote signalling connect,The signal output part of pre-activity circuit and the signal input part of No. 5 relays connect,The secondary signal input/output end of driver and 5 road relay signal input/output terminals;First signal input/output end of UART3 ~ 5 is connected by the first signal input/output terminal of RXD with G optocoupler, the secondary signal signal input/output end of UART3 ~ 5 is connected by the first signal input/output terminal of TXD with H optocoupler, 3rd signal input/output end of UART3 ~ 5 is connected by the first signal input/output terminal of RTS with I optocoupler, the secondary signal input/output terminal of G optocoupler is bi-directionally connected with the RO end of signal conversion chip, the secondary signal input/output terminal of H optocoupler is bi-directionally connected with the DI end of signal conversion chip, the secondary signal input/output terminal of I optocoupler is bi-directionally connected with the DE/RE end of signal conversion chip, the side a and b of signal conversion chip side a and b with RS485 interface respectively is bi-directionally connected;Described UART0 is for the uplink communication of the main data radio station of XD230A-CQ, and signal conversion chip is MAX3232CSE type, and TTL signal and RS232 signal are changed by AM335x master chip outer signal conversion chip, uses for internal debugging serial ports;UART1 is used for and GPRS or cdma communication;UART2, for the MCU communication of interface board, controls relay signal output and the input and output of analog quantity;TTL signal and RS485 signal are changed by UART3 ~ 5 outer signal conversion chip, for 3 road RS485 communications.
  9. nullA kind of interactive platform terminal the most as claimed in claim 1,It is characterized in that the spi bus of described AM335x master chip includes SPI0_D0 end、SPI0_D1 end、SPI0_CLK end、SPI0_CS0 end、GPIO1_28 end、GPIO0_19 end,SPI0_D0 end is bi-directionally connected by the SO end of SPI0_SO with SPI-UART conversion chip,SPI0_D1 end is bi-directionally connected by the SI end of SPI0_SI with SPI-UART conversion chip,SPI0_CLK end is bi-directionally connected by the CLK end of SPI0_CLK with SPI-UART conversion chip,SPI0_CS0 end is bi-directionally connected by the CS end of SPI0_CS with SPI-UART conversion chip,GPIO1_28 end is bi-directionally connected by the RESET end of RST with SPI-UART conversion chip,GPIO1_19 end is bi-directionally connected by the IRQ end of IRQ with SPI-UART conversion chip,The UART6 of SPI-UART conversion chip includes TXA end and RXA end,TXA end and RXA end the first signal input/output terminal and secondary signal input/output terminal with GPS module respectively is bi-directionally connected,The UART7 of SPI-UART conversion chip includes TXB end and RXB end,TXB end and RXB end are bi-directionally connected from the first signal input/output terminal and the secondary signal input/output terminal of data radio station with XD230A-CQ respectively;The GPIO mouth of described AM335x master chip includes GPIO3_17 end, GPIO3_20 end, GPIO3_18 end, GPIO3_19 end, GPIO3_17 end is bi-directionally connected by the MISO end of SPI1_SO with T-ESAM encryption chip, GPIO3_20 end is bi-directionally connected by the MOSI end of SPI1_S1 with T-ESAM encryption chip, GPIO3_18 end is bi-directionally connected by the SCLK end of SPI1_CLK with T-ESAM encryption chip, and GPIO3_19 end is bi-directionally connected by the SSN end of SPI1_CS with T-ESAM encryption chip;Described AM335x master chip uses spi bus external SPI-UART conversion chip to carry out SPI and the conversion of 2 road UART, and the UART6 of conversion is used for GPS module communication;UART7 is used for the XD230A-CQ downlink communication from data radio station;Described AM335x master chip uses GPIO mouth SPI-bus analogue to communicate with T-ESAM encryption chip, is encrypted whole system.
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