CN104157561A - Method for reducing contact resistance of graphene electrode by using thickness of two dimensional metal layer - Google Patents
Method for reducing contact resistance of graphene electrode by using thickness of two dimensional metal layer Download PDFInfo
- Publication number
- CN104157561A CN104157561A CN201410389035.9A CN201410389035A CN104157561A CN 104157561 A CN104157561 A CN 104157561A CN 201410389035 A CN201410389035 A CN 201410389035A CN 104157561 A CN104157561 A CN 104157561A
- Authority
- CN
- China
- Prior art keywords
- graphene
- thickness
- metallic layer
- contact resistance
- dimensional metallic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0405—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon
- H01L21/0425—Making electrodes
- H01L21/043—Ohmic electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
Abstract
The invention belongs to the technical field of the manufacturing of two-dimensional material based integrated circuits, and particularly relates to a method for reducing the contact resistance of a graphene electrode by using the thickness of a two dimensional metal layer. By a method of physical vapor deposition (PVD), the metal electrode is deposited on a graphene member, and a structure of graphene/two dimensional metal layer/gold is manufactured. The contact of the graphene and the two dimensional metal layer is adjusted by adjusting the thickness of the two dimensional metal layer, a contact potential barrier is adjusted so that the contact potential barrier is the lowest, and through the adoption of the method, the contact resistance of the graphene is reduced. Through the adoption of the method, the contact resistance of the graphene can be effectively reduced, so that the graphene member with excellent property is prepared. In addition, the method is simple and convenient. The method can be used as a basic method for preparing two-dimensional material members.
Description
Technical field
The invention belongs to carbon back ic manufacturing technology field, be specifically related to a kind of method that reduces Graphene electrodes contact resistance.
This method novelty, convenient and simple, can effectively improve by this method the contact resistance of Graphene electrodes, improve the performance of graphene device.
Background technology
Along with the discovery of Graphene, it has good performance, and Graphene has electron mobility 200 000 cm of high speed under room temperature
2∕ Vs, high theoretical specific area 2600 m
2/ g, also there is high heat conductance 3000 W/mK and outstanding mechanical property (high-modulus 1060GPa, high strength 130GPa), can be used as device electrode and following semicon industry basic material of future generation.The cellular two dimensional crystal that Graphene (Graphene) is made up of individual layer hexagonal cellular carbon atom, is the one deck in graphite, Figure 1 shows that the basic structure schematic diagram of Graphene.
Just because of performances such as the high mobilities of Graphene, Graphene is considered to a kind of potential following field effect transistor tube material.But, although Graphene is very high as the mobility of raceway groove, because the high resistance between Graphene and metal electrode has seriously limited high performance Graphene transistor.Many reports show, the contact resistance of Graphene and metal has exceeded the impact of Graphene channel mobility for the impact of graphene device, if do not improve contact resistance, Graphene effect transistor is opened electric current will be subject to very large impact, make the Graphene of high mobility also without any meaning.Therefore, the contact resistance of control Graphene has very great meaning to graphene device.
How to make a price reduction the contact resistance of graphene device, much research obtains, by different metals, obtain metal different from the contact resistance of Graphene contact, wherein metal is divided into two kinds with contacting of Graphene, and one is chemisorbed, and another kind is physical absorption.Wherein chemical contact can destroy the structure of Graphene, Graphene mobility is reduced, and physical absorption is very little to Graphene destruction, but the contact resistance that physical absorption forms is larger than chemisorbed.The present invention is mainly the physical contact of Graphene and metal, forms Graphene and metal interface.Be deposited on the thickness of the two-dimensional metallic layer on Graphene by adjusting, thereby the electric charge coming on adjustment interface shifts, and forms dipole and contact berrier on interface, by attemperator interface contact berrier, reaches the object that reduces Graphene contact resistance.This is a kind of effective and novel method, will further promote the application of Graphene and the development of two-dimensional material base integrated circuit.
Summary of the invention
The object of the invention is to propose a kind of new method that effectively reduces Graphene contact resistance.
The method of the reduction Graphene contact resistance that the present invention proposes, its basic ideas are the thickness by regulating two-dimensional metallic layer, thereby adjusting Graphene contacts with two-dimensional metallic layer, effectively reduce contact berrier, by determining the thickness of best two-dimensional metallic layer, make the contact resistance of Graphene minimum.By reducing the contact resistance of Graphene electrodes, thereby effectively improve the performance of graphene device.
The two-dimensional metallic layer thickness that utilizes that the present invention proposes reduces the method for Graphene electrodes contact resistance, and concrete steps are:
(1) provide growth to have the sample of Graphene;
(2) utilize the method for physical vapour deposition (PVD), the ultra-thin two-dimensional metallic layer of deposit 0.1-5 nm different-thickness on Graphene;
(3) measure the two-dimensional metallic layer-Graphene contact of different-thickness by original position UV photoelectron spectroscopy (UPS), analyze and determine and reach the thickness that potential barrier is minimum, be the optimal thickness d (d is a certain value in 0.1-5 nm) of two-dimensional metallic layer;
(4) utilize the method for physical vapour deposition (PVD), the two-dimensional metallic layer of deposit optimal thickness d on graphene device;
(5) utilize the method for physical vapour deposition (PVD), the metal M of deposit 20-200 nm thickness, forms the device contacts structure of Graphene/two-dimensional metallic layer/metal M.
In the present invention, described two-dimensional metallic layer material is nickel, titanium, aluminium, palladium or cobalt etc.
In the present invention, the optimal thickness of described two-dimensional metallic layer, can measure by original position UV photoelectron spectroscopy (UPS) Analysis deterrmination.
In the present invention, described metal M can be gold, silver or platinum etc.
The inventive method, does not limit to grapheme material, can also be applied in other two-dimensional material.
The inventive method, is also not limited to two-dimensional metallic layer, can also be applied to bulk metal layer or other materials.
Further, first needing has Graphene sample, can be the Graphene that the method by low-pressure chemical vapor deposition is grown on copper sheet.The Graphene Structure of need of growth is complete, and the Graphene that large area is continuous, is individual layer, and defect is less, has very high carrier mobility, approaches the good Graphene of quality as far as possible.
Need to there is original position multifunctional analysis equipment, physical vapor deposition (PVD) and UV photoelectron spectroscopy (UPS) equipment can be combined.These original position equipment all keep condition of high vacuum degree, 10
-10mbar, when guaranteeing like this two-dimensional metallic layer and Graphene engaged test not by pollutions such as air.By analyzing spectrum and the Graphene work function of UPS test, the contact berrier of Analysis deterrmination Graphene and two-dimensional metallic layer contact interface, can draw and the relation of the contact berrier at interface and the thickness of two-dimensional metallic layer present V-type.Certain thickness two-dimensional metallic layer can make contact berrier minimum, thereby makes the contact resistance minimum of Graphene electrodes.The two-dimensional metallic thickness that makes contact berrier reach minimum value is optimal thickness d.
The method of the contact resistance that effectively reduces Graphene electrodes that the present invention proposes, convenient and simple.By effectively drawing the contact berrier of Graphene and two-dimensional metallic layer, determine optimum thickness metal level, thus the contact resistance of optimized reduction Graphene electrodes.But also can select contacting of best metal and Graphene, thereby determine best Graphene contact.Thereby prepare the Graphene electrodes of the structure of Graphene/two-dimensional metallic layer/gold.
Brief description of the drawings
Fig. 1 is the basic structural representation of Graphene.
Fig. 2 to Fig. 4 the invention provides a kind of procedure schematic diagram that utilizes two-dimensional metallic layer thickness to reduce Graphene electrodes contact resistance.
Fig. 5 is operational flowchart of the present invention.
Embodiment
The present invention proposes a kind of method of utilizing two-dimensional metallic layer thickness to reduce Graphene electrodes contact resistance.By controlling the two-dimensional metallic layer of different-thickness and contacting of Graphene, thereby regulate the characteristic of the two contact interface, thereby reach the object of the contact resistance that regulates Graphene electrodes.Effectively convenient by this method, different metals and the contact condition of Graphene can be determined, and best metal can be selected, as the electrode metal of Graphene, prepare the electrode of best graphene device.The following stated be adopt the present invention utilize two-dimensional metallic thickness to reduce the embodiment of the method for Graphene contact resistance.
In the drawings, for convenience of description, structure size and ratio do not represent actual size.
First, provide substrate sample, its Graphene 102 for growing by low-pressure chemical vapor deposition method at 25 um thickness copper (Cu) 101.Wherein the Graphene of growth is smooth, individual layer, and very large area, does not have defect, has very high carrier mobility.Wherein the sectional view of the Graphene sample of growth as shown in Figure 2.
Then, Graphene sample is passed in the multifunctional analysis system of original position, and this system comprises physical vapor deposition (PVD) and UV photoelectron spectroscopy (UPS) equipment.Graphene sample is delivered in PVD equipment to the thick Titanium of deposit 0.6 nm on Graphene sample.Concrete steps are.When vacuum degree in reaction chamber reaches 5.3 × 10
-3mbar, starts at depositing metal, and wherein rotary sample is 40 rpms, deposit 8 seconds.After deposit finishes, form two-dimensional metallic layer 103.Then sample is passed to UPS by in-situ system from PVD, avoid air impact sample.Test sample by UPS.Shape as shown in Figure 3.
Repeat said process, sample is passed to PVD deposit two-dimensional metallic, then deliver to UPS test, constantly carry out said process, until the thickness of metal reaches 10 nm.
The UPS spectrum at the interface by analytical test and the work function of Graphene, draw the contact berrier height of Graphene and two-dimensional metallic bed boundary with the variation diagram of two-dimensional metallic layer thickness, and curve chart presents V-type.Can regulate the thickness of metal, make contact berrier reach minimum, thereby reduce contact resistance.Taking two-dimensional metallic titanium (Ti) as example, as shown in Figure 4, for barrier height is with the variation diagram of the thickness of two-dimensional metallic titanium, can analyze in the time that the thickness of titanium is 2.2 nm by curve chart, contact berrier is minimum.Thereby determine the thickness of best two-dimensional metallic.
Like this, we can prepare such electrode structure to Graphene, are the thick thick gold of two-dimensional metallic titanium layer/50 nm of Graphene/2.2 nm.Complete like this preparation of Graphene electrodes, by this two-dimensional metallic thickness that utilizes, can effectively reduce the contact resistance of Graphene electrodes.
As mentioned above, in the situation that not departing from spirit and scope of the invention, can also form many embodiment that have very big difference.Should be appreciated that except as defined by the appended claims, the invention is not restricted at the specific embodiment described in specification.
Claims (3)
1. utilize two-dimensional metallic layer thickness to reduce a method for Graphene electrodes contact resistance, it is characterized in that concrete steps are:
(1) provide growth to have the sample of Graphene;
(2) utilize the method for physical vapour deposition (PVD), the ultra-thin two-dimension metal level of deposit 0.1-5 nm different-thickness on Graphene;
(3) measure the two-dimensional metallic layer-Graphene contact of different-thickness by original position UV photoelectron spectroscopy, analyze and determine and reach the thickness that potential barrier is minimum, be the optimal thickness of two-dimensional metallic layer;
(4) utilize the method for physical vapour deposition (PVD), the two-dimensional metallic layer of deposit optimal thickness on graphene device;
(5) utilize the method for physical vapour deposition (PVD), the metal M of deposit 20-200 nm thickness, forms the device contacts structure of Graphene/two-dimensional metallic layer/metal M.
2. the method for utilizing two-dimensional metallic layer thickness to reduce Graphene electrodes contact resistance according to claim 1, is characterized in that: described two-dimensional metallic layer material is nickel, titanium, aluminium, palladium or cobalt.
3. the method for utilizing two-dimensional metallic layer thickness to reduce Graphene electrodes contact resistance according to claim 1, is characterized in that: described metal M is gold, silver or platinum.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410389035.9A CN104157561B (en) | 2014-08-08 | 2014-08-08 | Method for reducing contact resistance of graphene electrode by using thickness of two dimensional metal layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410389035.9A CN104157561B (en) | 2014-08-08 | 2014-08-08 | Method for reducing contact resistance of graphene electrode by using thickness of two dimensional metal layer |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104157561A true CN104157561A (en) | 2014-11-19 |
CN104157561B CN104157561B (en) | 2017-01-18 |
Family
ID=51883035
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410389035.9A Expired - Fee Related CN104157561B (en) | 2014-08-08 | 2014-08-08 | Method for reducing contact resistance of graphene electrode by using thickness of two dimensional metal layer |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104157561B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103840017A (en) * | 2014-03-06 | 2014-06-04 | 常熟理工学院 | Grapheme silicon-based solar cell and manufacture method thereof |
CN111584655A (en) * | 2020-05-20 | 2020-08-25 | 魔童智能科技(扬州)有限公司 | Method for improving ohmic contact |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5294486A (en) * | 1990-10-22 | 1994-03-15 | International Business Machines Corporation | Barrier improvement in thin films |
US6770353B1 (en) * | 2003-01-13 | 2004-08-03 | Hewlett-Packard Development Company, L.P. | Co-deposited films with nano-columnar structures and formation process |
CN102064189A (en) * | 2010-12-06 | 2011-05-18 | 苏州纳维科技有限公司 | Metal-semiconductor electrode structure and preparation method thereof |
CN102800810A (en) * | 2011-05-27 | 2012-11-28 | 浦项工科大学校产学协力团 | Electrode and electronic device comprising the same |
CN102923640A (en) * | 2011-08-12 | 2013-02-13 | Nxp股份有限公司 | Semiconductor device having Au-Cu electrodes and method of manufacturing semiconductor device |
CN103296065A (en) * | 2013-06-07 | 2013-09-11 | 中国科学院微电子研究所 | Structure for reducing contact resistance of graphene material and metal |
-
2014
- 2014-08-08 CN CN201410389035.9A patent/CN104157561B/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5294486A (en) * | 1990-10-22 | 1994-03-15 | International Business Machines Corporation | Barrier improvement in thin films |
US6770353B1 (en) * | 2003-01-13 | 2004-08-03 | Hewlett-Packard Development Company, L.P. | Co-deposited films with nano-columnar structures and formation process |
CN102064189A (en) * | 2010-12-06 | 2011-05-18 | 苏州纳维科技有限公司 | Metal-semiconductor electrode structure and preparation method thereof |
CN102800810A (en) * | 2011-05-27 | 2012-11-28 | 浦项工科大学校产学协力团 | Electrode and electronic device comprising the same |
CN102923640A (en) * | 2011-08-12 | 2013-02-13 | Nxp股份有限公司 | Semiconductor device having Au-Cu electrodes and method of manufacturing semiconductor device |
CN103296065A (en) * | 2013-06-07 | 2013-09-11 | 中国科学院微电子研究所 | Structure for reducing contact resistance of graphene material and metal |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103840017A (en) * | 2014-03-06 | 2014-06-04 | 常熟理工学院 | Grapheme silicon-based solar cell and manufacture method thereof |
CN103840017B (en) * | 2014-03-06 | 2016-06-08 | 常熟理工学院 | A kind of Graphene silica-based solar cell and manufacture method thereof |
CN111584655A (en) * | 2020-05-20 | 2020-08-25 | 魔童智能科技(扬州)有限公司 | Method for improving ohmic contact |
CN111584655B (en) * | 2020-05-20 | 2021-02-19 | 魔童智能科技(扬州)有限公司 | Method for improving ohmic contact |
Also Published As
Publication number | Publication date |
---|---|
CN104157561B (en) | 2017-01-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Khan et al. | Nanojunction effects in multiple ZnO nanowire gas sensor | |
Uddin et al. | Functionalized graphene/silicon chemi-diode H2 sensor with tunable sensitivity | |
Liu et al. | Chemiresistive gas sensors employing solution-processed metal oxide quantum dot films | |
Zhang et al. | High performance ethanol sensing films fabricated from ZnO and In2O3 nanofibers with a double-layer structure | |
Sanger et al. | Palladium decorated silicon carbide nanocauliflowers for hydrogen gas sensing application | |
Nam et al. | Electrical and structural properties of ZnO synthesized via infiltration of lithographically defined polymer templates | |
Chen et al. | Pulsed laser deposition of conducting porous La-Sr-Co-O films | |
Seguini et al. | Si surface passivation by Al2O3 thin films deposited using a low thermal budget atomic layer deposition process | |
Nayak et al. | Effects of Li doping on the performance and environmental stability of solution processed ZnO thin film transistors | |
Streller et al. | Novel metal silicide thin films by design via controlled solid-state diffusion | |
Shin et al. | Band gap tunable and improved microstructure characteristics of Cu2ZnSn (S1− x, Sex) 4 thin films by annealing under atmosphere containing S and Se | |
Gupta et al. | Morphology and porosity of nanoporous Au thin films formed by dealloying of AuxSi1− x | |
Kim et al. | Highly uniform wafer-scale synthesis of α-MoO3 by plasma enhanced chemical vapor deposition | |
Yang et al. | Trickle flow aided atomic layer deposition (ALD) strategy for ultrathin molybdenum disulfide (MoS2) synthesis | |
Kawwam et al. | Characterization of CuO (1 1 1)/MgO (1 0 0) films grown under two different PLD backgrounds | |
Zhao et al. | Electrical transport properties of graphene nanowalls grown at low temperature using plasma enhanced chemical vapor deposition | |
Jung et al. | Transducer-aware hydroxy-rich-surface indium oxide gas sensor for low-power and high-sensitivity NO2 gas sensing | |
Srivastava et al. | Ultrasensitive boron–nitrogen-codoped CVD graphene-derived NO2 gas sensor | |
CN104157561A (en) | Method for reducing contact resistance of graphene electrode by using thickness of two dimensional metal layer | |
Macháč et al. | Synthesis of graphene on Co/SiC structure | |
Singh et al. | Two-step process using MOCVD and thermal oxidation to obtain pure-phase Cu2O thin films transistors | |
Perrin et al. | Formation of Ni3InGaAs phase in Ni/InGaAs contact at low temperature | |
Yadav et al. | A Review on Chemiresistive Hybrid Zinc Oxide and Nanocomposites for Gas Sensing | |
Peter et al. | Characterization of ultra-thin nickel–silicide films synthesized using the solid state reaction of Ni with an underlying Si: P substrate (P: 0.7 to 4.0%) | |
Chen et al. | Preparation and photovoltaic properties of silicon quantum dots embedded in a dielectric matrix: a review |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170118 Termination date: 20190808 |