CN104155035B - The forming method of pressure transducer - Google Patents
The forming method of pressure transducer Download PDFInfo
- Publication number
- CN104155035B CN104155035B CN201410425363.XA CN201410425363A CN104155035B CN 104155035 B CN104155035 B CN 104155035B CN 201410425363 A CN201410425363 A CN 201410425363A CN 104155035 B CN104155035 B CN 104155035B
- Authority
- CN
- China
- Prior art keywords
- electrode layer
- top electrode
- layer
- forming method
- laser
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
A kind of forming method of pressure transducer, including: semiconductor base is provided；Described semiconductor base is formed bottom electrode layer；Forming sacrifice layer on described semiconductor base, described sacrifice layer covers described bottom electrode layer；Forming top electrode layer, described top electrode layer covers the end face of described sacrifice layer, side and the described semiconductor base of part；Described top electrode layer is carried out laser annealing process；After described laser treatment, forming the opening running through described top electrodes layer thickness in described top electrode layer, described opening exposes described sacrifice layer；Described sacrifice layer is removed by described opening.Described forming method can improve the performance of the pressure transducer formed.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to the forming method of a kind of pressure transducer.
Background technology
Along with the development of MEMS (Micro-Electro-Mechanical-System, MEMS) technology, various sensors achieve microminaturization.
Applying more one in the sensor of current various microminaturization is MEMS pressure sensor, MEMS pressure sensor can utilize the sensitive thin film in MEMS to receive external pressure information, the treated circuit of signal converted is amplified, thus measuring concrete pressure information.MEMS pressure sensor is widely used in automotive electronics such as TPMS (system for monitoring pressure in tyre), and consumer electronics are tire gauge, sphygomanometer such as, industrial electronic such as digital pressure gauge, digital stream scale, field such as industry batching weighing etc..
Difference according to pressure transducer operation principle, pressure transducer can be divided into condenser type, piezoelectric type, pressure resistance type three kinds.Wherein, the pressure measurement parts of capacitance pressure transducer are sensitive thin film, this sensitive thin film is in order to the cavity of overburden pressure sensor self, in other words, cavity pressure is born on one surface of this sensitive thin film, outside pressure is born on another surface, correspondingly, its principle realizing pressure measurement is: sensitive thin film and an electrode parallel with it composition capacity plate antenna, when ambient pressure changes, sensitive thin film deforms owing to outside pressure there are differences with the pressure in own cavity, so that the capacitance size of capacity plate antenna changes, the size of ambient pressure can be calculated by measuring the capacitance variations of capacity plate antenna.
But, the pressure transducer performance that the forming method of existing pressure transducer is formed is not good.
Summary of the invention
The problem that this invention address that is to provide the forming method of a kind of pressure transducer, to improve the performance of the pressure transducer formed.
For solving the problems referred to above, the present invention provides the forming method of a kind of pressure transducer, including:
Semiconductor base is provided；
Described semiconductor base is formed bottom electrode layer；
Forming sacrifice layer on described semiconductor base, described sacrifice layer covers described bottom electrode layer；
Forming top electrode layer, described top electrode layer covers the end face of described sacrifice layer, side and the described semiconductor base of part；
Described top electrode layer is carried out laser annealing process；
After described laser treatment, forming the opening running through described top electrodes layer thickness in described top electrode layer, described opening exposes described sacrifice layer；
Described sacrifice layer is removed by described opening.
Optionally, the material of described top electrode layer is poly-SiGe.
Optionally, the thickness range of described top electrode layer is
Optionally, described laser annealing processes the laser power adopted and ranges for 0.5J/cm2～10J/cm2。
Optionally, it is pulse laser that described laser annealing processes the laser adopted, and each pulse period of described pulse laser includes laser persistent period and interval time, and the described laser persistent period is 1ns～200ns, and described interval time is 10ns～1000ns.
Optionally, described laser annealing processes and carries out at ambient temperature, and carries out under the atmospheric condition of nitrogen or argon.
Optionally, the length range of described top electrode layer is 40 μm～100 μm, and width range is 40 μm～100 μm.
Optionally, Low Pressure Chemical Vapor Deposition is adopted to form described top electrode layer.
Optionally, the temperature range forming the employing of described top electrode layer is 420 DEG C～440 DEG C.
Optionally, described semiconductor base includes control circuit, the first interconnection structure and the second interconnection structure, described bottom electrode layer electrically connects described control circuit by described first interconnection structure, and described top electrode layer electrically connects described control circuit by described second interconnection structure.
Compared with prior art, technical scheme has the advantage that
In technical scheme, after forming top electrode layer, top electrode layer is carried out laser annealing process, laser annealing processes and top electrode layer can be made to reach higher annealing temperature, so that top electrode layer is annealed fully, the internal stress making top electrode layer is reduced to fully little level, eliminates the adverse effect that internal stress is brought；Reduce the resistivity of the top electrode layer formed on the other hand, improve the electric conductivity of top electrode layer.Therefore, two aspects can both improve the performance of the pressure transducer formed.And described laser annealing processes and can only top electrode layer be annealed, without the other parts of pressure transducer are adversely affected.
Further, laser annealing processes the laser power adopted and ranges for 0.5J/cm2～10J/cm2.Laser power selects relevant to the thickness of top electrode layer.If laser power is more than 10J/cm2, laser is likely to pass through top electrode layer, following circuit devcie is caused damage, and if laser power is less than 0.5J/cm2, then top electrode layer fully cannot be annealed, and then the top electrode layer formed cannot be made to meet corresponding internal stress level and resistivity level.
Accompanying drawing explanation
Fig. 1 to Figure 10 is the structural representation that each step of forming method of the pressure transducer that the embodiment of the present invention provides is corresponding.
Detailed description of the invention
As described in background, the pressure transducer performance that existing method is formed is not good.Analyzing reason further, originally, existing method, when forming the top electrode layer of pressure transducer, generally adopts furnace process to be formed, but the top electrode layer internal stress that furnace process is formed is relatively big, and resistivity is also bigger.And top electrode layer is as cavity (cavity is between bottom electrode and the top electrodes) top crown of senses change in pressure, it is low that the internal stress requiring it is tried one's best, change value of pressure accurately can be obtained, it is low that the resistance simultaneously requiring it is tried one's best, in order to can obtain better conductive characteristic.And if top electrode layer internal stress is relatively big, itself easily splitting, making pressure transducer lose efficacy.Even if top electrode layer does not split, also easily produce bending or warpage, so that cavity capacitance produces change, and then cause that the pressure change measured is inaccurate, i.e. pressure transducer hydraulic performance decline.
For solving the problems referred to above, the present invention provides the forming method of a kind of pressure transducer, described method provides semiconductor base, described semiconductor base is formed bottom electrode layer, described semiconductor base is formed sacrifice layer, described sacrifice layer covers described bottom electrode layer, form top electrode layer, described top electrode layer covers the end face of described sacrifice layer, side and the described semiconductor base of part, described top electrode layer is carried out laser annealing process, after described laser treatment, described top electrode layer is formed the opening running through described top electrodes layer thickness, described opening exposes described sacrifice layer, described sacrifice layer is removed by described opening.Described method is after forming top electrode layer, top electrode layer is carried out laser annealing process, the internal stress of top electrode layer is made to be reduced to fully little level on the one hand, eliminate the adverse effect that internal stress is brought, reduce the resistivity of the top electrode layer formed on the other hand, thus improving the performance of pressure transducer.
Understandable for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from, below in conjunction with accompanying drawing, specific embodiments of the invention are described in detail.
The embodiment of the present invention provides the forming method of a kind of pressure transducer, incorporated by reference to referring to figs. 1 to Figure 10.
Refer to Fig. 1, it is provided that semiconductor base, described semiconductor base includes Semiconductor substrate (not shown) and the dielectric layer 100 being positioned in described Semiconductor substrate.
In the present embodiment, described semiconductor base also includes control circuit (not shown), the first interconnection structure and the second interconnection structure.Fig. 1 showing, the first interconnection structure includes interconnection line 101 and connector 102, interconnection line 101 and connector 102 and electrically connects, and interconnection line 101 is electrically connected to described control circuit.Second interconnection structure then includes interconnection line 104, interconnection line 107, connector 105 and connector 108.Interconnection line 104 electrically connects connector 105, and interconnection line 107 electrically connects connector 108, and interconnection line 104 electrically connects described control circuit, and interconnection line 107 electrically connects described control circuit.
Described Semiconductor substrate can be silicon substrate, germanium substrate, III-group Ⅴ element compound substrate, silicon carbide substrates or its laminated construction, can also be silicon on insulated substrate or diamond substrate, it is also possible to be well known to a person skilled in the art other semiconductive material substrate.In the present embodiment, described Semiconductor substrate is specially silicon substrate.
In the present embodiment, can also including other device architectures, for instance amplifier, D/A converter, analog processing circuit and/or digital processing circuit, interface circuit etc. in described semiconductor base, the forming method of these device architectures can be all CMOS technology.
In the present embodiment, described control circuit can be cmos circuit, and the material of dielectric layer can be silicon oxide, and the material of interconnection line can be aluminum or copper, and the material of connector can be copper or tungsten.The forming method of dielectric layer, interconnection line and connector, known by those skilled in the art, does not repeat them here.
In the present embodiment, diffusion impervious layer (mark) between each connector and dielectric layer 100, can also be formed.The metal material that diffusion impervious layer is possible to prevent in each connector diffuses in dielectric layer 100.
Please continue to refer to Fig. 1, forming bottom electrode layer 103, interconnection line 106 and interconnection line 109 on described semiconductor base, wherein, bottom electrode layer 103 is electrically connected to described control circuit by the interconnection line 101 in the first interconnection structure and connector 102.And interconnection line 106 and interconnection line 109 belong to a part for described second interconnection structure.
In the present embodiment, bottom electrode layer 103, interconnection line 106 and interconnection line 109 are all surrounded by dielectric layer 100.It is true that dielectric layer 100 can be multiple structure, and multiple processing step can be adopted to be formed, so that bottom electrode layer 103, interconnection line 106 and interconnection line 109 are enclosed in dielectric layer 100.
In the present embodiment, the material of bottom electrode layer 103 can be the combination in any of aluminum, titanium, zinc, silver, gold, copper, tungsten, cobalt, nickel, tantalum, these metals of platinum one of them or they；Or, it is also possible to nonmetal or their combination in any for polysilicon, non-crystalline silicon, poly-SiGe, these conductions (doping) of amorphous germanium silicon；Or, selected from the combination in any of described metal, conductive non-metals one of them and they, and it is not limited to these materials, it is also possible to the other materials being known to the skilled person.
In the present embodiment, interconnection line 106 can be identical with the material of bottom electrode layer 103 with the material of interconnection line 109, and they can adopt identical technique together to be formed, thus saving processing step.
Refer to Fig. 2, etch media layer 100 is to expose interconnection line and interconnection line.
In the present embodiment, first can form the photoresist (not shown) of patterning on dielectric layer 100, then with photoresist for mask, adopt reactive ion etching (ReactiveIonEtching, RIE) technique etch media layer 100, to expose interconnection line 106 and interconnection line 109.
Refer to Fig. 3, form sacrifice layer 110 on described semiconductor base, sacrifice layer 110 covers bottom electrode layer 103.
In the present embodiment, the end face of bottom electrode layer 103 and side are enclosed in dielectric layer 100, and (namely the end face of bottom electrode layer 103 and side are covered by dielectric layer, it is internal that whole bottom electrode layer 103 is positioned at dielectric layer 100), therefore, can pass through to be formed sacrifice layer 110 on dielectric layer 100, so that sacrifice layer 110 covers described bottom electrode layer 103, as shown in Figure 3.
It should be noted that, in other embodiments of the invention, when described bottom electrode layer is formed after semiconductor base, if all come out in the end face of bottom electrode layer and side, can also forming sacrifice layer at the end face of described bottom electrode layer and side, namely sacrifice layer directly covers side and the end face of bottom electrode layer.
It should be noted that, in other embodiments of the invention, when described bottom electrode layer is formed after semiconductor base, if all come out in the end face of bottom electrode layer and side, other dielectric layer can also be formed and only cover the side of described bottom electrode layer, and the end face of bottom electrode layer is exposed (namely dielectric layer upper surface flushes) with the end face of bottom electrode layer, now directly can form sacrifice layer on the end face of described bottom electrode layer, and described sacrifice layer can cover the described dielectric layer of part simultaneously, namely the area of plane of described sacrifice layer is more than the area of plane of described bottom electrode layer.
In the present embodiment, the material of sacrifice layer 110 can be amorphous carbon, but is not limited to amorphous carbon, it is also possible to the other materials being known to the skilled person, for instance photoresist or polyimides (PI) etc..Can utilizing chemical vapor deposition amorphous carbon, cover in bottom electrode layer 103, utilize photoetching, etching technics to remove part amorphous carbon afterwards, residue covers the amorphous carbon of bottom electrode layer 103, namely forms sacrifice layer 110.
Refer to Fig. 4, form top electrode layer 111, cover the end face of sacrifice layer 110, side and part semiconductor substrate, part semiconductor substrate is specially certain media layer 100 (namely top electrode layer 111 covers part dielectric layer 100) in the diagram.And top electrode layer 111 electrically connects interconnection line 106 and the interconnection line 109 that abovementioned steps exposes, and is electrically connected to described control circuit by described second interconnection structure being made up of each interconnection line and connector.
In the present embodiment, it is low that the material of top electrode layer 111 needs to meet formation temperature, internal stress low (less than 20Mpa) and the feature conducted electricity very well.Therefore poly-SiGe can be chosen as.It should be noted that in other embodiments of the invention, it is low that top electrode layer 111 can also select other to meet formation temperature, internal stress low (less than 20Mpa) and the material conducted electricity very well.
In the present embodiment, it is possible to adopt Low Pressure Chemical Vapor Deposition (LowPressureChemicalVaporDeposition, LPCVD) to form top electrode layer 111.Described Low Pressure Chemical Vapor Deposition can carry out in boiler tube (Furnace) equipment.LPCVD has a major advantage in that the film equality with excellence and preferably gradient coating performance, and can the chip of depositing large-area.Concrete, the forming process of top electrode layer 111 can be: deposition conductive layer (not shown), described conductive layer covers the end face of sacrifice layer 110 and side and certain media layer 100, then utilizes photoetching process that described conductive layer is patterned, and forms top electrode layer 111.
In the present embodiment, the temperature range forming top electrode layer 111 employing is 420 DEG C～440 DEG C.Because when forming top electrode layer 111, (CMOS) circuit above is formed, in order to ensure that circuit is not affected by high temperatures, require that technological temperature below is less than 450 DEG C, and simultaneously in order to retain certain process window (to ensure that formation temperature can have fixed domain of walker), temperature is controlled below 440 DEG C.But on the other hand, for the top electrode layer 111 needed for LPCVD formation of deposits can be adopted, it is necessary to ensure that temperature is more than 420 DEG C.
In the present embodiment, in order to ensure that top electrode layer 111 meets the making requirement of pressure transducer, the thickness range arranging top electrode layer 111 isThe length range of top electrode layer 111 is 40 μm～100 μm, and the width range of top electrode layer 111 is 40 μm～100 μm, and namely the area of top electrode layer 111 can be (40 μ m 40 μm)～(100 μ m 100 μm).
Incorporated by reference to reference Fig. 4 and Fig. 5, top electrode layer 111 shown in Fig. 4 is carried out laser annealing process process, until forming top electrode layer 112 shown in Fig. 5.
In the present embodiment, it can be pulse laser that laser annealing processes the laser (as shown by the arrows in figure 4, do not mark) adopted, and in each pulse period, the laser persistent period can be 1ns～200ns, and interval time can be 10ns～1000ns.Laser persistent period and interval time, design parameter was determined by the thickness of top electrode layer 111 not damage premised on following circuit devcie (cmos device).Owing to, in the present embodiment, the thickness range of top electrode layer 111 isTherefore the laser persistent period can be 1ns～200ns, and the top electrode layer 111 to ensure respective thickness is increased to corresponding annealing temperature.Then ensure that top electrode layer 111 experiences enough annealing times under corresponding annealing temperature condition interval time, thus the quality of the top electrode layer 112 formed after ensureing annealing reaches necessary requirement.
In the present embodiment, laser annealing processes the laser power adopted and ranges for 0.5J/cm2～10J/cm2.Laser power selects relevant to the thickness of top electrode layer 111.If laser power is more than 10J/cm2, laser is likely to pass through top electrode layer 111, following cmos device is caused damage, and if laser power is less than 0.5J/cm2, then top electrode layer 111 fully cannot be annealed, and then the top electrode layer 111 formed cannot be made to meet corresponding internal stress level and resistivity level.
In the present embodiment, the annealing temperature that laser annealing processes is by laser power (0.5J/cm2～10J/cm2) determine.It can be 200nm～600nm that laser annealing processes the laser wavelength range adopted.When the power that wavelength and the laser annealing of laser process is fixing, annealing temperature is just substantially stationary.This enforcement is especially by the power and the wavelength that control laser, the annealing temperature that can make top electrode layer 111 reaches 1000 DEG C～1300 DEG C, so that top electrode layer 111 is made annealing treatment fully, it is ensured that top electrode layer 111 internal stress ultimately formed and resistivity are all reduced to ideal level.Further, adopting laser annealing to process and also have a highly important reason, namely laser annealing processes and can top electrode layer 111 individually be carried out, except top electrode layer 111, and the impact of other structure not Stimulated Light annealing.
In the present embodiment, laser annealing processes and can carry out at ambient temperature, and can carry out when nitrogen or argon gas atmosphere, and the oxidizing gas such as the top electrode layer 111 that nitrogen or argon are prevented from annealing process high temperature and oxidation reacts.
Refer to Fig. 6, top electrode layer 112 is formed adhesion layer 113.
In the present embodiment, the material of adhesion layer 113 can be silicon nitride, because silicon nitride can strengthen the adhesive attraction between top electrode layer 112 and the dielectric layer 116 (refer to Fig. 9) being subsequently formed.It is to say, form adhesion layer 113 in order that the adhesiveness that increases between top electrode layer 112 and the dielectric layer 116 being subsequently formed.Without adhesion layer 113, the adhesiveness between top electrode layer 112 and dielectric layer is poor, and in pressure transducer work process, dielectric layer 116 may depart from top electrode layer 112, affects performance and the ruggedness of pressure transducer.
It should be noted that in other embodiments of the invention, if good adhesion between top electrode layer and the dielectric layer being subsequently formed, then adhesion layer is not necessarily formed.And if adhesiveness is bad between the two, then need to select suitable material as adhesion layer between the two.
Refer to Fig. 7, form opening 114 in adhesion layer and top electrode layer 112, opening 114 exposes sacrifice layer 110.
In the present embodiment, the forming process of opening 114 is specifically as follows: utilize photoetching and etching technics etching adhesion layer 113 and top electrode layer 112, to form the opening 114 running through in adhesion layer 113 and top electrode layer 112.
Refer to Fig. 8, remove sacrifice layer 110 by opening 114, between adhesion layer 113 and top electrode layer 112 and bottom electrode layer 103, form cavity 115.
In the present embodiment, the material of sacrifice layer 110 is amorphous carbon, and the method therefore removing sacrifice layer 110 can be: the oxygen of the ionizations such as employing forms oxygen plasma, more described oxygen plasma is passed into opening 114, when temperature range is 150 DEG C～450 DEG C, amorphous carbon described in ashing.The present embodiment goes down except amorphous carbon in the condition that temperature range is 150 DEG C～450 DEG C, it is ensured that control circuit and interconnection structure in semiconductor base are injury-free.
Refer to Fig. 9, form dielectric layer 116 and cover top electrode layer 112 and dielectric layer 110.
In the present embodiment, the material of dielectric layer 116 is equally possible for silicon dioxide, and its formation process is well known to those skilled in the art, and does not repeat them here.
Refer to Figure 10, form two openings 117 on dielectric layer 116, the top electrode layer 112 isolated between two openings 117 is partly as pressure sensing district.
In the forming method of the pressure transducer that the present embodiment provides, after forming top electrode layer 111, top electrode layer 111 is carried out laser annealing process, thus the internal stress of top electrode layer 112 is reduced to fully little level after making laser annealing process on the one hand, eliminate the adverse effect that internal stress is brought, reduce the resistivity of the top electrode layer 112 formed on the other hand, thus improving the performance of pressure transducer.
Concrete, the forming method of the pressure transducer that employing the present embodiment provides can make the internal stress of top electrode layer 112 control at below 5MPa, even close to zero internal stress, and resistivity controls at 1m below Ω cm, so that corresponding pressure transducer performance is greatly improved.
Although present disclosure is as above, but the present invention is not limited to this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (9)
1. the forming method of a pressure transducer, it is characterised in that including:
Semiconductor base is provided；
Described semiconductor base is formed bottom electrode layer；
Forming sacrifice layer on described semiconductor base, described sacrifice layer covers described bottom electrode layer；
Forming top electrode layer, described top electrode layer covers the end face of described sacrifice layer, side and the described semiconductor base of part；
Described top electrode layer is carried out laser annealing process；
After described laser treatment, forming the opening running through described top electrodes layer thickness in described top electrode layer, described opening exposes described sacrifice layer；
Described sacrifice layer is removed by described opening；
Described laser annealing processes the laser power adopted and ranges for 0.5J/cm2～10J/cm2。
2. forming method as claimed in claim 1, it is characterised in that the material of described top electrode layer is poly-SiGe.
3. forming method as claimed in claim 2, it is characterised in that the thickness range of described top electrode layer is
4. forming method as claimed in claim 1, it is characterized in that, it is pulse laser that described laser annealing processes the laser adopted, each pulse period of described pulse laser includes laser persistent period and interval time, the described laser persistent period is 1ns～200ns, and described interval time is 10ns～1000ns.
5. forming method as claimed in claim 1, it is characterised in that described laser annealing processes and carries out at ambient temperature, and carries out under the atmospheric condition of nitrogen or argon.
6. forming method as claimed in claim 1, it is characterised in that the length range of described top electrode layer is 40 μm～100 μm, and width range is 40 μm～100 μm.
7. forming method as claimed in claim 1, it is characterised in that adopt Low Pressure Chemical Vapor Deposition to form described top electrode layer.
8. forming method as claimed in claim 1, it is characterised in that the temperature range forming the employing of described top electrode layer is 420 DEG C～440 DEG C.
9. forming method as claimed in claim 1, it is characterized in that, described semiconductor base includes control circuit, the first interconnection structure and the second interconnection structure, described bottom electrode layer electrically connects described control circuit by described first interconnection structure, and described top electrode layer electrically connects described control circuit by described second interconnection structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410425363.XA CN104155035B (en) | 2014-08-26 | 2014-08-26 | The forming method of pressure transducer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410425363.XA CN104155035B (en) | 2014-08-26 | 2014-08-26 | The forming method of pressure transducer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104155035A CN104155035A (en) | 2014-11-19 |
| CN104155035B true CN104155035B (en) | 2016-06-29 |
Family
ID=51880597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410425363.XA Active CN104155035B (en) | 2014-08-26 | 2014-08-26 | The forming method of pressure transducer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104155035B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020126915A1 (en) * | 2018-12-21 | 2020-06-25 | Robert Bosch Gmbh | Micromechanical pressure sensor device and a corresponding production method |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104787719B (en) * | 2015-03-11 | 2017-03-15 | 上海华虹宏力半导体制造有限公司 | Microelectronic pressure sensor for mechanical system manufacture method |
| CN106698328A (en) * | 2015-11-12 | 2017-05-24 | 上海丽恒光微电子科技有限公司 | Pressure sensor and preparation method thereof |
| CN106698327B (en) * | 2015-11-12 | 2018-08-24 | 上海丽恒光微电子科技有限公司 | The preparation method of pressure sensor |
| CN106706174A (en) * | 2015-11-12 | 2017-05-24 | 上海丽恒光微电子科技有限公司 | Method for preparing pressure sensor |
| CN106932138B (en) * | 2015-12-31 | 2019-09-27 | 中芯国际集成电路制造(上海)有限公司 | A kind of MEMS pressure sensor and preparation method thereof, electronic device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102183335A (en) * | 2011-03-15 | 2011-09-14 | 迈尔森电子（天津）有限公司 | Mems pressure sensor and manufacturing method thereof |
| CN202153165U (en) * | 2011-07-14 | 2012-02-29 | 无锡芯感智半导体有限公司 | Capacitive MEMS (Micro-Electro-Mechanical System) pressure sensor |
| CN102515090A (en) * | 2011-12-21 | 2012-06-27 | 上海丽恒光微电子科技有限公司 | Pressure sensor and formation method thereof |
| CN103454018A (en) * | 2012-05-31 | 2013-12-18 | 上海丽恒光微电子科技有限公司 | Pressure sensor, oscillator, ultrasonic sensor and measuring method |
| CN103700580A (en) * | 2013-12-12 | 2014-04-02 | 上海师范大学 | Method for preparing SiC ohmic contact by ultraviolet pulse laser irradiation device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW559686B (en) * | 2002-12-27 | 2003-11-01 | Prime View Int Co Ltd | Optical interference type panel and the manufacturing method thereof |
| WO2009133506A2 (en) * | 2008-04-29 | 2009-11-05 | Nxp B.V. | Mems device and manufacturing method |
-
2014
- 2014-08-26 CN CN201410425363.XA patent/CN104155035B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102183335A (en) * | 2011-03-15 | 2011-09-14 | 迈尔森电子（天津）有限公司 | Mems pressure sensor and manufacturing method thereof |
| CN202153165U (en) * | 2011-07-14 | 2012-02-29 | 无锡芯感智半导体有限公司 | Capacitive MEMS (Micro-Electro-Mechanical System) pressure sensor |
| CN102515090A (en) * | 2011-12-21 | 2012-06-27 | 上海丽恒光微电子科技有限公司 | Pressure sensor and formation method thereof |
| CN103454018A (en) * | 2012-05-31 | 2013-12-18 | 上海丽恒光微电子科技有限公司 | Pressure sensor, oscillator, ultrasonic sensor and measuring method |
| CN103700580A (en) * | 2013-12-12 | 2014-04-02 | 上海师范大学 | Method for preparing SiC ohmic contact by ultraviolet pulse laser irradiation device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020126915A1 (en) * | 2018-12-21 | 2020-06-25 | Robert Bosch Gmbh | Micromechanical pressure sensor device and a corresponding production method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104155035A (en) | 2014-11-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104155035B (en) | The forming method of pressure transducer | |
| US9224658B2 (en) | Membrane-based sensor device with non-dielectric etch-stop layer around substrate recess | |
| US7834409B2 (en) | Micromechanical component and corresponding method for its manufacture | |
| CN100499048C (en) | Nanogap, nano field effect transistor, molecular device and biosensor | |
| EP2762866B1 (en) | CMOS gas sensor and method for manufacturing the same | |
| EP2554981B1 (en) | Integrated circuit with a gas sensor and method of manufacturing such an integrated circuit | |
| JP5412682B2 (en) | Pressure sensor with resistance strain gauge | |
| US20030002238A1 (en) | Capacitive moisture sensor | |
| JP2015515609A (en) | Catheter die and manufacturing method thereof | |
| US20070062812A1 (en) | Gas sensor and method for the production thereof | |
| JP2013156259A (en) | Micromechanical solid-electrolyte sensor device and production method thereof | |
| JP6467173B2 (en) | Contact combustion type gas sensor | |
| JP2006212773A (en) | Micromachining type component element and corresponding manufacturing method | |
| CN104944359A (en) | MEMS (Micro Electro Mechanical System) device and forming method thereof | |
| US20180340901A1 (en) | Gas sensor platform and the method of making the same | |
| CN107529122A (en) | For harvesting the MEMS device and its manufacture method of acoustic energy | |
| JP6451395B2 (en) | Sensor element | |
| JP6340967B2 (en) | Gas sensor | |
| US9878900B2 (en) | Manufacturing method for a micromechanical pressure sensor device and corresponding micromechanical pressure sensor device | |
| KR100504177B1 (en) | Semiconductor gas sensor and Method for manufacturing the same | |
| JP2013187512A (en) | Semiconductor device | |
| CN104614119A (en) | Pressure sensor and forming method thereof | |
| CN105651450B (en) | Pressure sensor and forming method thereof | |
| JP2008198748A (en) | Semiconductor sensor and its manufacturing method | |
| JP2017150819A (en) | Gas sensor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |