CN104124193A - Groove isolation structure forming method - Google Patents
Groove isolation structure forming method Download PDFInfo
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- CN104124193A CN104124193A CN201310156923.1A CN201310156923A CN104124193A CN 104124193 A CN104124193 A CN 104124193A CN 201310156923 A CN201310156923 A CN 201310156923A CN 104124193 A CN104124193 A CN 104124193A
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- liner layer
- insulation liner
- opening
- insulation
- groove isolation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
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Abstract
A groove isolation structure forming method includes providing a semiconductor substrate with an opening; forming a first insulation liner layer on the lateral wall of the opening and the surface of the bottom; adopting an ion implantation process to implant modified ions into the portion of the first insulation liner layer close to the top of the opening; conducting a thermal annealing process after the ion implantation process to enable the first insulation liner layer with the implanted modified ions to form a second insulation liner layer; conducting a surface treatment process after the thermal annealing process to enable the surfaces of the first insulation liner layer and the second insulation liner layer in the opening to be provided with oxygen hydrogen keys, wherein the oxygen hydrogen key density of the surface of the second insulation liner layer is smaller than that of the surface of the first insulation liner layer; forming an insulation layer filling the opening on the surfaces of the first insulation liner layer and the second insulation liner layer in the opening. The formed shallow groove isolation structure is free of gaps and good in quality.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, relate in particular to a kind of formation method of groove isolation construction.
Background technology
Fleet plough groove isolation structure (Shallow Trench Isolation, STI) in current semiconductor device is manufactured for device isolation.The technique of described fleet plough groove isolation structure comprises: adopt etching technics in substrate, to form opening (being shallow trench), the active area of described shallow trench in being usually used at the bottom of isolation liner; In described substrate surface and opening, form the insulating barrier of filling full gate mouth, the material of described insulating barrier comprises silica; Adopt chemical machinery to throw technique and remove the insulating barrier higher than open top.
Development along with semiconductor technology, device size continues to dwindle, the integrated of integrated circuit improves constantly, the width dimensions that causes fleet plough groove isolation structure is corresponding reducing also, the depth-to-width ratio (aspect ratio) that is used to form the opening of fleet plough groove isolation structure constantly increases, and can cause generation space (void) in formed fleet plough groove isolation structure.Fig. 1 to Fig. 3 is the cross-sectional view of forming process of the groove isolation construction of prior art high-aspect-ratio.
Please refer to Fig. 1, the substrate 100 with opening 101 is provided, the depth-to-width ratio of described opening 101 is greater than 3:1, and the sidewall of described opening 101 and lower surface are formed with oxide liner layer 102.
Please refer to Fig. 2, adopt chemical vapor deposition method on substrate 100 surfaces and the interior formation insulation film 103 of opening 101.In forming the process of described insulation film 103, insulating material is easily deposited in the sidewall surfaces near opening 101 tops, and insulation film 103 thickness that cause being formed at opening 101 top sidewalls are thicker, and insulation film 103 thinner thicknesses of opening 101 bottoms.
Please refer to Fig. 3, continue to adopt chemical vapor deposition method to thicken insulation film 103, the insulation film 103 that is positioned at opening 101 tops is first closed, and in opening 101 now, appoint be not filled full, thereby form space 104.
Prior art is in order to overcome the filling problem in the opening of high-aspect-ratio, adopt high-aspect-ratio process for filling hole (HARP, High Aspect Ratio Process), to meet the more filling demand of high depth-width ratio open, to realize the tight of high aspect ratio trench quite isolation structure.Concrete, with tetraethoxysilane (TEOS) and ozone (O
3) be reacting gas, can fill the opening that depth-to-width ratio is greater than 6:1.
Yet, when being used to form the opening depth-to-width ratio of groove isolation construction, continuing to increase, described high-aspect-ratio process for filling hole still can produce space problem.
Summary of the invention
The problem that the present invention solves is to provide a kind of formation method of groove isolation construction, makes tight in formed fleet plough groove isolation structure, quality good.
For addressing the above problem, the invention provides a kind of formation method of groove isolation construction, comprising: Semiconductor substrate is provided, in described Semiconductor substrate, there is opening; Sidewall and lower surface at described opening form the first insulation liner layer; Adopt ion implantation technology near the part of open top, to inject modification ion to described the first insulation liner layer; After described ion implantation technology, carry out thermal anneal process, make the first insulation liner layer of injecting modification ion form the second insulation liner layer; After thermal anneal process, carry out process of surface treatment, make the first insulation liner layer and the second insulation liner layer surface in described opening there is hydrogen-oxygen key, and the hydrogen-oxygen key density on described the second insulation liner layer surface is less than the hydrogen-oxygen key density on the first insulation liner layer surface; After process of surface treatment, the first insulation liner layer surface in described opening and the second insulation liner layer surface form fills full gate mouth insulating barrier.
Optionally, described ion implantation technology is: implant angle is 15 °～30 °, and implantation dosage is 1*105～1*107 atom/square centimeter, and Implantation Energy is 10KeV～50KeV.
Optionally, in described ion implantation technology process, horizontally rotate described Semiconductor substrate, described in the angle that horizontally rotates comprise 0 °, 90 °, 180 ° and 270 °.
Optionally, described process of surface treatment is: temperature is 400 ℃～550 ℃, the flow of steam H2O is 3000 standard ml/min～6000 standard ml/min, the flow of carrier gas helium is 5000 standard ml/min～15000 standard ml/min, air pressure is 2 holder～8 holders, and radio-frequency power is 500 watts～1000 watts.
Optionally, the material of described the first insulation liner layer is silica, and described modification ion is nitrogen ion, and the material of described the second insulation liner layer is silicon oxynitride or silicon nitride.
Optionally, the formation technique of described the first insulation liner layer is thermal oxidation technology, and the thickness of described the first insulation liner layer is 20 dust～200 dusts.
Optionally, the formation technique of described insulating barrier is: on described Semiconductor substrate, the first insulation liner layer and the second insulation liner layer surface, form and fill full gate mouth insulation film; The insulation film of chemo-mechanical polishing semiconductor substrate surface, until expose Semiconductor substrate.
Optionally, the material of described insulation film is silica, and formation technique is chemical vapor deposition method.
Optionally, the deposition gases of described chemical vapor deposition method comprises tetraethoxysilane and ozone, the flow of described tetraethoxysilane is 500 milli gram/minute～8000 milli gram/minute, the flow of ozone is 5000 standard ml/min～3000 standard ml/min, air pressure is 300 holder～600 holders, and temperature is 400 degrees Celsius～600 degrees Celsius.
Optionally, described deposition gases also comprises: nitrogen, oxygen and helium, the flow of nitrogen is 1000 standard ml/min～10000 standard ml/min, the flow of oxygen is 0 standard ml/min～5000 standard ml/min, and the flow of helium is 5000 standard ml/min～20000 standard ml/min.
Optionally, the depth-to-width ratio of described opening is greater than 8:1.
Optionally, the formation technique of described opening is: at semiconductor substrate surface, form mask layer, described mask layer exposes part semiconductor substrate surface, and the material of described mask layer is silicon nitride; Take described mask layer as mask etching Semiconductor substrate, and to form opening, described mask layer is removed after forming insulating barrier.
Optionally, described thermal anneal process is: temperature is 500 degrees Celsius～800 degrees Celsius, and the time is 30 minutes～90 minutes.
Compared with prior art, technical scheme of the present invention has the following advantages:
Be used to form the opening sidewalls of isolation structure and lower surface form the first insulation liner layer as liner after, adopt ion implantation technology near the part of open top, to inject modification ion to described the first insulation liner layer, and the first insulation liner layer that is positioned at the first insulation liner layer of open bottom and drives the sidewall surfaces of open bottom into does not have modification ion; After carrying out thermal anneal process, first insulation liner layer with modification ion of close open top sidewall forms the second insulation liner layer; Follow-up carry out surface treatment after, due to material self character, the hydrogen-oxygen key density on the second insulation liner layer surface is less than the hydrogen-oxygen key density of the first insulation liner layer, while making follow-up formation insulating barrier, the speed that open top surface forms insulating barrier is less than the speed that open bottom forms insulating barrier, suppressed open top insulating barrier and formed the too fast problem of speed, overcome owing to thering is the problem in space in the open top groove isolation construction that first closure causes.Formed groove isolation construction is fine and close, quality is good, stable performance.
Further, the material of described the first insulation liner layer is silica, and formation technique is thermal oxidation technology, for the transition as between insulating barrier and Semiconductor substrate, reduces the defect between insulating barrier and Semiconductor substrate; Described modification ion is nitrogen ion, and the material of formed the second dielectric substrate layers is silicon oxynitride; Material behavior decision due to described the first insulation liner layer and the second insulation liner layer, the hydrogen-oxygen key on described the first insulation liner layer surface is more than the hydrogen-oxygen key on the second insulation liner layer surface, therefore the speed that forms insulating barrier on the second insulation liner layer surface is less than the speed that the first insulation liner layer surface forms insulating barrier, can avoid the closed problem of open top when opening is full for filling, be conducive to form void-free groove isolation construction.
Further, the ion implantation technology of injecting modification ion in the first insulation liner layer has the implant angle of inclination, described implant angle is 15 °～30 ° angles with respect to semiconductor substrate surface, make modification ion only inject the first insulation liner layer near the part of open top, and do not there is modification ion in the first insulation liner layer of the sidewall surfaces of open bottom and close bottom, thereby realize after thermal anneal process, opening is different from lower surface near the material of the sidewall surfaces at top, to meet open top sidewall and the different demand of bottom hydrogen-oxygen key density.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the cross-sectional view of forming process of the groove isolation construction of prior art high-aspect-ratio;
Fig. 4 to Fig. 9 is the cross-sectional view of the forming process of groove isolation construction described in embodiments of the invention;
Figure 10 is the mechanism schematic diagram that adopts tetraethoxysilane and ozone, forms insulation film with high-aspect-ratio depositing operation.
Embodiment
As stated in the Background Art, in the groove isolation construction of the formed high-aspect-ratio of prior art, easily form space.
Through the present inventor, study discovery, adopt high-aspect-ratio technique to take silester and ozone when reacting gas forms silicon oxide film, deposition rate is relevant with the hydrogen-oxygen key density of institute's deposition surface, and when the hydrogen-oxygen key density of institute's deposition surface is higher, deposition rate is faster.In prior art, be used to form the opening sidewalls of insulating barrier identical with the material of lower surface, hydrogen-oxygen key density is close, close in the speed of described opening sidewalls and lower surface cvd silicon oxide film.Yet reacting gas is the sidewall at contact openings top first easily, the sidewall surfaces of described open top can first capture reacting gas and form silica, causes in the speed of described open top formation silicon oxide film faster compared with open bottom; Depth-to-width ratio continuation increase when described opening, for example, while being greater than 10:1, the difficulty that reacting gas arrives open bottom increases, cause open bottom to form the rate reduction of silicon oxide film, the speed of the silicon oxide film of open top formation is simultaneously very fast, therefore still can cause the insulating layer of silicon oxide of open top first closed, and in opening, form space, cause generation space in formed groove isolation construction, described space can reduce isolation effect, or catch electric charge, easily cause formed device performance unstable.
Through the present inventor, further study, be used to form the opening sidewalls of isolation structure and lower surface form the first insulation liner layer as liner after, adopt ion implantation technology near the part of open top, to inject modification ion to described the first insulation liner layer, and be positioned at the first insulation liner layer of open bottom and lean on into the first insulation liner layer of the sidewall surfaces of open bottom, do not there is modification ion; After carrying out thermal anneal process, first insulation liner layer with modification ion of close open top sidewall forms the second insulation liner layer; Follow-up carry out surface treatment after, due to material self character, the hydrogen-oxygen key density on the second insulation liner layer surface is less than the hydrogen-oxygen key density of the first insulation liner layer, while making follow-up formation insulating barrier, the speed that open top surface forms insulating barrier is less than the speed that open bottom forms insulating barrier, suppressed open top insulating barrier and formed the too fast problem of speed, overcome owing to thering is the problem in space in the open top groove isolation construction that first closure causes.Formed groove isolation construction is fine and close, quality is good, stable performance.
For above-mentioned purpose of the present invention, feature and advantage can more be become apparent, below in conjunction with accompanying drawing, specific embodiments of the invention are described in detail.
Fig. 4 to Fig. 9 is the cross-sectional view of the forming process of groove isolation construction described in embodiments of the invention.
Please refer to Fig. 4, Semiconductor substrate 200 is provided, in described Semiconductor substrate 200, there is opening 201.
Described Semiconductor substrate 200 is used to subsequent technique that workbench is provided, and the material of described Semiconductor substrate 200 is silicon, SiGe, carborundum, silicon-on-insulator or III-V compounds of group (such as gallium nitride or GaAs etc.).
The interior follow-up fleet plough groove isolation structure (STI, Shallow Trench Isolation) that is used to form of described opening 201; The formation technique of described opening 201 comprises: on Semiconductor substrate 200 surfaces, form mask layer 202, described mask layer 202 has defined the position of active area of semiconductor device, and exposing Semiconductor substrate 200 surfaces that need to form opening 201, the material of described mask layer 202 is the combination of silica, silicon nitride or silica and silicon nitride; The described mask layer 202 of take is mask, adopts anisotropic dry etch process etching semiconductor substrate, at the interior formation opening 201 of Semiconductor substrate 200.
Along with the characteristic size of semiconductor device continues to dwindle, the integrated level of integrated circuit improves constantly, the width dimensions that causes dwindling the groove isolation construction top of formation constantly dwindles, and the degree of depth of described groove isolation construction is not answered corresponding reducing, thereby the depth-to-width ratio that causes being used to form the opening 201 of isolation structure constantly increases, described opening 201 top width are of a size of 30nm～50nm, and the depth-to-width ratio of described opening 201 is greater than 6:1.In the present embodiment, the depth-to-width ratio of described opening 201 is greater than 8:1.
When the depth-to-width ratio of described opening 201 larger, for example, while being greater than 6:1, the follow-up difficulty at described opening 201 interior fill insulants improves, the bottom that is difficult to fully enter opening 201 for the insulating material of filling opening 201, the in the situation that of being easily insulated material closes at described opening 201 tops, in described opening, still having and be not filled full space.
Therefore, the present embodiment is the formation speed near the sidewall surfaces insulation film at opening 201 tops by reduction, and improve the formation speed of opening 201 bottom insulation films, to avoid opening 201 tops closed too early, thereby at the void-free isolation structure of follow-up formation.
Please refer to Fig. 5, in sidewall and the lower surface of described opening 201, form the first insulation liner layer 203.
Described the first insulation liner layer 203 is for the transition as between Semiconductor substrate 200 and the insulating barrier of follow-up formation, make insulating barrier and the bond quality between Semiconductor substrate 200 of follow-up formation better, reduce the defect between insulating barrier and Semiconductor substrate 200 contact interfaces, improve the stability of formed semiconductor device.
In the present embodiment, the material of described the first insulation liner layer 203 is silica, and the formation technique of described the first insulation liner layer 203 is thermal oxidation technology, and the thickness of described the first insulation liner layer is 20 dust～200 dusts; After following adopted steam carries out surface treatment, described the first insulation liner layer 203 surfaces can have the hydrogen-oxygen key of specific density, described hydrogen-oxygen key has determined the speed of subsequent deposition insulation film, and the density of described hydrogen-oxygen key is higher, and the speed that forms insulation film is higher; And the density of described hydrogen-oxygen key determines by properties of materials, the density of the hydrogen-oxygen key that the first insulation liner layer 203 surfaces obtain is identical.
Follow-up in opening 201 bottoms in order to improve, and the speed that forms insulation film near the sidewall surfaces of opening 201 bottoms, and the sidewall surfaces that reduces close opening 201 tops forms the speed of insulation film, follow-uply need to make described the first insulation liner layer 203 form the second insulation liner layer near the sidewall surfaces of open top, and make the density of the hydrogen-oxygen key that described the second insulation liner layer surface can form lower than the hydrogen-oxygen key density on the first insulation liner layer surface, during follow-up formation insulation film, opening 201 forms the rate reduction of insulation film near the sidewall surfaces at top, be conducive to form void-free insulating barrier.
Please refer to Fig. 6, adopt ion implantation technology near the part at opening 201 tops, to inject modification ion to described the first insulation liner layer 203.
The modification ion that described ion implantation technology is injected is for making opening 201 near the sidewall surfaces modification at top, after subsequent thermal annealing process, the hydrogen-oxygen key density of material surface that makes to inject part first insulation liner layer 203 of modification ion reduces, thereby reduce the formation speed of part the first insulation liner layer 203 surface insulation films that injected modification ion, to avoid opening 201 closed too early; And described hydrogen-oxygen key density depends on the material behavior that it depends on, therefore only need to control the modification ionic species injecting, make the material of the formation after injecting can reduce the ability that depends on of hydrogen-oxygen key.
In the present embodiment, the material of described the first insulation liner layer 203 is silica, the modification ion that injected is nitrogen ion, the second insulation liner layer that silicon oxynitride is material is take in the follow-up formation of part that can make to inject modification ion, and the hydrogen-oxygen key density on described silicon oxynitride surface is lower than the hydrogen-oxygen key density of silicon oxide film, thereby the deposition rate of insulation film is reduced; And, make described modification Implantation the first insulation liner layer 203 near the sidewall surfaces at opening 201 tops, reduced follow-up insulation film in the formation speed of open top sidewall surfaces, to avoid opening 201 closed too early.
Described ion implantation technology is: implant angle is 15 °～30 °, and implantation dosage is 1*10
5～1*10
7atom/square centimeter, Implantation Energy is 10KeV～50KeV; In described ion implantation technology process, horizontally rotate described Semiconductor substrate 200, the described angle horizontally rotating comprises 0 °, 90 °, 180 ° and 270 °, horizontally rotate Semiconductor substrate 200 and can make injected modification ion enter the arbitrary sidewall surfaces near opening 201 tops of described opening 201, so that the arbitrary sidewall surfaces near top of follow-up opening 201 forms the speed of insulation film, all reduce.
It should be noted that, by the parameter adjustment of ion implantation technology, for example strengthen Implantation Energy, can make nitrogen ion interrupt the molecular link between silica, and form silicon nitride with silicon ion, can further reduce the hydrogen-oxygen key density of the part of injecting modification ion.
In other embodiments, the material of described the first insulation liner layer 203 can be adjusted according to concrete process requirements, and the kind of the modification ion injecting is adjusted according to the material of the first concrete insulation liner layer 203, and the density that only needs meet to inject formed material surface hydrogen-oxygen key after modification ion is lower than described the first insulation liner layer 203.
Please refer to Fig. 7, after described ion implantation technology, carry out thermal anneal process, make the first insulation liner layer 203 of injecting modification ion form the second insulation liner layer 204.
Described thermal anneal process is: temperature is 500 degrees Celsius～800 degrees Celsius, and the time is 30 minutes～90 minutes; Described thermal anneal process makes to inject the material that ion in modification ion and the first insulation liner layer 203 forms the second insulation liner layer 204; In the present embodiment, the material of described the first insulation liner layer 203 is silica, and described modification ion is nitrogen ion, and the material of formed the second insulation liner layer 204 is silicon oxynitride or silicon nitride.
Follow-up carry out process of surface treatment after, the density of the hydrogen-oxygen key of described silicon oxynitride or silicon nitride surface is lower than the density of the hydrogen-oxygen key of silicon oxide surface, and the follow-up speed that forms insulation film on the second insulation liner layer 204 surfaces is lower than the first insulation liner layer 203; And described the second insulation liner layer 204 is positioned at the surface near opening 201 top sidewalls, thereby the insulation film of having avoided being formed at opening 201 tops is closed and in the inner problem that produces spaces of opening 201 too early.Can make the quality of formed groove isolation construction good, improve the performance of formed semiconductor device.
Please refer to Fig. 8, after thermal anneal process, carry out process of surface treatment, make the first insulation liner layer 203 and the second insulation liner layer 204 surfaces in described opening 201 there is hydrogen-oxygen key, and the hydrogen-oxygen key density on described the second insulation liner layer 204 surfaces is less than the hydrogen-oxygen key density on the first insulation liner layer 203 surfaces.
Described process of surface treatment is: temperature is 400 ℃～550 ℃, and processing gas is steam (H
2o), the flow of steam is 3000 standard ml/min～6000 standard ml/min, and the flow of carrier gas helium is 5000 standard ml/min～15000 standard ml/min, and air pressure is 2 holder～8 holders, and radio-frequency power is 500 watts～1000 watts.
Described process of surface treatment is used for making described the first insulation liner layer 203 and the second insulation liner layer 204 surfaces with hydrogen-oxygen key; And, 204 of described the first insulation liner layer 203 or the second insulation liner layer with hydrogen-oxygen key density by the material behavior of described the first insulation liner layer 203 and the second insulation liner layer 204, determined.In the present embodiment, the material of described the first insulation liner layer 203 is silica, the material of described the second insulation liner layer 204 is silicon oxynitride or silicon nitride, after process of surface treatment, the hydrogen-oxygen key density on described the second insulation liner layer 204 surfaces is less than the hydrogen-oxygen key density on the first insulation liner layer 203 surfaces, and the speed that makes described the second insulation liner layer 204 surfaces form insulation film forms the speed of insulation film lower than the first insulation liner layer 203 surfaces.
Please refer to Fig. 9, after process of surface treatment, at described mask layer 203 surfaces and opening 201(as shown in Figure 8) in the first insulation liner layer 203 surfaces and the second insulation liner layer 204 surfaces insulation film 205 of forming filling full gate mouths 201.
It should be noted that, after forming described insulation film 205, adopt insulation film 205 described in CMP (Chemical Mechanical Polishing) process planarization until expose Semiconductor substrate 200 surfaces, form insulating barrier (not shown), described insulating barrier is formed groove isolation construction.
The material of described insulation film 205 is silica, and the formation technique of described insulation film 205 is chemical vapor deposition method, adopts high-aspect-ratio depositing operation (HARP) in the present embodiment; In the chemical vapor deposition method of the vertical wide ratio of described height, deposition gases comprises tetraethoxysilane Si(OC
2h
5)
4with ozone O
3, the flow of described tetraethoxysilane is 500 milli gram/minute～8000 milli gram/minute, and the flow of ozone is 5000 standard ml/min～3000 standard ml/min, and air pressure is 300 holder～600 holders, and temperature is 400 degrees Celsius～600 degrees Celsius; In addition, deposition gases also comprises: nitrogen, oxygen and helium, the flow of nitrogen is 1000 standard ml/min～10000 standard ml/min, the flow of oxygen is 0 standard ml/min～5000 standard ml/min, and the flow of helium is 5000 standard ml/min～20000 standard ml/min.In described chemical vapor deposition processes, the hydrogen-oxygen key density that is positioned at opening sidewalls and lower surface is higher, and the speed that forms insulation film 205 is faster, below with reference to accompanying drawing, illustrates.
Please refer to 10, Figure 10 is the mechanism schematic diagram that adopts tetraethoxysilane and ozone, forms insulation film with high-aspect-ratio depositing operation.Wherein, as shown in Figure 10 (a) shows, tetraethoxysilane Si(OC
2h
5)
4one-(OC in molecule
2h
5) key and ozone reaction formation hydrogen-oxygen key-OH; As shown in Figure 10 (b), Si(OC
2h
5)
3(OH) molecule with hydrogen-oxygen key combine with the hydrogen-oxygen key of material surface, at described material surface, form with three-(OC
2h
5) silica of key; As shown in Figure 10 (c), silica with-(OC
2h
5) key continues and ozone reaction forms hydrogen-oxygen key, forms the silica with hydrogen-oxygen key, the hydrogen-oxygen bond energy of described silica enough continues and deposition gases molecule forms silica; Therefore, the hydrogen-oxygen key density of material surface is higher, can with the molecular reaction of more deposition gases, the speed that forms silica is faster.
The material of first insulation liner layer 203 of the present embodiment is that the material of silica, the second insulation liner layer 204 is silicon oxynitride or silicon nitride, the hydrogen-oxygen key density of described silicon oxynitride or silicon nitride surface is less than silica, thereby is less than in the speed of the second insulation liner layer 204 surface formation insulation films the speed that forms insulation films on the first insulation liner layer 203 surfaces; And described the second insulation liner layer 204 is positioned at the surface near opening 201 top sidewalls, the speed that makes to form near the surface of opening 201 top sidewalls insulation film is lower, thereby can guarantee before opening 201 top closures, to fill full described opening 201, thereby can make formed groove isolation construction quality good.
In the present embodiment, in opening sidewalls and lower surface, form and take the first insulation liner layer that silica is material, part injecting nitrogen ion in described the first insulation liner layer near open top sidewall, makes after thermal annealing sidewall surfaces near open top form to take the second insulation liner layer that silicon oxynitride or silicon nitride are material again; After carrying out process of surface treatment with steam, due to material self character relation, the hydrogen-oxygen key of described silicon oxide film is more than the hydrogen-oxygen key of silicon oxynitride or silicon nitride surface, and described in to be positioned at surperficial hydrogen-oxygen key more, the speed of the insulation film that to form silica be material is higher.Therefore, form insulation film speed slower on the second insulation liner layer surface, the speed that forms insulation film on the first insulation liner layer surface is very fast.Can guarantee opening 201 fill full before, the top of described opening 201 can be closed, makes tight in formed groove isolation construction, quality good.
In sum, be used to form the opening sidewalls of isolation structure and lower surface form the first insulation liner layer as liner after, adopt ion implantation technology near the part of open top, to inject modification ion to described the first insulation liner layer, and the first insulation liner layer that is positioned at the first insulation liner layer of open bottom and drives the sidewall surfaces of open bottom into does not have modification ion; After carrying out thermal anneal process, first insulation liner layer with modification ion of close open top sidewall forms the second insulation liner layer; Follow-up carry out surface treatment after, due to material self character, the hydrogen-oxygen key density on the second insulation liner layer surface is less than the hydrogen-oxygen key density of the first insulation liner layer, while making follow-up formation insulating barrier, the speed that open top surface forms insulating barrier is less than the speed that open bottom forms insulating barrier, suppressed open top insulating barrier and formed the too fast problem of speed, overcome owing to thering is the problem in space in the open top groove isolation construction that first closure causes.Formed groove isolation construction is fine and close, quality is good, stable performance.
Further, the material of described the first insulation liner layer is silica, and formation technique is thermal oxidation technology, for the transition as between insulating barrier and Semiconductor substrate, reduces the defect between insulating barrier and Semiconductor substrate; Described modification ion is nitrogen ion, and the material of formed the second dielectric substrate layers is silicon oxynitride; Material behavior decision due to described the first insulation liner layer and the second insulation liner layer, the hydrogen-oxygen key on described the first insulation liner layer surface is more than the hydrogen-oxygen key on the second insulation liner layer surface, therefore the speed that forms insulating barrier on the second insulation liner layer surface is less than the speed that the first insulation liner layer surface forms insulating barrier, can avoid the closed problem of open top when opening is full for filling, be conducive to form void-free groove isolation construction.
Further, the ion implantation technology of injecting modification ion in the first insulation liner layer has the implant angle of inclination, described implant angle is 15 °～30 ° angles with respect to semiconductor substrate surface, make modification ion only inject the first insulation liner layer near the part of open top, and do not there is modification ion in the first insulation liner layer of the sidewall surfaces of open bottom and close bottom, thereby realize after thermal anneal process, opening is different from lower surface near the material of the sidewall surfaces at top, to meet open top sidewall and the different demand of bottom hydrogen-oxygen key density.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, so protection scope of the present invention should be as the criterion with claim limited range.
Claims (13)
1. a formation method for groove isolation construction, is characterized in that, comprising:
Semiconductor substrate is provided, in described Semiconductor substrate, there is opening;
Sidewall and lower surface at described opening form the first insulation liner layer;
Adopt ion implantation technology near the part of open top, to inject modification ion to described the first insulation liner layer;
After described ion implantation technology, carry out thermal anneal process, make part the first insulation liner layer of injecting modification ion form the second insulation liner layer;
After thermal anneal process, carry out process of surface treatment, make the first insulation liner layer and the second insulation liner layer surface in described opening there is hydrogen-oxygen key, and the hydrogen-oxygen key density on described the second insulation liner layer surface is less than the hydrogen-oxygen key density on the first insulation liner layer surface;
After process of surface treatment, the first insulation liner layer surface in described opening and the second insulation liner layer surface form fills full gate mouth insulating barrier.
2. the formation method of groove isolation construction as claimed in claim 1, is characterized in that, described ion implantation technology is: implant angle is 15 °～30 °, and implantation dosage is 1*10
5～1*10
7atom/square centimeter, Implantation Energy is 10KeV～50KeV.
3. the formation method of groove isolation construction as claimed in claim 2, is characterized in that, in described ion implantation technology process, horizontally rotates described Semiconductor substrate, described in the angle that horizontally rotates comprise 0 °, 90 °, 180 ° and 270 °.
4. the formation method of groove isolation construction as claimed in claim 1, is characterized in that, described process of surface treatment is: temperature is 400 ℃～550 ℃, steam H
2the flow of O is 3000 standard ml/min～6000 standard ml/min, and the flow of carrier gas helium is 5000 standard ml/min～15000 standard ml/min, and air pressure is 2 holder～8 holders, and radio-frequency power is 500 watts～1000 watts.
5. the formation method of groove isolation construction as claimed in claim 1, is characterized in that, the material of described the first insulation liner layer is silica, and described modification ion is nitrogen ion, and the material of described the second insulation liner layer is silicon oxynitride or silicon nitride.
6. the formation method of groove isolation construction as claimed in claim 5, is characterized in that, the formation technique of described the first insulation liner layer is thermal oxidation technology, and the thickness of described the first insulation liner layer is 20 dust～200 dusts.
7. the formation method of groove isolation construction as claimed in claim 1, is characterized in that, the formation technique of described insulating barrier is: on described Semiconductor substrate, the first insulation liner layer and the second insulation liner layer surface, form the insulation film of filling full gate mouth; The insulation film of chemo-mechanical polishing semiconductor substrate surface, until expose Semiconductor substrate.
8. the formation method of groove isolation construction as claimed in claim 7, is characterized in that, the material of described insulation film is silica, and formation technique is chemical vapor deposition method.
9. the formation method of groove isolation construction as claimed in claim 8, it is characterized in that, the deposition gases of described chemical vapor deposition method comprises tetraethoxysilane and ozone, the flow of described tetraethoxysilane is 500 milli gram/minute～8000 milli gram/minute, the flow of ozone is 5000 standard ml/min～3000 standard ml/min, air pressure is 300 holder～600 holders, and temperature is 400 degrees Celsius～600 degrees Celsius.
10. the formation method of groove isolation construction as claimed in claim 9, it is characterized in that, described deposition gases also comprises: nitrogen, oxygen and helium, the flow of nitrogen is 1000 standard ml/min～10000 standard ml/min, the flow of oxygen is 0 standard ml/min～5000 standard ml/min, and the flow of helium is 5000 standard ml/min～20000 standard ml/min.
The 11. formation methods of groove isolation construction as claimed in claim 1, is characterized in that, the depth-to-width ratio of described opening is greater than 8:1.
The 12. formation methods of groove isolation construction as claimed in claim 1, it is characterized in that, the formation technique of described opening is: at semiconductor substrate surface, form mask layer, described mask layer exposes part semiconductor substrate surface, and the material of described mask layer is silicon nitride; Take described mask layer as mask etching Semiconductor substrate, and to form opening, described mask layer is removed after forming insulating barrier.
The 13. formation methods of groove isolation construction as claimed in claim 1, is characterized in that, described thermal anneal process is: temperature is 500 degrees Celsius～800 degrees Celsius, and the time is 30 minutes～90 minutes.
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