CN109491447A - A kind of start-up circuit applied to band-gap reference circuit - Google Patents
A kind of start-up circuit applied to band-gap reference circuit Download PDFInfo
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- CN109491447A CN109491447A CN201811605162.2A CN201811605162A CN109491447A CN 109491447 A CN109491447 A CN 109491447A CN 201811605162 A CN201811605162 A CN 201811605162A CN 109491447 A CN109491447 A CN 109491447A
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- circuit
- nmos tube
- band
- gap reference
- drain electrode
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
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- Microelectronics & Electronic Packaging (AREA)
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- Nonlinear Science (AREA)
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Abstract
The present invention discloses a kind of start-up circuit applied to band-gap reference circuit, including start-up circuit module and band-gap reference circuit module, and wherein start-up circuit module is made of bias current generating circuit and start-up circuit；The start-up circuit makes band-gap reference circuit work in stable state for generating starting voltage signal；The bias current generating circuit closes start-up circuit for generating bias current.Wherein the bias voltage of bias current generating circuit is provided by the band-gap reference circuit after start completion.A kind of start-up circuit applied to band-gap reference circuit disclosed by the invention, only with two class device of metal-oxide-semiconductor and capacitor, it has the advantage that high reliablity, device are few, structure is simple, chip area footprints are small, and can voluntarily be turned off after band-gap reference circuit start completion, quiescent dissipation is extremely low.
Description
Technical field
The invention belongs to semiconductor integrated circuit technology fields, and in particular to a kind of starting applied to band-gap reference circuit
Circuit.
Background technique
Have in the circuits such as the voltage source of automatic biasing, the current source of automatic biasing and band gap reference one it is critically important
The presence of problem " degeneracy " bias point, in this case, all transistors transmit zero current, because loop branch allows
Zero current, therefore circuit can be indefinitely held off.Start-up circuit is added in foregoing circuit, then circuit can be driven to get rid of
Degeneracy bias point.
In existing start-up circuit, there are circuit structure complexity, chip area footprints greatly, the problems such as big is lost in power consumption,
As the integrated area of chip is made smaller and smaller, the requirement to power consumption is higher and higher, therefore designs that a kind of structure is simple, function
Consuming low start-up circuit becomes particularly important.
Summary of the invention
For existing start-up circuit, structure is complicated, chip area footprints are big, big problem is lost in power consumption, the present invention provides
The start-up circuit applied to band-gap reference circuit that a kind of structure is simple, chip area footprints are small, quiescent dissipation is extremely low.
Technical scheme is as follows:
A kind of start-up circuit applied to band-gap reference circuit, including start-up circuit module and band-gap reference circuit module, it is described
The external input enable signal IN of start-up circuit module, and generate starting voltage signal VOUT access band-gap reference circuit mould
Block starts the band-gap reference circuit；Bias voltage VP1, VP2 access starting electricity of the band-gap reference circuit module output
Road module makes start-up circuit module generate all the way accurately bias current, and start-up circuit module is promoted to close；
The start-up circuit module includes: by the first PMOS transistor P1, the second PMOS transistor P2, the first NMOS transistor
Bias current generating circuit that N1, the second NMOS transistor N2 and third NMOS transistor N3 are constituted and by first capacitor C1,
The start-up circuit that second capacitor C2, third PMOS transistor P3, the 4th NMOS transistor N4 and the 5th NMOS transistor N5 are constituted；
Wherein, the source electrode of the first PMOS transistor P1 connects power supply, and grid meets bias voltage VP1, and drain electrode connects the second PMOS transistor P2's
Source electrode；Second PMOS transistor P2 grid meets bias voltage VP2, and drain electrode connects the drain electrode of the first NMOS tube N1；First NMOS tube N1
Grid and drain electrode connect and connect the grid of the grid of the second NMOS tube N2, the grid of third NMOS tube N3, the 4th NMOS tube N4
And one end of first capacitor C1, source electrode connect the drain electrode of the second NMOS tube；The source electrode of second NMOS tube N2 meets third NMOS tube N3
Drain electrode；The source electrode of third NMOS tube is grounded；The other end of first capacitor C1 is grounded；The source electrode of third PMOS tube P3 connects power supply,
Grid meets input signal IN, and drain electrode connects drain electrode and the grid of the 5th NMOS tube N5 of the 4th NMOS tube N4；4th NMOS tube N4's
Source electrode ground connection；The drain electrode of 5th NMOS tube connects power supply, and source electrode connects one end of the second capacitor C2 and as voltage output signal end VOUT；
The other end of second capacitor C2 is grounded.
Further, the breadth length ratio of the third PMOS transistor P3 uses down the form of breadth length ratio for L=20W.
A kind of start-up circuit applied to band-gap reference circuit of the invention, only with two class device of metal-oxide-semiconductor and capacitor, device
Part is few, structure is simple, chip area footprints are small, high reliablity, and can voluntarily turn off after band-gap reference circuit start completion, static
Power consumption is extremely low.
Detailed description of the invention
Fig. 1 is the start-up circuit structural schematic diagram applied to band-gap reference circuit that embodiment of the present invention provides；
Fig. 2 is the start-up circuit modular circuit structural schematic diagram that embodiment of the present invention provides.
Specific embodiment
Presently in connection with attached drawing and specific embodiment, the present invention is described in more detail.
It is the start-up circuit structural schematic diagram applied to band-gap reference circuit of the invention, including start-up circuit referring to Fig. 1
Module I 1 and band-gap reference circuit module I 2.
It referring to fig. 2, is start-up circuit modular circuit structural schematic diagram of the invention.
As a preferred embodiment, 1 external input enable signal IN of start-up circuit module I, and generate starting
Voltage signal VOUT accesses band-gap reference circuit module I 2, starts the band-gap reference circuit；The band-gap reference circuit mould
Bias voltage VP1, VP2 of block output access start-up circuit module, and start-up circuit module is made to generate all the way accurately bias current,
Start-up circuit module is promoted to close.
Start-up circuit module I 1 includes: by the first PMOS transistor P1, the second PMOS transistor P2, the first NMOS transistor
Bias current generating circuit that N1, the second NMOS transistor N2 and third NMOS transistor N3 are constituted and by first capacitor C1,
The start-up circuit that second capacitor C2, third PMOS transistor P3, the 4th NMOS transistor N4 and the 5th NMOS transistor N5 are constituted；
Wherein, the source electrode of the first PMOS transistor P1 connects power supply, and grid meets bias voltage VP1, and drain electrode connects the second PMOS transistor P2's
Source electrode；Second PMOS transistor P2 grid meets bias voltage VP2, and drain electrode connects the drain electrode of the first NMOS tube N1；First NMOS tube N1
Grid and drain electrode connect and connect the grid of the grid of the second NMOS tube N2, the grid of third NMOS tube N3, the 4th NMOS tube N4
And one end of first capacitor C1, source electrode connect the drain electrode of the second NMOS tube；The source electrode of second NMOS tube N2 meets third NMOS tube N3
Drain electrode；The source electrode of third NMOS tube is grounded；The other end of first capacitor C1 is grounded；The source electrode of third PMOS tube P3 connects power supply,
Grid meets input signal IN, and drain electrode connects drain electrode and the grid of the 5th NMOS tube N5 of the 4th NMOS tube N4；4th NMOS tube N4's
Source electrode ground connection；The drain electrode of 5th NMOS tube connects power supply, and source electrode connects one end of the second capacitor C2 and as output signal end VOUT；Second
The other end of capacitor C2 is grounded.
As a preferred embodiment, the breadth length ratio of transistor P3 uses the form of breadth length ratio: L=20W, to reach transistor
The performance of circuit branch low-power consumption where P3.
Start-up circuit specific work process of the invention, includes the following steps:
1) grid of transistor P3 accesses low level enable signal IN, P3 conducting, and the electric current of generation fills the grid of transistor N5
Electricity charges to capacitor C2 after N5 conducting, and output end VOUT voltage increases, and starts band-gap reference circuit module I 2；
2) in 2 start-up course of band-gap reference circuit module I, bias voltage VP1, VP2 in band-gap reference circuit module I 2 are by letter
And transistor P1, P2 is connected to low level state in level point state change, the bias current of generation fills the capacitor C1
Electricity, while transistor N1, N2, N3, N4 is connected, the conducting of N4 drags down transistor N5 grid level, and N5 shutdown stops to institute
Capacitor C2 charging is stated, start-up circuit module I 1 is closed.
It is to be understood that the present invention and specific embodiment are intended to prove the reality of technical solution provided by the present invention
Using should not be construed as limiting the scope of the present invention.Those skilled in the art should be understood that do not depart from it is appended
In the spirit and scope of the present invention defined by claims, various changes can be made to the present invention in form and details
Change, is protection scope of the present invention.
Claims (2)
1. a kind of start-up circuit applied to band-gap reference circuit, including start-up circuit module (I1) and band-gap reference circuit module
(I2), it is characterised in that:
The external input enable signal IN of start-up circuit module (I1), and generate starting voltage signal VOUT access band gap
Reference circuit module (I2) starts the band-gap reference circuit；The biased electrical of band-gap reference circuit module (I2) output
VP1, VP2 access start-up circuit module (I1) are pressed, so that start-up circuit module (I1) is generated all the way accurately bias current, promotes to open
Dynamic circuit module (I1) is closed；
The start-up circuit module (I1) includes: by the first PMOS transistor P1, the second PMOS transistor P2, the first NMOS crystal
Bias current generating circuit that pipe N1, the second NMOS transistor N2 and third NMOS transistor N3 are constituted and by first capacitor
The starting electricity that C1, the second capacitor C2, third PMOS transistor P3, the 4th NMOS transistor N4 and the 5th NMOS transistor N5 are constituted
Road；Wherein, the source electrode of the first PMOS transistor P1 connects power supply, and grid meets bias voltage VP1, and drain electrode meets the second PMOS transistor P2
Source electrode；Second PMOS transistor P2 grid meets bias voltage VP2, and drain electrode connects the drain electrode of the first NMOS tube N1；First NMOS tube
The grid of N1 and drain electrode connect and connect the grid of the grid of the second NMOS tube N2, the grid of third NMOS tube N3, the 4th NMOS tube N4
Pole and one end of first capacitor C1, source electrode connect the drain electrode of the second NMOS tube；The source electrode of second NMOS tube N2 connects third NMOS tube
The drain electrode of N3；The source electrode of third NMOS tube is grounded；The other end of first capacitor C1 is grounded；The source electrode of third PMOS tube P3 connects electricity
Source, grid meet input signal IN, and drain electrode connects drain electrode and the grid of the 5th NMOS tube N5 of the 4th NMOS tube N4；4th NMOS tube N4
Source electrode ground connection；The drain electrode of 5th NMOS tube connects power supply, and source electrode connects one end of the second capacitor C2 and as voltage output signal end
VOUT；The other end of second capacitor C2 is grounded.
2. a kind of start-up circuit applied to band-gap reference circuit according to claim 1, which is characterized in that the third
The breadth length ratio of PMOS transistor P3 uses down the form of breadth length ratio for L=20W.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811605162.2A CN109491447A (en) | 2018-12-26 | 2018-12-26 | A kind of start-up circuit applied to band-gap reference circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811605162.2A CN109491447A (en) | 2018-12-26 | 2018-12-26 | A kind of start-up circuit applied to band-gap reference circuit |
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| Publication Number | Publication Date |
|---|---|
| CN109491447A true CN109491447A (en) | 2019-03-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811605162.2A Pending CN109491447A (en) | 2018-12-26 | 2018-12-26 | A kind of start-up circuit applied to band-gap reference circuit |
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| CN (1) | CN109491447A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114326906A (en) * | 2022-01-10 | 2022-04-12 | 中国科学技术大学 | Band gap reference circuit |
| CN114661084A (en) * | 2022-05-24 | 2022-06-24 | 苏州锴威特半导体股份有限公司 | Extremely simple and high-reliability reference generation and internal power generation circuit |
| TWI804042B (en) * | 2021-11-08 | 2023-06-01 | 奇景光電股份有限公司 | Reference voltage generating system and start-up circuit thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102289243A (en) * | 2011-06-30 | 2011-12-21 | 西安电子科技大学 | Complementary metal oxide semiconductor (CMOS) band gap reference source |
| CN103926967A (en) * | 2014-04-17 | 2014-07-16 | 重庆西南集成电路设计有限责任公司 | Low-voltage and low-power-consumption reference voltage source and low reference voltage generating circuit |
| CN105511540A (en) * | 2016-01-04 | 2016-04-20 | 东南大学 | Band-gap reference starting circuit with super-low leakage current |
| EP3543819A1 (en) * | 2018-01-29 | 2019-09-25 | NXP USA, Inc. | Voltage reference and startup circuit having low operating current |
-
2018
- 2018-12-26 CN CN201811605162.2A patent/CN109491447A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102289243A (en) * | 2011-06-30 | 2011-12-21 | 西安电子科技大学 | Complementary metal oxide semiconductor (CMOS) band gap reference source |
| CN103926967A (en) * | 2014-04-17 | 2014-07-16 | 重庆西南集成电路设计有限责任公司 | Low-voltage and low-power-consumption reference voltage source and low reference voltage generating circuit |
| CN105511540A (en) * | 2016-01-04 | 2016-04-20 | 东南大学 | Band-gap reference starting circuit with super-low leakage current |
| EP3543819A1 (en) * | 2018-01-29 | 2019-09-25 | NXP USA, Inc. | Voltage reference and startup circuit having low operating current |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI804042B (en) * | 2021-11-08 | 2023-06-01 | 奇景光電股份有限公司 | Reference voltage generating system and start-up circuit thereof |
| CN114326906A (en) * | 2022-01-10 | 2022-04-12 | 中国科学技术大学 | Band gap reference circuit |
| CN114661084A (en) * | 2022-05-24 | 2022-06-24 | 苏州锴威特半导体股份有限公司 | Extremely simple and high-reliability reference generation and internal power generation circuit |
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