CN104093272B - A kind of conductor package substrate construction and preparation method thereof - Google Patents
A kind of conductor package substrate construction and preparation method thereof Download PDFInfo
- Publication number
- CN104093272B CN104093272B CN201410361659.XA CN201410361659A CN104093272B CN 104093272 B CN104093272 B CN 104093272B CN 201410361659 A CN201410361659 A CN 201410361659A CN 104093272 B CN104093272 B CN 104093272B
- Authority
- CN
- China
- Prior art keywords
- layer
- increasing layer
- increasing
- metal column
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention provides a kind of improved conductor package substrate construction, the reliability of substrate pads is ensure that while effectively reducing substrate pads spacing, it includes core plate, it is characterised in that：The core plate both sides are provided with increasing layer layer, connected between the increasing layer layer and core plate by blind hole, blind via bottom is connected with the pad of line face increasing layer layer, described in the core plate upper and lower surface on increasing layer layer or increasing layer layer is internally provided with conducting wire, via hole is provided with the core plate, connected between the conducting wire of the core plate upper and lower surface by the via hole, consent material is provided with the via hole, metal column is provided with increasing layer layer described above, the metal column is arranged in the increasing layer layer, the metal column is connected with inner-layer conducting layer, the metal column periphery is provided with increasing layer material protection, below pad is provided with the increasing layer layer, the pad exposes substrate surface, the pad periphery covers solder mask, present invention simultaneously provides a kind of preparation method of improved conductor package substrate construction.
Description
Technical field
The present invention relates to the technical field of microelectronic packaging process, and in particular to a kind of conductor package substrate construction and its
Preparation method.
Background technology
With the development of semiconductor technology, the edge of the close failure of Moore's Law.IC is designed in industrial chain, wafer manufactures,
The difficulty of packaging and testing links continues to increase.Chip bonding pad spacing constantly diminishes, due between package substrate back-off pad
Away from development can not keep up with chip bonding pad spacing change paces.How to reduce the pad spacing of package substrate turns into urgently to be resolved hurrily
The problem of.
Increasing layer (Build-up) technique is used in existing package substrate manufacturing process.Printed after having made outermost layer circuit
Solder mask (Solder Mask) forms pad by the technique such as expose, develop, the system of solder mask technique in common process
Make, due to solder mask materials optical resolution ratio is low and physical and chemical performance difference caused by substrate pads spacing is big and poor reliability
The problems such as.
The content of the invention
In view of the above-mentioned problems, the invention provides a kind of improved conductor package substrate construction, substrate is effectively reduced
The reliability of substrate pads is ensure that while pad spacing, present invention simultaneously provides a kind of improved conductor package substrate knot
Structure
Its technical scheme is as follows：
A kind of conductor package substrate construction, it includes core plate, and core plate both sides are provided with increasing layer layer, the increasing layer layer and core
Connected between plate by blind hole, blind via bottom is connected with the pad of line face increasing layer layer, increasing layer layer described in the core plate upper and lower surface
Upper or increasing layer layer is internally provided with conducting wire, is provided with via hole on the core plate, the core plate upper and lower surface it is described
Connected between conducting wire by the via hole, consent material is provided with the via hole, is set in increasing layer layer described above
There is metal column, the metal column is arranged in the increasing layer layer, and the metal column is connected with inner-layer conducting layer, the metal column
Periphery is provided with increasing layer protection materials, below be provided with pad in the increasing layer layer, the pad exposes substrate surface, the weldering
Disk periphery covers solder mask.
It is further characterized by：The upper and lower increasing layer layer includes multilayer increasing layer layer, by blind between the increasing layer layer
Hole connects, and is respectively arranged with conducting wire in the increasing layer layer, above be provided with metal column in increasing layer layer described in outermost layer, below
Pad is provided with increasing layer layer described in outermost layer, the pad exposes substrate surface, and the pad periphery covers solder mask.
A kind of preparation method of improved conductor package substrate construction, it comprises the following steps：
(1), the making of core plate, double face copper form via hole, make via hole using the process deposits of via metal
Connect the metal of copper-clad plate upper and lower surface, the filler plug Porous materials inside via hole, by circuit formation process, in copper-clad plate just
Anti- two sides forms conducting wire；
(2), increasing layer layer makes, and it includes：(a), in the positive back side fitting increasing layer material of core plate, formed on increasing layer material blind
Hole, blind via bottom exposed pad；(b), in increasing layer deposited on materials conductive layer, conducting wire is formed, on the electrically conductive coating sense
Photopolymer resin；(c) photosensitive resin and unnecessary conductive layer, are removed, increasing layer layer is completed and makes；
(3) first window, is formed, photosensitive resin is coated with the positive back side of increasing layer layer, just by way of exposure imaging
Form first window above the photosensitive resin in face, first window exposes the conducting wire and pad required for front；
(4) metal column, is formed, electroplating of conductive material forms metal column, metal in the window using electroplating technique first
The height of post is not higher than the height of photosensitive resin, removes photosensitive resin and Seed Layer；
(5), metal column is covered in increasing layer layer front fitting increasing layer material, backside coating solder mask, increasing layer material；
(6) the second window, is formed on the solder mask of the package substrate back side, the second pad is formed, the pad exposed is entered
The processing of row surface anticorrosion, package substrate front are thinned, remove surface portion increasing layer material, expose copper post.
It is further characterized by, the technique of repeat step (2) and step (3), formation multilayer increasing layer layer, between increasing layer layer
Connected by blind hole, connected between increasing layer layer by blind hole, conducting wire is respectively arranged with increasing layer layer.
In step (1), double face copper forms via hole, via metal chemical industry skill bag by machine drilling or laser drill
Including sputtering black holes, electroless copper plating, shadow, electro-coppering or printing conducting medium technique, consent material includes resin or conducting medium,
Circuit formation process includes coating photosensitive resin, exposure, development, etching, laser scribing groove formation conducting wire technique；
In step (2), laminating type includes hot pressing, rolling, vacuum pressing-combining, quick pressing, printing, spin coating, spraying coating process,
Increasing layer material include prepreg, ink, polyimides, pure glue, gum copper foil, ABF materials or other can be used for printing electricity
The dielectric material of road plate, blind hole is formed on increasing layer material using machine drilling or laser drill mode；
Conducting wire is formed using half additive process；
In step (3), after removing photosensitive resin in the flow of the additive process of outermost layer half, retain conductive layer, pass through exposure
The mode of photodevelopment forms window on positive photosensitive resin；
In step (4), using electroplating technique, electroplating of conductive material forms metal column in the window, and copper post section can be
It is circular, can also be square, pentagon, hexagon, octagon and the figure that can be arbitrarily formed by litho developing process, lead
Electric material includes Cu, Ag, Au, Sn, Al material or alloy material.
In step (5), the processing mode of increasing layer material and solder mask 114 includes hot pressing, rolling, vacuum pressing-combining, quick
Pressing, printing, spin coating, spraying coating process, two kinds of materials can simultaneously be bonded to separate and be bonded, and increasing layer material includes semi-solid preparation
Piece, ink, polyimides, pure glue, gum copper foil, ABF materials (Ajinomoto Build-up Film) or other can be used for
The dielectric material of printed circuit board (PCB), increasing layer layer top are no more than 10 microns to the distance at the top of metal column；
In step (6), the second window is formed on the solder mask of the package substrate back side by way of exposure imaging, is used
Polish-brush, grinding, mechanical polishing, sandblasting, CMP expose metal column in increasing layer material surface.
Using the present invention be it is above-mentionedStructureIn, because core plate both sides are provided with increasing layer layer, lead between increasing layer layer and core plate
Blind hole connection is crossed, is provided with conducting wire on core plate upper and lower surface increasing layer layer, is provided with via hole on the core plate, above and below core plate
Connected between the conducting wire on two sides by via hole, upper and lower increasing layer layer surface is provided with pad, and pad exposes substrate surface, weldering
Disk is arranged in the increasing layer layer, and pad peripheral is provided with increasing layer material protection, is effectively reducing the same of substrate pads spacing
When ensure that the reliabilities of substrate pads.
Brief description of the drawings
Fig. 1 is the improved conductor package substrate construction schematic diagram of the present invention；
Fig. 2 is the making schematic diagram of core plate；
Fig. 3 is that increasing layer layer makes schematic diagram；
Fig. 4 is that increasing layer layer makes schematic diagram；
Fig. 5 is to form first window schematic diagram；
Fig. 6 is to form metal column schematic diagram；
Fig. 7 is that increasing layer layer front is bonded increasing layer material, backside coating solder mask schematic diagram；
Fig. 8 removes part increasing layer material surface and exposes copper post schematic diagram to form the second window；
Fig. 9 is that multilayer increasing layer layer makes schematic diagram；
Figure 10 is the improved conductor package substrate construction sandwich construction schematic diagram of the present invention.
Embodiment
Invention is described in detail below in conjunction with accompanying drawing, but present embodiment is not limited to the present invention, this area
Those of ordinary skill structure, method or the conversion functionally made according to present embodiment, be all contained in the present invention
Protection domain in.
See Fig. 1, a kind of improved conductor package substrate construction, it includes core plate (Core Layer) 101, core plate 101
Both sides are provided with increasing layer layer (Build-up Layer) 102, and increasing layer layer (Build-up Layer) leads between 102 and core plate 101
The connection of blind hole (Blind Via) 105 is crossed, the bottom of blind hole 105 is connected with the pad 109 of line face increasing layer layer, is provided with blind hole 105
Consent material, conducting wire 103, conducting wire are provided with the upper and lower surface increasing layer layer (Build-up Layer) 102 of core plate 101
Increasing layer layer surface, which can be arranged in, can also be embedded into inside increasing layer layer, and via hole (Through is provided with core plate 101
Hole) 104, pass through via hole (Through Hole) 104 between the conducting wire 103 of the upper and lower surface of core plate 101 and connect, via hole
Consent material is provided with 104, upper and lower increasing layer layer (Build-up Layer) 102 surfaces are provided with pad 109, pad 109
Expose substrate surface, pad 109 is arranged in increasing layer layer (Build-up Layer) 102, and pad peripheral is provided with increasing layer protection
Material.Metal column 113 is provided with increasing layer layer 102 above, metal column, metal column 113 are provided with top and bottom increasing layer layer 102
Conductive layer 110 or pad 109 are connected, the periphery of metal column 113 is provided with increasing layer protection materials, forms outer layer increasing layer layer 102a,
Pad 109 is provided with increasing layer layer (Build-up Layer) 102 below, pad dew 109 goes out substrate surface, the periphery of pad 109
Cover solder mask 114.
Upper and lower increasing layer layer (Build-up Layer) 102 can include one layer, can also include multilayer increasing layer layer, increasing layer
Connected between layer by blind hole (Blind Via) 105, conductor wire is respectively arranged with increasing layer layer (Build-up Layer) 102
Road 103, metal column is provided with the outermost layer increasing layer layer of top and bottom, the consent material passed through in blind hole (Blind Via) 105 is realized
The connection of metal column 113 and core plate 101.
In the present embodiment, for convenience, metal column 113 is arranged above increasing layer layer (Build-up Layer) 102
On, pad 109 is disposed below on increasing layer layer (Build-up Layer), and certain pad 109 can also be arranged above increasing layer
On layer (Build-up Layer) 102, metal column 113 can also be disposed below on increasing layer layer (Build-up Layer), all
It is the protection domain of invention.
A kind of preparation method of improved conductor package substrate construction, it comprises the following steps：
See Fig. 2, the making of (1), core plate, double face copper forms via hole, makes using the process deposits of via metal
Via hole connects the metal of copper-clad plate upper and lower surface, the filler plug Porous materials inside via hole, by circuit formation process, is covering
Copper coin tow sides form conducting wire；The double face copper 106 of fixed dimension is formed by machine drilling or laser drill and led
Through hole 104.The process deposits of via metal allow via hole 104 to connect the metal of copper-clad plate upper and lower surface.Via metal
Chemical industry skill includes sputtering black holes (Black Hole), electroless copper plating, shadow (Black Shadow), electro-coppering or conductive Jie of printing
The techniques such as matter.The filler plug Porous materials 107 inside via hole, consent material include resin or conducting medium.Formed by circuit
Technique, conducting wire 103 is formed in copper-clad plate tow sides.Circuit formation process includes coating photosensitive resin (photosensitive resin bag
Include in conducting wire, be not drawn into figure), exposure, development, etching etc. technique.Core plate 101 can be two layers of wiring structure,
It can be Miltilayer wiring structure.
See Fig. 3, Fig. 4, (2), increasing layer layer make, and it includes：(a) increasing layer material, is bonded at the positive back side of core plate, in increasing layer material
Blind hole, blind via bottom exposed pad are formed on material；(b), in increasing layer deposited on materials conductive layer, conductor wire is formed on the electrically conductive
Road, conducting wire are included in conductive layer coating photosensitive resin technique (photosensitive resin is included in conducting wire, is not drawn into figure)；
(c) photosensitive resin and unnecessary conductive layer, are removed, increasing layer layer is completed and makes.
The fitting increasing layer material 108 at the 101 positive back side of core plate.Laminating type includes hot pressing, rolling, vacuum pressing-combining, fast ram compression
The techniques such as conjunction, printing, spin coating, spraying.Increasing layer material includes prepreg, ink, polyimides, pure glue, gum copper foil, ABF
Material (Ajinomoto Build-up Film) or other dielectric materials that can be used for printed circuit board (PCB).Use machine drilling
Or the mode such as laser drill forms blind hole 105, the bottom exposed pad 109 of blind hole 105 on increasing layer material 108.
Using half additive process (SAP, Semi-Additive Process), conducting wire is formed on increasing layer material 108
103, it so also form increasing layer layer 102.Half additive process deposits one layer of conductive layer 110 first on increasing layer material 108, is leading
In electric layer 110 coat photosensitive resin (photosensitive resin is included in conducting wire, is not drawn into figure), by using exposure, development,
The technique of electroplated metal layer forms conducting wire 103.Photosensitive resin 111 and unnecessary conductive layer 110 are removed, increasing layer layer 102 is just
Making finishes.
See Fig. 5, (3), form first window, in the positive back side re-coating photosensitive resin of increasing layer layer, pass through the side of exposure imaging
Formula forms first window on the photosensitive resin at the positive back side, and first window exposes the conducting wire and pad required for front.
After removing photosensitive resin in the flow of the additive process of outermost layer half, retain conductive layer 110, in increasing layer layer 102 just
The back side is coated with photosensitive resin 111, forms first window 112 on positive photosensitive resin by way of exposure imaging,
First window 112 exposes the conducting wire 103 and pad 109 required for front.
See Fig. 5, Fig. 6, (4), form metal column, electroplating of conductive material forms gold in the window using electroplating technique first
Belong to post, the height of metal column is not higher than the height of photosensitive resin, removes photosensitive resin and Seed Layer, Seed Layer are attached to increasing layer layer
On.
Using electroplating technique, electroplating of conductive material forms metal column 113 in window 112, and the height of metal column 113 is not
Higher than the height of photosensitive resin 111, copper post section can be circular, can also be square, pentagon, hexagon, octagon etc.
The figure that can be arbitrarily formed by litho developing process.Conductive material material or the alloy material such as including Cu, Ag, Au, Sn, Al
Material.Remove photosensitive resin and Seed Layer.
See Fig. 7, (5), in increasing layer layer front fitting increasing layer material, backside coating solder mask, increasing layer material is by metal column
Covering.
Fitting increasing layer material 108, backside coating solder mask 114 in the front of increasing layer layer 102.Increasing layer material and solder mask
114 processing mode includes the techniques such as hot pressing, rolling, vacuum pressing-combining, quick pressing, printing, spin coating, spraying, and two kinds of materials can
It is bonded with being bonded to separate simultaneously.Increasing layer material includes prepreg, ink, polyimides, pure glue, gum copper foil, ABF
Material (Ajinomoto Build-up Film) or other dielectric materials that can be used for printed circuit board (PCB).Increasing layer material 108 will
Copper post covers.It is no more than 10 microns to the distance at the top of copper post at the top of increasing layer layer.
See Fig. 8, (6), the second window is formed on the solder mask of the package substrate back side, the second pad is formed, to what is exposed
Pad carries out surface anticorrosion processing, removes part increasing layer material surface and exposes copper post.
By way of exposure imaging the second window is formed on package substrate back side solder mask 114.Using polish-brush, grind
The techniques such as mill, mechanical polishing, sandblasting, CMP expose copper post 113 on the surface of increasing layer material 108.To the carry out table of pad 109 exposed
Face preservative treatment.
See Fig. 9, multilayer increasing layer layer 102 can be formed, passed through between increasing layer layer with repeat step (2) and the technique of step (3)
Blind hole is connected, and conducting wire is respectively arranged with increasing layer layer.
In the preparation method for the above-mentioned improved conductor package substrate construction for being using the present invention, base is being effectively reduced
The reliability of substrate pads is ensure that while plate pad spacing.
Claims (8)
1. a kind of conductor package substrate construction, it includes core plate, it is characterised in that：The core plate both sides are provided with increasing layer layer,
Connected between the increasing layer layer and core plate by blind hole, blind via bottom is connected with the pad of increasing layer layer, the core plate upper and lower surface
On the increasing layer layer or increasing layer layer is internally provided with conducting wire, is provided with via hole on the core plate, on the increasing layer layer
Or connected between the conducting wire set inside increasing layer layer by the via hole, consent material is provided with the via hole,
Metal column is provided with increasing layer layer described above, the metal column is arranged in the increasing layer layer, and the metal column is led with internal layer
Electric layer is connected, and the metal column periphery is provided with increasing layer protection materials, below be provided with pad, the weldering in the increasing layer layer
Disk exposes substrate surface, and the pad periphery covers solder mask.
A kind of 2. conductor package substrate construction according to claim 1, it is characterised in that：The upper and lower increasing layer layer includes
There is multilayer increasing layer layer, connected between the increasing layer layer by blind hole, be respectively arranged with conducting wire in the increasing layer layer, above most
Be provided with metal column in increasing layer layer described in outer layer, below be provided with pad in increasing layer layer described in outermost layer, the pad exposes base
Plate surface, the pad periphery cover solder mask.
A kind of 3. preparation method of conductor package substrate construction, it is characterised in that：It comprises the following steps：
（1）, core plate making, double face copper formed via hole, connect via hole using the process deposits of via metal
The metal of copper-clad plate upper and lower surface, the filler plug Porous materials inside via hole, by circuit formation process, in copper-clad plate positive and negative two
Face forms conducting wire；
（2）, increasing layer layer make, it includes：（a）, in core plate positive back side fitting increasing layer material, form blind hole on increasing layer material,
Blind via bottom exposed pad；（b）, in increasing layer deposited on materials conductive layer, form conducting wire, coat photosensitive tree on the electrically conductive
Fat；（c）, remove photosensitive resin and unnecessary conductive layer, complete increasing layer layer and make；
（3）, form first window, in increasing layer layer positive back side re-coating photosensitive resin, positive by way of exposure imaging
Form first window above photosensitive resin, first window exposes the conducting wire and pad required for front；
（4）, formed metal column, using electroplating technique in first window electroplating of conductive material formed metal column, metal column
The height of photosensitive resin is highly not higher than, removes photosensitive resin and Seed Layer；
（5）, in increasing layer layer positive back side fitting increasing layer material, backside coating solder mask, increasing layer material metal column is covered；
（6）, form the second window on the solder mask of the package substrate back side, the second pad is formed, to the pad carry out table exposed
Face preservative treatment, package substrate front are thinned, remove surface portion increasing layer material, expose metal column；
Step（1）In, double face copper forms via hole by machine drilling or laser drill, and via metal chemical industry skill includes splashing
Penetrating black holes, electroless copper plating, shadow, electro-coppering or printing conducting medium technique, consent material includes resin or conducting medium, circuit
Formation process includes coating photosensitive resin, exposure, development, etching, laser scribing groove formation conducting wire technique；
Step（2）In, laminating type includes hot pressing, rolling, vacuum pressing-combining, quick pressing, printing, spin coating, spraying coating process, increasing layer
Material include prepreg, ink, polyimides, gum copper foil, ABF materials or other can be used for the medium of printed circuit board (PCB)
Material, blind hole is formed on increasing layer material using machine drilling or laser drill mode；Conductor wire is formed using half additive process
Road.
A kind of 4. preparation method of conductor package substrate construction according to claim 3, it is characterised in that：Repeat step
（2）And step（3）Technique, form multilayer increasing layer layer, connected by blind hole between increasing layer layer, be respectively arranged with and lead in increasing layer layer
Electric line.
A kind of 5. preparation method of conductor package substrate construction according to claim 3, it is characterised in that：Step（2）
In, after removing photosensitive resin in the flow of the additive process of outermost layer half, retain conductive layer, just by way of exposure imaging
Window is formed above the photosensitive resin in face.
A kind of 6. preparation method of conductor package substrate construction according to claim 3, it is characterised in that：Step（4）
In, using electroplating technique, electroplating of conductive material forms metal column in the window, and metal column section can be circular, can also be
Square, pentagon, hexagon, octagon and arbitrarily can by litho developing process formed figure, conductive material include Cu,
Ag, Au, Sn, Al material or alloy material.
A kind of 7. preparation method of conductor package substrate construction according to claim 3, it is characterised in that：Step（5）
In, the processing mode of increasing layer material includes hot pressing, rolling, vacuum pressing-combining, quick pressing, printing, spin coating, spraying coating process, increasing layer
Layer and two kinds of materials of core plate can simultaneously be bonded to separate and be bonded, and it is sub- that increasing layer material includes prepreg, ink, polyamides
Amine, gum copper foil, ABF materials（Ajinomoto Build-up Film）Or other can be used for the medium material of printed circuit board (PCB)
Material, increasing layer layer top are no more than 10 microns to the distance at the top of metal column.
A kind of 8. preparation method of conductor package substrate construction according to claim 3, it is characterised in that：Step（6）
In, form the second window on the solder mask of the package substrate back side by way of exposure imaging, using polish-brush, mechanical polishing,
Sandblasting, CMP expose metal column in increasing layer material surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410361659.XA CN104093272B (en) | 2014-07-25 | 2014-07-25 | A kind of conductor package substrate construction and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410361659.XA CN104093272B (en) | 2014-07-25 | 2014-07-25 | A kind of conductor package substrate construction and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104093272A CN104093272A (en) | 2014-10-08 |
| CN104093272B true CN104093272B (en) | 2018-01-16 |
Family
ID=51640933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410361659.XA Active CN104093272B (en) | 2014-07-25 | 2014-07-25 | A kind of conductor package substrate construction and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104093272B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105517374B (en) * | 2015-12-17 | 2019-02-05 | 深圳崇达多层线路板有限公司 | A kind of production method of thin core plate HDI plate |
| CN107624002B (en) * | 2017-10-12 | 2019-12-27 | 安捷利（番禺）电子实业有限公司 | Circuit embedded flexible circuit board and film pasting preparation process thereof |
| CN114900962A (en) * | 2022-04-18 | 2022-08-12 | 广州广芯封装基板有限公司 | Printed circuit board and layer adding method thereof |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1957649A (en) * | 2004-05-27 | 2007-05-02 | 揖斐电株式会社 | Multilayer printed wiring board |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6841862B2 (en) * | 2000-06-30 | 2005-01-11 | Nec Corporation | Semiconductor package board using a metal base |
| EP1915040A3 (en) * | 2001-09-28 | 2008-04-30 | Ibiden Co., Ltd. | Printed wiring board and printed wiring board manufacturing method |
| TWI315658B (en) * | 2007-03-02 | 2009-10-01 | Phoenix Prec Technology Corp | Warp-proof circuit board structure |
-
2014
- 2014-07-25 CN CN201410361659.XA patent/CN104093272B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1957649A (en) * | 2004-05-27 | 2007-05-02 | 揖斐电株式会社 | Multilayer printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104093272A (en) | 2014-10-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4171499B2 (en) | Electronic device substrate and manufacturing method thereof, and electronic device and manufacturing method thereof | |
| KR101867893B1 (en) | Wiring substrate and method of manufacturing the same | |
| JP5680401B2 (en) | Wiring board and semiconductor package | |
| US20160293537A1 (en) | Embedded component substrate and semiconductor module | |
| KR20080088403A (en) | Method of manufacturing wiring board, method of manufacturing semiconductor device and wiring board | |
| US20140301058A1 (en) | Wiring substrate and semiconductor device | |
| TW201503771A (en) | Wiring board | |
| JP5442236B2 (en) | Manufacturing method of wiring board with built-in electronic component, wiring board with built-in electronic component, and semiconductor device | |
| CN104093272B (en) | A kind of conductor package substrate construction and preparation method thereof | |
| CN104091790B (en) | A kind of conductor package substrate construction and preparation method thereof | |
| TWI533424B (en) | Package carrier | |
| TWI700970B (en) | Electronic packages with pre-defined via patterns and methods of making and using the same | |
| US9661750B2 (en) | Printed circuit board and method of manufacturing the same | |
| JP5069449B2 (en) | Wiring board and manufacturing method thereof | |
| TWI553787B (en) | Ic substrate,semiconductor device with ic substrate and manufucturing method thereof | |
| KR101100034B1 (en) | Method for fabricating integral interposer pcb and pcb thereby | |
| JP2005353837A (en) | Semiconductor device and its manufacturing method | |
| KR101061792B1 (en) | Chip embedded printed circuit board and manufacturing method | |
| JP7007882B2 (en) | Wiring board and its manufacturing method | |
| US20160225706A1 (en) | Printed circuit board, semiconductor package and method of manufacturing the same | |
| KR20090130475A (en) | Manufacturing method for flip-chip printed circuit board | |
| KR101044154B1 (en) | A printed circuit board comprising a outer circuit layer burried under a insulating layer and a method of manufacturing the same | |
| TWI752202B (en) | Support attached printed circuit board and manufacturing method therof | |
| JP5438606B2 (en) | Wiring board and manufacturing method thereof | |
| JP7404665B2 (en) | Flip chip package, flip chip package substrate and flip chip package manufacturing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |