CN104065397B - Real-time synchronization catches method and the device of pseudo-code - Google Patents

Real-time synchronization catches method and the device of pseudo-code Download PDF

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CN104065397B
CN104065397B CN201410304732.XA CN201410304732A CN104065397B CN 104065397 B CN104065397 B CN 104065397B CN 201410304732 A CN201410304732 A CN 201410304732A CN 104065397 B CN104065397 B CN 104065397B
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code
pseudo
sequence
correlation values
memory ram
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CN104065397A (en
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孙永军
周茹
贾翠园
何家杰
刘晓轩
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Xidian University
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Xidian University
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Abstract

The invention discloses method and device that a kind of real-time synchronization catches pseudo-code, mainly solve prior art long period pseudo-code and catch difficult problem in real time.Implementation step is: 1. adopt the first pseudo-code and the second pseudo-code to carry out spread spectrum to synchronous head successively and generate synchronizing sequence and send; 2. receiving terminal carries out despreading to received signal and obtains segmentation correlation and store; 3. order is extracted segmentation correlation and is multiplied with the second pseudo-code, obtains partial correlation values sequence; 4. pair this sequence carries out modulo operation after doing FFT computing again, selects the maximum of modulus value to adjudicate with setting thresholding, if maximum is more than or equal to thresholding, and the second acquiring pseudo code success, on the contrary return step 2 until its synchronization acquistion; 5. the first half superposition value of partial correlation values sequence and latter half superposition value are made comparisons, if both approximately equals, synchronization acquistion success, otherwise synchronization acquistion failure.The present invention has the advantage that long period pseudo-code is caught in real time, can be used for burst communication real-time synchronization and catches.

Description

Real-time synchronization catches method and the device of pseudo-code
Technical field:
The invention belongs to communication technical field, in particular to a kind of catching method of pseudo-code, can be used for receiving terminal real-time synchronization to received signal in spread spectrum communication system to catch, to improve the success rate of system synchronization acquistion under low signal-to-noise ratio, reduce leakage and obtain the probability obtained with erroneous arrest.
Background technology:
So-called synchronization acquistion, refers to the initial synchronization of receiving system signal.For directly-enlarging system, initial synchronization comprises PN synchronization and carrier synchronization two parts.Receiver, only after correctly capturing synchronizing sequence, just can guarantee the correct reception of data.
Burst communication belongs to the one of covert communications.For burst communication, it is vital for catching in real time, and leakage obtains or erroneous arrest obtains and all will cause the loss of reception information.
Direct Sequence Spread Spectrum Communication is strong with its antijamming capability, intercept probability is low, the advantage of disguised and good confidentiality, is used widely in military communication and commercial communication.For Resistant DS Spread Spectrum System, its anti-interference, disguise, low intercepting and capturing all have direct relation with the processing gain of system, and processing gain is relevant with spreading code code length.Spreading code code length is longer, and corresponding processing gain is larger, and the correlated performance of system is better.
Originally, serial search technique is the synchronous capture technology commonly used the most, obtains very systematic research.For the situation that PN-code capture is shorter, adopt the mode of serial search, simply effectively.But when PN-code capture is long, according to the mode of serial, the time of catching can become very long, and this can not meet the demand of communication system fast Acquisition.A lot of scholar to some fast catching method create keen interest.R.B.Ward first describes estimation of the order fast Acquisition algorithm.But estimation of the order fast Acquisition algorithm cannot realize catching in real time of long period pseudo-code.
Along with the development of Digital Signal Processing, Fourier transform fft algorithm is also introduced in acquiring pseudo code system, especially in global location gps system, obtains considerable research and development.At present, more a kind of synchronization acquistion algorithm is used to be based on the region filtering method of partial matched filter in conjunction with fast Fourier transform PMF-FFT, the method just can obtain frequency offseting value while searching code phase place, thus the two-dimensional search of phase place, frequency is become linear search, greatly reduce capture time.But under current technical conditions, the single pseudo-code longer according to the cycle carries out spread spectrum, and receiving terminal is difficult to realization and catches in real time.
Summary of the invention:
The object of the invention is to the deficiency improving above-mentioned technology, a kind of method providing real-time synchronization to catch pseudo-code and device, to improve synchronization acquistion probability, realize the burst communication of long period Pseudo Code Spread Spectrum.
For achieving the above object, real-time synchronization of the present invention catches the method for pseudo-code, comprises the steps:
(1) transmitting terminal adopts the first pseudo-code P 1a spread spectrum is carried out to synchronous head information, adopts the second pseudo-code P 2carry out secondary spread spectrum to synchronous head information, generate transmitting terminal synchronizing sequence and send, receiving terminal is identical with transmitting terminal pseudo-code used, is the first pseudo-code P respectively 1with the second pseudo-code P 2;
(2) receiving terminal Received signal strength adopt the second pseudo-code P 2carry out a despreading:
Signal sampling point input register 2a) will received, and this signal sampling point is labeled as S, by the Parallel Sequence reg of register output and receiving terminal second pseudo-code P 2make related operation, obtain a segmentation correlation value;
2b) segmentation correlation value is write first memory RAM 1preserve, if first memory RAM 1write full, write second memory RAM 2, recursion successively, if kth memory RAM kwrite full, then from first memory RAM 1restart to have write, k is by the first pseudo-code P 1length determine;
(3) each memory RAM is extracted by the sequencing of write memory i, in 1≤i≤k, the segmentation correlation value of same position, obtains segmentation sequence of correlation values d_corr;
(4) by segmentation sequence of correlation values d_corr and receiving terminal first pseudo-code P 1be multiplied, obtaining portion divides sequence of correlation values p_corr;
(5) do Fourier transform FFT concurrent operation to after partial correlation values sequence p_corr zero padding, obtain amplitude sequence A, carry out modulo operation to amplitude sequence A, the maximum selecting modulo operation to export, is designated as peak;
(6) according to transmitting terminal synchronizing sequence setting thresholding gate, compared with thresholding gate by maximum peak, if peak>=gate, threshold judgement device exports " 1 " and manipulative indexing value S, represents the second pseudo-code P 2acquisition success; Otherwise threshold judgement device exports " 0 ", represents the second pseudo-code P 2catch unsuccessfully, signal sampling point slides backward one, repeats step (2) ~ (6), until the second pseudo-code P 2till synchronization acquistion;
(7) Δ r is relevant with the length of receiving end signal power and the second pseudo-code.Second pseudo-code P 2after synchronization acquistion, before partial correlation values sequence p_corr the superposition value r that individual part is worth mutually 1with rear the superposition value r of individual partial correlation values 2compare, if r 1=r 2+ Δ r, then synchronizing sequence synchronization acquistion success, otherwise synchronizing sequence synchronization acquistion failure.
For achieving the above object, real-time synchronization of the present invention catches the device of pseudo-code, comprises controller, it is characterized in that, the input of controller is connected with the second pseudo-code P 2trapping module, the output of controller is connected with the first pseudo-code P 1trapping module; Second pseudo-code P 2trapping module to the received signal sampling point carries out the second pseudo-code P 2real-time synchronization is caught, and by the second pseudo-code P 2catch result and be input to controller; Controller is according to the second pseudo-code P 2catch output control first pseudo-code P 1the startup of trapping module; First pseudo-code P 1the real-time synchronization that trapping module carries out synchronizing sequence is caught.
The present invention compared with prior art tool has the following advantages:
1) the present invention preserves segmentation correlation value owing to adopting multiple memory RAM, and does Fourier transform FFT concurrent operation to partial correlation values p_corr, at acquisition second pseudo-code P 2while capturing information, solve the first pseudo-code P 1the problem that sync bit is fuzzy, is captured as power and improves, and erroneous arrest obtains and leaks acquisition probability and reduces.
2) the present invention is owing to adopting the first pseudo-code P 1with the second pseudo-code P 2carry out a spread spectrum and secondary spread spectrum to synchronous head information respectively, the real-time synchronization making receiving terminal achieve long period pseudo-code is caught.
Accompanying drawing explanation
Fig. 1 is that real-time synchronization of the present invention catches pseudo-coded method flow chart;
Fig. 2 is that real-time synchronization of the present invention catches pseudo-code device block diagram.
Embodiment
Below in conjunction with accompanying drawing, embodiments of the present invention are described in further details.
With reference to Fig. 1, to synchronization acquistion pseudo-coded method of the present invention, carry out as follows:
Step 1, transmitting terminal generates synchronizing sequence and sends
Transmitting terminal adopts the cycle to be N 1the first pseudo-code P 1carry out a spread spectrum to synchronous head information, the employing cycle is N 2the second pseudo-code P 2carry out secondary spread spectrum to synchronous head information, generation length is N 1* N 2transmitting terminal synchronizing sequence and send, receiving terminal is identical with transmitting terminal pseudo-code used, is the first pseudo-code P respectively 1with the second pseudo-code P 2.
Step 2, receiving terminal Received signal strength is also with the second pseudo-code P 2carry out a despreading:
2.1) receive signal sampling point is input to length by receiving terminal is N 2register, and this signal sampling point is labeled as S, seal in this signal sampling point and go out process, output length is N 2parallel Sequence reg and the second pseudo-code P of receiving terminal 2make related operation, obtain a segmentation correlation value;
2.2) be N by length 2memory RAM i, 1≤i≤N 1preserve segmentation correlation value, namely first segmentation correlation value is write first memory RAM 1preserve, if first memory RAM 1write full, write second memory RAM 2, recursion successively, if N 1memory write full, then from first memory RAM 1restart to have write.
Step 3, order extracts segmentation correlation.
Each memory RAM is extracted by the sequencing of write memory i, 1≤i≤N 1the segmentation correlation value of middle same position, obtaining length is N 1segmentation sequence of correlation values d_corr.
Step 4, fetching portion sequence of correlation values p_corr.
By segmentation sequence of correlation values d_corr and receiving terminal first pseudo-code P 1be multiplied, obtaining length is N 1partial correlation values sequence p_corr.
Step 5, does Fourier transform FFT concurrent operation to partial correlation values sequence p_corr.
Count P, the P of the accuracy selection Fourier parallel transformation required for frequency deviation>=N is entangled in conjunction with fast Fourier transform PMF-FFT according to partial matched filter 1;
P point Fourier transform FFT concurrent operation is done to partial correlation values sequence p_corr, obtains the amplitude sequence A that length is P, modulo operation is carried out to amplitude sequence A, and the maximum selecting modulo operation to export, be designated as peak.
Step 6, carries out threshold judgement to maximum peak.
According to transmitting terminal synchronizing sequence setting thresholding gate, compared by maximum peak and thresholding gate, if peak>=gate, then threshold judgement device exports " 1 " and manipulative indexing value S, represents the second pseudo-code P 2acquisition success; Otherwise threshold judgement device exports " 0 ", represents the second pseudo-code P 2catch unsuccessfully, signal sampling point slides backward one, repeats step 2 ~ 6, until the second pseudo-code P 2till synchronization acquistion.
Step 7, to the first pseudo-code P 1carry out real-time synchronization to catch.
Δ r is relevant with the length of receiving end signal power and the second pseudo-code, Δ r≤α * N 2, α is the constant relevant with receiving end signal power, N 2the second pseudo-code P 2length.
Second pseudo-code P 2after synchronization acquistion, before partial correlation values sequence p_corr individual partial correlation values summation, obtains the first superposition value r 1, after partial correlation values sequence p_corr individual partial correlation values summation, obtains the second superposition value r 2, by r 1with r 2compare, if r 1=r 2+ Δ r, then synchronizing sequence synchronization acquistion success, otherwise synchronizing sequence synchronization acquistion failure.
With reference to Fig. 2, real-time synchronization of the present invention is caught pseudo-code device and is comprised: the second pseudo-code P 2trapping module, controller and the first pseudo-code P 1trapping module.Wherein:
The second described pseudo-code P 2trapping module comprises: register, correlator, memory RAM i, sequence selector C 1, multiplier, Fourier FFT converter, peak signal selector C 2with threshold judgement device;
The signal sampling point received preserved by this register, and seals in this signal sampling point and go out process, and output length is N 2parallel Sequence reg to correlator, correlator is by this Parallel Sequence reg and the second pseudo-code P 2make related operation, export segmentation correlation value and be kept at memory RAM iin, during preservation, first segmentation correlation value is write first memory RAM 1if, first memory RAM 1write full, write second memory RAM 2, recursion successively, if N 1memory write full, then from first memory RAM 1restart to have write;
This sequence selector C 1, extract each memory RAM by the sequencing of write memory ithe segmentation correlation value of middle same position, obtains segmentation sequence of correlation values d_corr and exports to multiplier; Multiplier is by this segmentation sequence of correlation values d_corr and the first pseudo-code P 1do multiplying, obtaining length is N 1partial correlation values sequence p_corr and export to Fourier FFT converter; Fourier FFT converter does Fourier transform FFT concurrent operation to after this partial correlation values sequence p_corr zero padding, obtains amplitude sequence A and exports to peak signal selector C 2.
This peak signal selector C 2, modulo operation is carried out to amplitude sequence A, selects the maximum peak in modulo operation result to export to threshold judgement device; This maximum peak and thresholding gate is compared judgement by threshold judgement device, if peak>=gate, and the second pseudo-code P 2synchronization acquistion success, otherwise, the second pseudo-code P 2synchronization acquistion failure; Thresholding gate sets according to transmitting terminal synchronizing sequence.
The first described pseudo-code P 1trapping module comprises: first adder add 1, second adder add 2and comparator;
This first adder add 1, before calculating section sequence of correlation values p_corr individual partial correlation values and, obtain the first superposition value r 1and export to comparator;
This second adder add 2, after calculating section sequence of correlation values p_corr individual partial correlation values and, obtain the second superposition value r 2and export to comparator;
Described comparator, by first adder add 1the the first superposition value r exported 1with second adder add 2the the second superposition value r exported 2compare, work as r 1=r 2during+Δ r, synchronizing sequence synchronization acquistion success, on the contrary synchronizing sequence synchronization acquistion failure, Δ r is relevant with the length of receiving end signal power and the second pseudo-code, Δ r≤α * N 2, α is the constant relevant with receiving end signal power, N 2the second pseudo-code P 2length.
The input of controller connects the second pseudo-code P 2trapping module, the output of controller connects the first pseudo-code P 1trapping module; Second pseudo-code P 2trapping module to the received signal sampling point carries out the second pseudo-code P 2real-time synchronization is caught, and by the second pseudo-code P 2catch result and be input to controller; Controller is according to the second pseudo-code P 2catch output control first pseudo-code P 1the startup of trapping module; First pseudo-code P 1the real-time synchronization that trapping module carries out synchronizing sequence is caught.
More than describing is only example of the present invention, does not form any limitation of the invention.Obviously for those skilled in the art; after having understood content of the present invention and principle; all may when not deviating from the principle of the invention, structure; carry out the various correction in form and details and change, but these corrections based on inventive concept and change are still within claims of the present invention.

Claims (2)

1. real-time synchronization catches a method for pseudo-code, comprises the steps:
(1) transmitting terminal adopts the first pseudo-code P 1a spread spectrum is carried out to synchronous head information, adopts the second pseudo-code P 2carry out secondary spread spectrum to synchronous head information, generate transmitting terminal synchronizing sequence and send, receiving terminal is identical with transmitting terminal pseudo-code used, is the first pseudo-code P respectively 1with the second pseudo-code P 2;
(2) receiving terminal Received signal strength adopt the second pseudo-code P 2carry out a despreading:
Signal sampling point input register 2a) will received, and this signal sampling point is labeled as S, by the Parallel Sequence reg of register output and receiving terminal second pseudo-code P 2make related operation, obtain a segmentation correlation value;
2b) segmentation correlation value is write first memory RAM 1preserve, if first memory RAM 1write full, write second memory RAM 2, recursion successively, if kth memory RAM kwrite full, then from first memory RAM 1restart to have write, k is by the first pseudo-code P 1length determine;
(3) each memory RAM is extracted by the sequencing of write memory i, in 1≤i≤k, the segmentation correlation value of same position, obtains segmentation sequence of correlation values d_corr;
(4) by segmentation sequence of correlation values d_corr and receiving terminal first pseudo-code P 1be multiplied, obtaining portion divides sequence of correlation values p_corr;
(5) do Fourier transform FFT concurrent operation to after partial correlation values sequence p_corr zero padding, obtain amplitude sequence A, carry out modulo operation to amplitude sequence A, the maximum selecting modulo operation to export, is designated as peak;
(6) according to transmitting terminal synchronizing sequence setting thresholding gate, compared with thresholding gate by maximum peak, if peak>=gate, threshold judgement device exports " 1 " and manipulative indexing value S, represents the second pseudo-code P 2acquisition success; Otherwise threshold judgement device exports " 0 ", represents the second pseudo-code P 2catch unsuccessfully, signal sampling point slides backward one, repeats step (2) ~ (6), until the second pseudo-code P 2till synchronization acquistion;
(7) Δ r is relevant with the length of receiving end signal power and the second pseudo-code, the second pseudo-code P 2after synchronization acquistion, before partial correlation values sequence p_corr the superposition value r that individual part is worth mutually 1with rear the superposition value r of individual partial correlation values 2compare, if r 1=r 2+ Δ r, then synchronizing sequence synchronization acquistion success, otherwise synchronizing sequence synchronization acquistion failure.
2. real-time synchronization catches a pseudo-code device, comprises controller, it is characterized in that, the input of controller is connected with the second pseudo-code P 2trapping module, the output of controller is connected with the first pseudo-code P 1trapping module; Second pseudo-code P 2trapping module to the received signal sampling point carries out the second pseudo-code P 2real-time synchronization is caught, and by the second pseudo-code P 2catch result and be input to controller; Controller is according to the second pseudo-code P 2catch output control first pseudo-code P 1the startup of trapping module; First pseudo-code P 1the real-time synchronization that trapping module carries out synchronizing sequence is caught;
This second pseudo-code P 2trapping module comprises: register, correlator, memory RAM i, sequence selector C 1, multiplier, Fourier FFT converter, peak signal selector C 2with threshold judgement device;
Described register, preserves the signal sampling point received, and seals in this signal sampling point and go out process, exports Parallel Sequence reg by correlator and the second pseudo-code P 2make related operation, export segmentation correlation value and be kept at RAM iin, namely first segmentation correlation value is write first memory RAM 1preserve, if first memory RAM 1write full, write second memory RAM 2, recursion successively, if kth memory RAM kwrite full, then from first memory RAM 1restart to have write;
Described sequence selector C 1, extract each memory RAM by the sequencing of write memory ithe segmentation correlation value of middle same position, obtains segmentation sequence of correlation values d_corr and exports to multiplier, and with the first pseudo-code P 1be multiplied, obtain partial correlation values sequence p_corr; Fourier FFT converter does Fourier transform FFT concurrent operation to after this partial correlation values sequence p_corr zero padding, obtains amplitude sequence A and exports to peak signal selector C 2;
Described peak signal selector C 2, carry out modulo operation to amplitude sequence A, the maximum peak selecting modulo operation to export also exports the second pseudo-code P by threshold judgement device 2synchronization acquistion result;
This first pseudo-code P 1trapping module comprises: first adder add 1, second adder add 2and comparator;
Described first adder add 1, before calculating section sequence of correlation values p_corr individual partial correlation values and, obtain the first superposition value r 1and export to comparator;
Described second adder add 2, after calculating section sequence of correlation values p_corr individual partial correlation values and, obtain the second superposition value r 2and export to comparator;
Described comparator, for comparing the first superposition value r 1with the second superposition value r 2, work as r 1=r 2during+Δ r, synchronizing sequence synchronization acquistion success, on the contrary synchronizing sequence synchronization acquistion failure, Δ r is relevant with the length of receiving end signal power and the second pseudo-code.
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