CN104064639A - Vertical type led structure and manufacturing method thereof - Google Patents
Vertical type led structure and manufacturing method thereof Download PDFInfo
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- CN104064639A CN104064639A CN201410317389.2A CN201410317389A CN104064639A CN 104064639 A CN104064639 A CN 104064639A CN 201410317389 A CN201410317389 A CN 201410317389A CN 104064639 A CN104064639 A CN 104064639A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 239000010410 layer Substances 0.000 claims description 58
- 238000000034 method Methods 0.000 claims description 32
- 239000002184 metal Substances 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000000463 material Substances 0.000 claims description 19
- 229910052737 gold Inorganic materials 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- 239000011241 protective layer Substances 0.000 claims description 6
- 238000007788 roughening Methods 0.000 claims description 4
- 229910000838 Al alloy Inorganic materials 0.000 claims description 3
- 229910001020 Au alloy Inorganic materials 0.000 claims description 3
- 229910015363 Au—Sn Inorganic materials 0.000 claims description 3
- 229910000599 Cr alloy Inorganic materials 0.000 claims description 3
- 229910015269 MoCu Inorganic materials 0.000 claims description 3
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 3
- 229910001260 Pt alloy Inorganic materials 0.000 claims description 3
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 238000002360 preparation method Methods 0.000 description 6
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000739 chaotic effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention provides a vertical type LED structure and a manufacturing method of the vertical type LED structure. After a growth substrate is stripped and removed by laser, the whole face of an undoped layer is not removed any more, only a groove is formed in the undoped layer, an N-GaN is exposed out, an N-type electrode is formed on the N-GaN inside the groove, and therefore the N-GaN is prevented from being damaged by a laser light spot border due to protection of the undoped layer, electric leakage of a chip is reduced, the photovoltaic conversion efficiency of the chip is improved, the luminous brightness is increased, and as the N-type electrode is limited in the groove, the firmness of the electrode can be improved.
Description
Technical field
The present invention relates to LED and make field, relate in particular to a kind of vertical-type LED structure and preparation method thereof.
Background technology
In recent years, for high-power lighting LED (Light-Emitting Diode, LED) research has become trend, yet there is the shortcomings such as current crowding, overtension and heat radiation difficulty with the LED chip of side structure in tradition, be difficult to meet powerful demand, and vertical LED chip not only can solve the crowding effect under large electric current injection effectively, can also alleviate large electric current and inject caused internal quantum efficiency reduction, improve the photoelectric properties of vertical LED chip.The LED of GaN based vertical structure has good heat dissipation, can bearing great current, and the advantage such as luminous intensity is high, and power consumption is little, the life-span is long is widely used in general illumination, Landscape Lighting, special lighting, automotive lighting.
The preparation technology of vertical LED chip is mainly at present, the growing GaN that (is generally sapphire material) on substrate is made contact layer and metal reflective mirror layer on this GaN base epitaxial loayer, then adopt the mode of plating or substrate bonding (Wafer bonding) to make the heat-conducting substrate that heat conductivility is good, simultaneously also as the new substrate of GaN base epitaxial loayer, method by laser lift-off makes Sapphire Substrate separated with GaN base epitaxial loayer again, epitaxial loayer is transferred on metal substrate, make like this heat dispersion of LED chip better, to form again afterwards N-type electrode and P type electrode.
Concrete, please refer to Fig. 1, Fig. 1 is the structural representation of vertical LED chip in prior art; Described structure comprises P type electrode 10, P type GaN layer 20, quantum well layer 30, N-type GaN layer 40 and the N-type electrode 50 connecting successively.
At present, make vertical structure LED and conventionally adopt laser lift-off (LLO) technology that original Sapphire Substrate is peeled off after Grown on Sapphire Substrates epitaxial loayer, epitaxial loayer is transferred on thermal conductivity and the better Si of conductivity or WCu substrate.Carrying out large size chip while peeling off, traditional vertical structure LED is all to adopt large area etching that UID-GaN (unadulterated GaN) is fallen whole quarter, on N-GaN surface, does electrode, forms ohmic contact.Due to the very difficult uniformity that guarantees energy of large laser facula combining out, the actual laser facula size of using is limited, causes having a lot of laser facula boundaries (overlap) on every chips crystal grain (Die) and damage when carrying out laser lift-off.When large-area etching UID-GaN, the overlap damage meeting producing during because of laser lift-off is deepened to produce micron-sized damage on N-type GaN and is formed leak channel, inevitably can cause the damage of N-GaN, affect electrical property and the luminosity of device, cause the problems such as the easy electric leakage of light emitting diode (LED) chip with vertical structure and light efficiency are low.
Summary of the invention
The object of the present invention is to provide a kind of vertical-type LED structure and preparation method thereof, can reduce the electric leakage that the damage of laser facula boundary causes, thereby guarantee higher photoelectric conversion efficiency, increase luminosity.
To achieve these goals, the present invention proposes a kind of vertical-type LED manufacture method, comprise step:
Growth substrates is provided, in described growth substrates, is formed with epitaxial loayer, described epitaxial loayer comprises undoped layer, N-GaN, quantum well and the P-GaN forming successively, and described undoped layer is formed in described growth substrates;
On described P-GaN surface, form metal electrode;
On described metal electrode, form bonded substrate;
Adopt laser lift-off to remove described growth substrates, expose described undoped layer;
Undoped layer described in etching, forms groove, and described groove exposes described N-GaN;
In described groove, form N-type electrode, described N-type electrode is connected with described N-GaN.
Further, in described vertical-type LED manufacture method, before described N-type electrode forms, described undoped layer is carried out to surface coarsening processing, described roughening treatment is wet etching, and the solution using is KOH or H
2sO
4.
Further, in described vertical-type LED manufacture method, after described N-type electrode forms, on described undoped layer surface, form protective layer, its material is SiO
2.
Further, in described vertical-type LED manufacture method, the openings of sizes scope of described groove is 70 μ m~120 μ m.
Further, in described vertical-type LED manufacture method, described undoped layer thickness is 2 μ m~4 μ m.
Further, in described vertical-type LED manufacture method, the degree of depth of described groove is 2 μ m~4 μ m.
Further, in described vertical-type LED manufacture method, described metal electrode comprises current extending, speculum and metal bonding layer successively, and described current extending is connected with described P-GaN, and described speculum is between described current extending and metal bonding layer.
Further, in described vertical-type LED manufacture method, the material of described current extending is ITO, ZnO or AZO.
Further, in described vertical-type LED manufacture method, the material of described speculum is Al or Ag.
Further, in described vertical-type LED manufacture method, the material of described metal bonding layer is Au-Au or Au-Sn.
Further, in described vertical-type LED manufacture method, the material of described bonded substrate is Si, WCu or MoCu.
Further, in described vertical-type LED manufacture method, the material of described N-type electrode is Ni, Au, Al, Ti, Pt, Cr, Ni/Au alloy, Al/Ti/Pt/Au or Cr/Pt/Au.
Further, the invention allows for a kind of vertical-type LED structure, adopt vertical-type LED manufacture method as described above to form, described structure comprises successively: bonded substrate, metal electrode, P-GaN, quantum well, N-GaN, undoped layer and N-type electrode, wherein, described undoped layer is provided with groove, and described N-type electrode is formed in described groove, and is connected with described N-GaN.
Compared with prior art; beneficial effect of the present invention is mainly reflected in: using laser lift-off to remove after growth substrates; remove undoped layer for no longer whole; only on undoped layer, form groove and expose N-GaN; then on the N-GaN in groove, form N-type electrode; thereby the protection by undoped layer; avoid laser facula to have a common boundary N-GaN is caused to damage; thereby reduce the electric leakage of chip; improve the photoelectric conversion efficiency of chip; increase luminosity, and by N-type electric limit in groove, can increase the fastness of electrode.
Accompanying drawing explanation
Fig. 1 is the structural representation of vertical LED chip in prior art;
Fig. 2 is the flow chart of vertical-type LED manufacture method in one embodiment of the invention;
Fig. 3 to Fig. 9 is the generalized section in vertical-type LED manufacturing process in one embodiment of the invention.
Embodiment
Below in conjunction with schematic diagram, vertical-type LED structure of the present invention and preparation method thereof is described in more detail, the preferred embodiments of the present invention have wherein been represented, should be appreciated that those skilled in the art can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
For clear, whole features of practical embodiments are not described.They in the following description, are not described in detail known function and structure, because can make the present invention chaotic due to unnecessary details.Will be understood that in the exploitation of any practical embodiments, must make a large amount of implementation details to realize developer's specific objective, for example, according to the restriction of relevant system or relevant business, by an embodiment, change into another embodiment.In addition, will be understood that this development may be complicated and time-consuming, but be only routine work to those skilled in the art.
In the following passage, with reference to accompanying drawing, with way of example, the present invention is more specifically described.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the object of the aid illustration embodiment of the present invention lucidly.
Please refer to Fig. 2, in the present embodiment, proposed a kind of vertical-type LED manufacture method, comprise step:
S100: growth substrates is provided, is formed with epitaxial loayer in described growth substrates, described epitaxial loayer comprises undoped layer, N-GaN, quantum well and the P-GaN forming successively, and described undoped layer is formed in described growth substrates;
S200: form metal electrode on described P-GaN surface;
S300: form bonded substrate on described metal electrode;
S400: adopt laser lift-off to remove described growth substrates, expose described undoped layer;
S500: undoped layer described in etching, form groove, described groove exposes described N-GaN;
S600: form N-type electrode in described groove, described N-type electrode is connected with described N-GaN.
Concrete, please refer to Fig. 3, in step S100, described growth substrates 100 is generally Sapphire Substrate, Si substrate, SiC substrate or patterned substrate, in described growth substrates 100, be formed with epitaxial loayer, wherein, described epitaxial loayer comprises undoped layer 200, N-GaN300, quantum well 400 and the P-GaN500 forming successively.
Please refer to Fig. 4, in step S200, on described P-GaN500, form metal electrode 600, described metal electrode 600 comprises current extending, speculum and metal bonding layer successively, described current extending is connected with described P-GaN500, described speculum is between described current extending and metal bonding layer, and described current extending is transparent conductive film, and its material is AZO, ITO or ZnO; The material of described speculum is Al or Ag, and the material of described metal bonding layer is Au-Au or Au-Sn, for follow-up bonding substrate bonding.
Please refer to Fig. 5, in step S300, on described metal electrode 600, form bonded substrate 700; The material of described bonded substrate 700 is Si, WCu or MoCu, between described metal bonding layer and bonded substrate 700, adopts high temperature bonding method to carry out bonding.
Please refer to Fig. 6; in step S400; adopt laser lift-off to remove described growth substrates 100; expose described undoped layer 200; in this step; retain undoped layer 200 can be when adopting laser lift-off to remove described growth substrates 100 well protection be positioned at the N-GaN300 below described undoped layer 200; also avoided damage photocopy laser facula boundary being brought whole etching removal undoped layer 200 etchings to N-GaN300 simultaneously; N-GaN300 is suffered a loss, thereby also just solved problems of the prior art.
Please refer to Fig. 7, in step S500, described in etching, undoped layer 200, form groove 210, described groove 210 can adopt ICP lithographic technique to form, described groove 210 exposes the N-GaN300 of described epitaxial loayer, the openings of sizes scope of described groove 210 is 70 μ m~120 μ m, described groove 210 can be various shape, in this no limit, in the present embodiment, described undoped layer 200 thickness are 2 μ m~4 μ m, for example 3 μ m, in order to expose described N-GaN300, therefore the degree of depth of groove 210 should be identical with described undoped layer 200 thickness, or be slightly larger than the thickness of undoped layer 200, therefore the depth bounds of described groove 210 is 2 μ m~4 μ m, for example 3 μ m.
Please refer to Fig. 8, before described N-type electrode forms,, before step S600, described undoped layer 200 is carried out to surface coarsening processing, form comparatively coarse matsurface 220, described roughening treatment is wet etching, and the solution of use is KOH or H
2sO
4, the matsurface 220 that roughening treatment forms can increase the surface area of undoped layer 200, increases the area of bright dipping, improves luminous efficiency.
Please refer to Fig. 9, in step S600, described N-type electrode 800 is connected with the N-GaN300 in described epitaxial loayer, and the material of described N-type electrode 800 is Ni, Au, Al, Ti, Pt, Cr, Ni/Au alloy, Al/Ti/Pt/Au or Cr/Pt/Au, and it can adopt evaporation mode to form.
Please continue to refer to Fig. 9, after described N-type electrode 800 forms, on the matsurface 220 of described undoped layer 200, form protective layer 900, the material of described protective layer 900 is SiO
2, on the one hand it can printing opacity, and it can protect whole device on the one hand in addition.
Other one side at the present embodiment; a kind of vertical-type LED structure has also been proposed; as shown in Figure 9; adopt vertical-type LED manufacture method as described above to form; described structure comprises successively: bonded substrate 700, metal electrode 600, P-GaN500, quantum well 400, N-GaN300, undoped layer 200, N-type electrode 800 and protective layer 900; wherein; described undoped layer 200 is provided with groove; described N-type electrode 800 is formed in described groove; and be connected with the N-GaN300 of described epitaxial loayer, described protective layer 900 is formed at the surface of described undoped layer 200.
To sum up; in vertical-type LED structure providing in the embodiment of the present invention and preparation method thereof; after using laser lift-off removal growth substrates; remove undoped layer for no longer whole; only on undoped layer, form groove and expose N-GaN; then on the N-GaN in groove, form N-type electrode; thereby the protection by undoped layer; avoid laser facula to have a common boundary N-GaN is caused to damage; thereby reduce the electric leakage of chip, improve the photoelectric conversion efficiency of chip, increase luminosity; and N-type electric limit, in groove, can be increased to the fastness of electrode.
Above are only the preferred embodiments of the present invention, the present invention is not played to any restriction.Any person of ordinary skill in the field; within not departing from the scope of technical scheme of the present invention; the technical scheme that the present invention is disclosed and technology contents are made any type of changes such as replacement or modification that are equal to; all belong to the content that does not depart from technical scheme of the present invention, within still belonging to protection scope of the present invention.
Claims (13)
1. a vertical-type LED manufacture method, comprises step:
Growth substrates is provided, in described growth substrates, is formed with epitaxial loayer, described epitaxial loayer comprises undoped layer, N-GaN, quantum well and the P-GaN forming successively, and described undoped layer is formed in described growth substrates;
On described P-GaN surface, form metal electrode;
On described metal electrode, form bonded substrate;
Adopt laser lift-off to remove described growth substrates, expose described undoped layer;
Undoped layer described in etching, forms groove, and described groove exposes described N-GaN;
In described groove, form N-type electrode, described N-type electrode is connected with described N-GaN.
2. vertical-type LED manufacture method as claimed in claim 1, is characterized in that, before described N-type electrode forms, described undoped layer is carried out to surface coarsening processing, and described roughening treatment is wet etching, and the solution using is KOH or H
2sO
4.
3. vertical-type LED manufacture method as claimed in claim 1, is characterized in that, after described N-type electrode forms, on described undoped layer surface, forms protective layer, and its material is SiO
2.
4. vertical-type LED manufacture method as claimed in claim 1, is characterized in that, the openings of sizes scope of described groove is 70 μ m~120 μ m.
5. vertical-type LED manufacture method as claimed in claim 4, is characterized in that, described undoped layer thickness is 2 μ m~4 μ m.
6. vertical-type LED manufacture method as claimed in claim 4, is characterized in that, the degree of depth of described groove is 2 μ m~4 μ m.
7. vertical-type LED manufacture method as claimed in claim 1, it is characterized in that, described metal electrode comprises current extending, speculum and metal bonding layer successively, and described current extending is connected with described P-GaN, and described speculum is between described current extending and metal bonding layer.
8. vertical-type LED manufacture method as claimed in claim 7, is characterized in that, the material of described current extending is ITO, ZnO or AZO.
9. vertical-type LED manufacture method as claimed in claim 7, is characterized in that, the material of described speculum is Al or Ag.
10. vertical-type LED manufacture method as claimed in claim 7, is characterized in that, the material of described metal bonding layer is Au-Au or Au-Sn.
11. vertical-type LED manufacture methods as claimed in claim 1, is characterized in that, the material of described bonded substrate is Si, WCu or MoCu.
12. vertical-type LED manufacture methods as claimed in claim 1, is characterized in that, the material of described N-type electrode is Ni, Au, Al, Ti, Pt, Cr, Ni/Au alloy, Al/Ti/Pt/Au or Cr/Pt/Au.
13. 1 kinds of vertical-type LED structures, employing forms as the vertical-type LED manufacture method as described in any one in claim 1 to 12, described structure comprises successively: bonded substrate, metal electrode, P-GaN, quantum well, N-GaN, undoped layer and N-type electrode, wherein, described undoped layer is provided with groove, described N-type electrode is formed in described groove, and is connected with described N-GaN.
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Cited By (4)
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---|---|---|---|---|
CN107482098A (en) * | 2017-09-20 | 2017-12-15 | 南昌大学 | A kind of film LED chip structure |
CN110718615A (en) * | 2019-04-04 | 2020-01-21 | 中山大学 | AlGaInP-based red LED with composite window layer structure |
CN113764550A (en) * | 2021-09-07 | 2021-12-07 | 东莞市中麒光电技术有限公司 | Transfer method for preventing LED chip from being damaged |
CN113764551A (en) * | 2021-09-07 | 2021-12-07 | 东莞市中麒光电技术有限公司 | LED chip transfer method |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN107482098A (en) * | 2017-09-20 | 2017-12-15 | 南昌大学 | A kind of film LED chip structure |
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CN110718615A (en) * | 2019-04-04 | 2020-01-21 | 中山大学 | AlGaInP-based red LED with composite window layer structure |
CN113764550A (en) * | 2021-09-07 | 2021-12-07 | 东莞市中麒光电技术有限公司 | Transfer method for preventing LED chip from being damaged |
CN113764551A (en) * | 2021-09-07 | 2021-12-07 | 东莞市中麒光电技术有限公司 | LED chip transfer method |
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