CN104022086A - Semiconductor packaging structure and manufacturing method thereof - Google Patents
Semiconductor packaging structure and manufacturing method thereof Download PDFInfo
- Publication number
- CN104022086A CN104022086A CN201310066620.0A CN201310066620A CN104022086A CN 104022086 A CN104022086 A CN 104022086A CN 201310066620 A CN201310066620 A CN 201310066620A CN 104022086 A CN104022086 A CN 104022086A
- Authority
- CN
- China
- Prior art keywords
- heating
- zone
- electronic component
- semiconductor package
- connection pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
Abstract
The invention aims to provide a semiconductor packaging structure and a manufacturing method thereof. The semiconductor packaging structure comprises a substrate, at least one electronic component, a heating layer, an insulating layer and an electromagnetic shielding layer. The substrate comprises a first connecting pad and a second connecting pad, the electronic component is installed on the substrate, the heating layer is located above the electronic component and provides thermal energy to the electronic component, the heating layer is electrically connected with the first connecting pad and the second connecting pad, the electromagnetic shielding layer is on the heating layer, and the insulating layer is located between the heating layer and the electromagnetic shielding layer.
Description
Technical field
The present invention is relevant for a kind of semiconductor package, and particularly relevant for the semiconductor package with zone of heating.
Background technology
Current electronic system or electronic installation include a plurality of semiconductor packages mostly.Generally speaking, semiconductor package comprises a plurality of electronic components that are installed in substrate, and according to process requirements, designs different electric connection modes.When electronic system or electronic installation running, these electronic components need reach its operating temperature.
Generally speaking, for electronic system or electronic installation are operated in the normal situation of its working temperature, conventionally can be in electronic system or electronic installation configuration heating system, so that the temperature of electronic system or electronic installation reaches operating temperature.About existing electronic system or electronic installation, common heating system is to provide heat energy to electronic component with tubulose or the fluorescent tube of plane formula, thereby electronic component can be warming up to operating temperature by this heat energy.
But, lightening along with electronic system or electronic installation, the design of semiconductor package also gets over densification and complicated, makes semiconductor package be tending towards microminiaturization, and therefore, the installing difficulty of heating system also improves.
Summary of the invention
The object of the present invention is to provide a kind of semiconductor package, its zone of heating having can provide heat energy to electronic component.
The embodiment of the present invention provides a kind of semiconductor package, and described semiconductor package comprises substrate, at least one electronic component zone of heating, insulating barrier and ELECTROMAGNETIC OBSCURANT layer.Substrate comprises the first connection pad and the second connection pad, electronic component is installed on substrate, zone of heating is positioned on electronic component, and provide a heat energy to electronic component, and zone of heating and the first connection pad and the second connection pad are electrically connected, ELECTROMAGNETIC OBSCURANT layer is positioned on zone of heating, and insulating barrier is between zone of heating and ELECTROMAGNETIC OBSCURANT layer.
In sum, described semiconductor package has zone of heating.When external power source puts on described zone of heating, utilize the effect of electric energy energy transform into heat energy, zone of heating can produce heat energy, makes electronic component to be warming up to operating temperature by this heat energy.
In order further to understand the present invention, reach technology, method and the effect that set object is taked, refer to following relevant detailed description of the present invention, graphic, believe object of the present invention, feature and feature, when being goed deep into thus and concrete understanding, yet appended graphic and annex only provide with reference to and explanation use, be not used for to the present invention's limitr in addition.
Accompanying drawing explanation
Figure 1A is the schematic top plan view of the semiconductor package of first embodiment of the invention.
Figure 1B is the generalized section that in Figure 1A, P-P section along the line illustrates.
Fig. 2 is the generalized section of the semiconductor package of second embodiment of the invention.
Wherein, description of reference numerals is as follows:
100,200 semiconductor packages
110 substrates
112 first connection pads
114 second connection pads
120 electronic components
130,230 zones of heating
140,240 insulating barriers
150,250 ELECTROMAGNETIC OBSCURANT layers
160 heat transfer layers
260 mould sealings
C1 cavity
Embodiment
In alterations, show some exemplary embodiments, and below will consult alterations to describe more fully various exemplary embodiments.What deserves to be explained is, concept of the present invention may be with many multi-form embodiments, and should not be construed as and be limited to the exemplary embodiments set forth herein.Specifically, provide the exemplary embodiments such as all to make the present invention will be for detailed and complete, and will to those skilled in the art, fully pass on the category of concept of the present invention.In each is graphic, can be for explicit and lavish praise on oneself size and the relative size in Ceng Ji district, and similar numeral indication like.
Although may describe various elements by term first, second, third, etc. herein, these elements are not limited by these terms should.These terms are to distinguish an element and another element, and therefore, the first element of below discussing can be described as the second element and do not depart from the teaching of concept of the present invention.In addition, may use herein term " and/or ", this is that indication comprises all combinations of listing arbitrary in project and one or many that are associated.
Semiconductor package of the present invention is to utilize zone of heating to carry out Heating Electron element, makes electronic component can in low temperature environment, maintain normal operational function.Semiconductor package of the present invention comprises various embodiments, below will coordinate Fig. 1 to Fig. 2 that above-mentioned semiconductor package is described.
[the first embodiment]
Figure 1A is the schematic top plan view of the semiconductor package of the embodiment of the present invention, and Figure 1B is the generalized section that in Figure 1A, P-P section along the line illustrates.Refer to Figure 1A and Figure 1B, semiconductor package 100 comprises substrate 110, electronic component 120, zone of heating 130, insulating barrier 140 and ELECTROMAGNETIC OBSCURANT layer 150.Electronic component 120 installings (mount) are in substrate 110 tops, zone of heating 130 is positioned at surrounding and the top of electronic component 120, and zone of heating 130 is electrically connected with substrate 110, ELECTROMAGNETIC OBSCURANT layer 150 is positioned on zone of heating 130, and insulating barrier 140 is between zone of heating 130 and ELECTROMAGNETIC OBSCURANT layer 150.
Substrate 110 is the support plate (carrier) that circuit and various electronic component configure, and therefore, conventionally disposes joint sheet (bonding pad) and circuit (trace) (not illustrating) on substrate 110.Substrate 110 comprises the first connection pad 112 and the second connection pad 114.In the present embodiment, the first connection pad 112 and the second connection pad 114 are disposed in substrate 110, and wherein the first connection pad 112 is electrically connected with external power source, and the second connection pad 114 is a ground connection connection pad.Setting position that it should be noted that the first connection pad 112 and the second connection pad 114 can design according to the configuration needs of circuit, for example, be surface or the side that is arranged at substrate 110.The present invention is not limited the first connection pad 112 and the second connection pad 114.
In addition, the material of substrate 110 generally includes epoxy resin (Epoxy resin), cyanogen fat resin core thin plate (Cyanate ester core, CE core) or the material such as bismaleimide core thin plate (Bismaleimide core, BMI core).
Electronic component 120 is disposed on substrate 110, and electronic component 120 is electrically connected to transmit the signal of telecommunication with substrate 110.In practice, the joint sheet of substrate 110 and circuit can design according to the ornaments demand of electronic component 120.Electronic component 120 can be to be electrically connected with substrate 110 in many ways, for example, be routing mode (wire bonding), cover joint sheet and/or the circuit electric connection of crystal type (flip chip) or other method for packing and substrate.
In addition, in the present embodiment, electronic component 120 can comprise all kinds, and the kind of these electronic components 120 incomplete same.A plurality of electronic components 120 can be different electronic components, such as being chip, transistor, diode, electric capacity or inductance etc.But, the present invention is not limited the kind of electronic component 120.
Zone of heating 130 is positioned at surrounding and the top of electronic component 120, and zone of heating 130 provides heat energy to electronic component 120, and zone of heating 130 and the first connection pad 112 and the second connection pad 114 electric connections.Specifically, zone of heating 130 cover caps are in surrounding and the top of electronic component 120 and extend on substrate 110.Zone of heating 130 contact with substrate 110 and zone of heating 130 and electronic component 120 between form cavity C 1.External power source passes into zone of heating 130 by the first connection pad 112, and external power source flows out by the second connection pad 114.Because zone of heating 130 has impedance, so foreign current is while flowing through zone of heating 130, and zone of heating 130 can produce heats.By the effect of electric energy energy transform into heat energy, zone of heating 130 starts heating, and heating is positioned at the gas (for example air) of cavity C 1.Accordingly, zone of heating 130 can provide heat energy to electronic component 120.
What deserves to be explained is, zone of heating 130 can be the made rete of electric conducting material, such as zone of heating 130, is with made retes of metal material such as copper, aluminium or patina nickel.But, zone of heating 130 can be also made by conducting polymer composite, and for example, polyaniline (Polyaniline, PAn), poly-arsenic are coughed up the materials such as (Polypyrrole, PYy) or poly-match fen (Polythiophene, PTh).In addition, in different inventive embodiments, zone of heating 130 can be also conducing composite material, be for example in macromolecular material, mix carbon fiber (carbon fiber) or Dao electricity Tan ?(conductive carbon black).Yet the present invention does not limit the material of zone of heating 130.
In addition, for making zone of heating 130 can provide more rapidly electronic component 120 heat energy, semiconductor package 100 also comprises heat transfer layer 160, and heat transfer layer 160 is positioned at electronic component 120 tops, and contacts with electronic component 120 and zone of heating 130.The insulating material that heat transfer layer 160 is high heat conduction, in order to as heat transfer medium with conduction heat energy, generally speaking, heat transfer layer 160 can be by being coated with or the mode such as printing is formed at the outer surface of electronic component 120, accordingly, the heat energy that zone of heating 130 produces is able to conduct to more efficiently electronic component 120 by heat transfer layer 160.
ELECTROMAGNETIC OBSCURANT layer 150 is positioned at the outside of zone of heating 130, insulating barrier 140 is between zone of heating 130 and ELECTROMAGNETIC OBSCURANT layer 150, and ELECTROMAGNETIC OBSCURANT layer 150 is that electric conducting material is made, for example, be made with metal material, conducting polymer composite or conducing composite material.In the present embodiment, ELECTROMAGNETIC OBSCURANT layer 150 is an electromagnetic shield, the surrounding of cover cap electronic component 120.
Insulating barrier 140 is formed at the inner surface of ELECTROMAGNETIC OBSCURANT layer 150.In general, insulating barrier 140 is in order to the electric connection between isolated zone of heating 130 and ELECTROMAGNETIC OBSCURANT layer 150.In addition, insulating barrier 140 also can reduce zone of heating 130 and is subject to the harmful effect that extraneous moisture or variations in temperature bring or the erosion that is subject to other materials.It should be noted that insulating barrier 140 can be an adhesive body or other insulating material, is formed at the inner surface of ELECTROMAGNETIC OBSCURANT layer 150 by attaching or spraying plating.But, the present invention is not limited the material of insulating barrier 140 and manufacture method.
What deserves to be explained is, in the present embodiment, in ELECTROMAGNETIC OBSCURANT layer 150 inner side, plate insulating barrier 140, and ELECTROMAGNETIC OBSCURANT layer 150 can be crown cap.Then, then by zone of heating 130 to attach or spraying plating mode is formed on insulating barrier 140, and zone of heating 130 can be electrically conductive ink, such as being silver paste printing ink, carbon paste printing ink or silver-colored carbon paste printing ink etc.Then, ELECTROMAGNETIC OBSCURANT layer 150 and the insulating barrier 140 that is attached to ELECTROMAGNETIC OBSCURANT layer 150 inner surface are disposed on substrate 110 jointly with zone of heating 130, and on ELECTROMAGNETIC OBSCURANT layer 150, ELECTROMAGNETIC OBSCURANT layer 150 and the common cover cap electronic component 120 of insulating barrier 140, thereby zone of heating 130 can provide heat energy to electronic component 120.
In addition, in other embodiment, zone of heating 130 can pass through patterned process, and then make zone of heating 130 form zigzags, whirlpool shape, snake shape or the pattern such as netted, and more can change resistance value through the zone of heating 130 of patterning, be for example in macromolecular material, mix carbon fiber (carbon fiber) or Dao electricity Tan ?(conductive carbon black), to increase or to reduce the generation of heat energy.Base this, insulating barrier 140 can also pass through patterned process, and identical with the pattern of wanting to be formed at zone of heating 130 through the insulating barrier 140 of patterned process, by this to facilitate technique process, and reduction manufacturing cost.
[the second embodiment]
Fig. 2 is the generalized section of the semiconductor package of second embodiment of the invention.The semiconductor package 200 of the second embodiment and the semiconductor package of the first embodiment 100 the two structural similarity, effect is identical, and for example semiconductor package 200 and 100 equally all comprises electronic component 120.To only introduce semiconductor package 200 and 100 the two differences below, it is no longer repeated for identical feature.
Refer to Fig. 2, the semiconductor package 200 of the second embodiment comprises substrate 110, electronic component 120, zone of heating 230, insulating barrier 240 and ELECTROMAGNETIC OBSCURANT layer 250.Electronic component 120 is installed in substrate 110 tops, zone of heating 230 is positioned at surrounding and the top of electronic component 120, and zone of heating 230 and substrate 110 electric connections, ELECTROMAGNETIC OBSCURANT layer 250 is positioned at side outside zone of heating 230, and insulating barrier 240 is between zone of heating 230 and ELECTROMAGNETIC OBSCURANT layer 250.
Semiconductor package 200 can also comprise mould sealing 260, and mould sealing 260 coated electric components 120 in order to protect electronic component 120, and can be avoided producing the situations such as unnecessary electric connection or short circuit between different electronic component 120.Generally speaking, mould sealing 260 is adhesive body, and mould sealing 260 can contain epoxy resin (Epoxy resin).
Zone of heating 230 is positioned at the outside of mould sealing 260, and zone of heating 230 and the first connection pad 112 and the second connection pad 114 electric connections, that is mould sealing 260 is between electronic component 120 and zone of heating 230.Specifically, zone of heating 230 contacts with mould sealing 260, and zone of heating 230 provides heat energy to electronic component 120 by mould sealing 260 with heat exchange pattern.
Insulating barrier 240 is between zone of heating 230 and ELECTROMAGNETIC OBSCURANT layer 250.Specifically, the outer surface of insulating barrier 240 coated zones of heating 230, and insulating barrier 240 can be an adhesive body or different insulating material, is formed at the outer surface of zone of heating 230 by attaching or spraying plating.
ELECTROMAGNETIC OBSCURANT layer 250 is positioned at the outer surface of insulating barrier 240, and ELECTROMAGNETIC OBSCURANT layer 250 is that electric conducting material is made, for example, be made with metal material, conducting polymer composite or conducing composite material.In the present embodiment, ELECTROMAGNETIC OBSCURANT layer 250 can be the conductive film depositing by modes such as spraying (Spray Coating), ion plating (Ion Plating), sputter (Sputter Deposition) or evaporations (Evaporation Deposition).Yet the present invention does not limit material and the manufacture method of ELECTROMAGNETIC OBSCURANT layer 250.
What deserves to be explained is, in the present embodiment, mould sealing 260 coated electric components 120, and form zone of heating 230 at the outer surface of mould sealing 260.Then,, in the outer surface formation insulating barrier 240 of zone of heating 230, then the outer surface in insulating barrier 240 forms ELECTROMAGNETIC OBSCURANT layer 250.
In sum, the embodiment of the present invention provides a kind of semiconductor package with zone of heating.When foreign current puts on described zone of heating, by the effect of electric energy energy transform into heat energy, zone of heating can produce heat energy, makes electronic component to be warming up to operating temperature by this heat energy.It should be noted that in the present invention described zone of heating can, via patterned process, to change the resistance value of zone of heating, thereby can be adjusted heat energy that zone of heating produces wherein in an embodiment.
The foregoing is only embodiments of the invention, it is not in order to limit scope of patent protection of the present invention.Any this area skill book personnel, within not departing from spirit of the present invention and scope, the change of doing and the equivalence of retouching are replaced, and are still in Patent right requirement protection range of the present invention.
Claims (10)
1. a semiconductor package, is characterized in that this semiconductor package comprises:
Substrate, comprises the first connection pad and the second connection pad;
At least one electronic component, is installed on this substrate;
Zone of heating, is positioned at surrounding and the top of this electronic component, and this zone of heating provides heat energy to this electronic component, and this zone of heating and this first connection pad and this second connection pad are electrically connected; And
ELECTROMAGNETIC OBSCURANT layer, is positioned at the outside of this zone of heating;
Insulating barrier, between this zone of heating and this ELECTROMAGNETIC OBSCURANT layer.
2. semiconductor package as claimed in claim 1, it is characterized in that this first connection pad connects external power source, and this second connection pad is ground connection connection pad.
3. semiconductor package as claimed in claim 1, is characterized in that this semiconductor package also comprises mould sealing, and this mould sealing is between this electronic component and this zone of heating, and coated this electronic component of this mould sealing.
4. semiconductor package as claimed in claim 3, it is characterized in that this zone of heating by this mould sealing to provide heat energy to this electronic component.
5. semiconductor package as claimed in claim 1, is characterized in that forming cavity between this zone of heating and this electronic component.
6. semiconductor package as claimed in claim 1, is characterized in that this semiconductor package also comprises heat transfer layer, and this heat transfer layer is positioned at this electronic component top, and contacts with this electronic component and this zone of heating.
7. semiconductor package as claimed in claim 1, is characterized in that this first connection pad and this second connection pad are disposed at the surface of this substrate.
8. semiconductor package as claimed in claim 1, is characterized in that this first connection pad and this second connection pad are disposed at the side of this substrate.
9. semiconductor package as claimed in claim 1, is characterized in that this ELECTROMAGNETIC OBSCURANT layer is crown cap.
10. semiconductor package as claimed in claim 1, is characterized in that this ELECTROMAGNETIC OBSCURANT layer is conductive film.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811215314.8A CN109449129A (en) | 2013-03-01 | 2013-03-01 | Semiconductor package and its manufacturing method |
| CN201310066620.0A CN104022086A (en) | 2013-03-01 | 2013-03-01 | Semiconductor packaging structure and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310066620.0A CN104022086A (en) | 2013-03-01 | 2013-03-01 | Semiconductor packaging structure and manufacturing method thereof |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811215314.8A Division CN109449129A (en) | 2013-03-01 | 2013-03-01 | Semiconductor package and its manufacturing method |
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| CN104022086A true CN104022086A (en) | 2014-09-03 |
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| CN201811215314.8A Pending CN109449129A (en) | 2013-03-01 | 2013-03-01 | Semiconductor package and its manufacturing method |
| CN201310066620.0A Pending CN104022086A (en) | 2013-03-01 | 2013-03-01 | Semiconductor packaging structure and manufacturing method thereof |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201811215314.8A Pending CN109449129A (en) | 2013-03-01 | 2013-03-01 | Semiconductor package and its manufacturing method |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1633230A (en) * | 2003-12-24 | 2005-06-29 | 华为技术有限公司 | A heating system |
| US20100230807A1 (en) * | 2007-09-05 | 2010-09-16 | Bronner Gary B | Method and Apparatus to Repair Defects in Nonvolatile Semiconductor Memory Devices |
| US20130001765A1 (en) * | 2011-06-29 | 2013-01-03 | Invensense, Inc. | Integrated heater on mems cap for wafer scale packaged mems sensors |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101887860A (en) * | 2009-05-14 | 2010-11-17 | 群登科技股份有限公司 | Manufacturing method of electronic elements and encapsulation structures thereof |
| TWI417039B (en) * | 2011-05-02 | 2013-11-21 | Powertech Technology Inc | Semiconductor package for improving ground connection of electromagnetic shielding layer |
-
2013
- 2013-03-01 CN CN201811215314.8A patent/CN109449129A/en active Pending
- 2013-03-01 CN CN201310066620.0A patent/CN104022086A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1633230A (en) * | 2003-12-24 | 2005-06-29 | 华为技术有限公司 | A heating system |
| US20100230807A1 (en) * | 2007-09-05 | 2010-09-16 | Bronner Gary B | Method and Apparatus to Repair Defects in Nonvolatile Semiconductor Memory Devices |
| US20130001765A1 (en) * | 2011-06-29 | 2013-01-03 | Invensense, Inc. | Integrated heater on mems cap for wafer scale packaged mems sensors |
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| CN109449129A (en) | 2019-03-08 |
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