CN103969511A - Measuring method for capacity parameters of each chip on silicon chip - Google Patents
Measuring method for capacity parameters of each chip on silicon chip Download PDFInfo
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- CN103969511A CN103969511A CN201410228103.3A CN201410228103A CN103969511A CN 103969511 A CN103969511 A CN 103969511A CN 201410228103 A CN201410228103 A CN 201410228103A CN 103969511 A CN103969511 A CN 103969511A
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Abstract
The invention provides a measuring method for capacity parameters of each chip on a silicon chip, comprising the steps of selecting a tested silicon chip, transferring a measuring probe of a capacitance meter to be above each chip on the tested silicon chip to carry out a new round of non-contact idle measurement, so as to obtain zero capacitance data of each chip in different positions on the tested silicon chip under current measurement environment; providing a to-be-tested silicon chip, enabling the measuring probe to respectively contact with each chip on the to-be-tested silicon chip to carry out formal measurement, wherein after each chip is measured, subtracting the measurement value by the zero capacitance data of the chip in the same position on the tested silicon chip, so as to obtain the actual capacitance of each tested chip on the to-be-tested silicon chip; comparing the actual capacitance of each tested chip after calculation zero setting with a code value respectively, judging whether the chip is qualified or not, and recording and storing as data. According to the invention, distribution effect and parasitic effect of capacitance of the back and the surface of the silicon chip can be overcome, quick and accurate measurement can be carried out on small capacitance parameters of each chip on the silicon chip, and the requirement of mass production can be met.
Description
Technical field
The present invention relates to ic test technique field, specifically, the present invention relates to the measuring method of the capacitance parameter of each chip on a kind of silicon chip.
Background technology
Chip (die) capacitance parameter test in silicon chip (wafer) production of integrated circuit, be generally the electrode of measuring probe contact measured capacitance in chip front side, another electrode of measured capacitance is drawn from the sucker of the conduction that holds silicon chip back side.That is to say, the back side of whole silicon chip is the common electrode of all chips.
Due to Distribution Effect and the ghost effect of silicon chip back surfaces electric capacity, the stray capacitance between the electrode of silicon chip back side and the front side of silicon wafer chip in diverse location is different.Taking the silicon chip of 8 inch diameters as example, the stray capacitance difference between each chip at silicon chip central authorities and edge is in 0.2～0.8pF left and right.
For capacitance parameter value more than 10pF the product of (large electric capacity), because the measuring error that stray capacitance causes maybe can be ignored, but for capacitance parameter value below 1pF the product of (little electric capacity), such measuring error is obviously unacceptable.
In prior art, the method for the little capacitance parameter of a kind of Utopian accurate measurement can be to carry out electric capacity zeroing above measuring probe moves to chip under test time, then probe again contact chip start to measure.But, the time that once zeroing need to approximately 1 second.If tested again after each chip returns to zero, be also unacceptable for producing in enormous quantities, can only carry out the sampling test of a small amount of chip on silicon chip.
Summary of the invention
Technical matters to be solved by this invention is to provide the measuring method of the capacitance parameter of each chip on a kind of silicon chip, be intended to overcome Distribution Effect and the ghost effect of silicon chip back side surface capacitance, little electric capacity (1pF is following) parameter to each chip on silicon chip carries out measuring fast and accurately, meets the demand of producing in enormous quantities.
For solving the problems of the technologies described above, the invention provides the measuring method of the capacitance parameter of each chip on a kind of silicon chip, comprising:
Pre-zeroing step: choose a slice test silicon wafer, non-contacting empty survey carried out taking turns in the top that the measuring probe of capacitance meter is moved to each chip in described test silicon wafer successively, obtains under current measurement environment the zero capacitance data of each described chip of diverse location in described test silicon wafer;
Formal measuring process: silicon slice under test is provided, each chip that described measuring probe is contacted respectively on described silicon slice under test is formally measured, described chip of every measurement, just measured value is deducted and the described zero capacitance data of the described chip of same position in described test silicon wafer, obtain the actual capacitance parameter value of each tested chip on described silicon slice under test.
Alternatively, the measuring method of described capacitance parameter also comprises:
Compare to determine step: the described actual capacitance parameter value by each tested described chip after computing zeroing compares with normal value respectively, judges that whether described chip is qualified, and saves as data recording.
Alternatively, in described pre-zeroing step, in the time carrying out non-contacting empty survey, the distance that described measuring probe is positioned at each described chip top in described test silicon wafer is 5～20 microns.
Alternatively, the capacitance of described capacitance parameter is below 1pF.
Alternatively, described test silicon wafer and described silicon slice under test are the silicon chip of 6 inches, 8 inches, 12 inches or 18 inch diameters.
Compared with prior art, the present invention has the following advantages:
Little electric capacity (1pF the is following) parameter that the present invention has reached each chip on silicon chip is carried out the object of fast and accurately measuring, with in prior art one by one after chip zeroing compared with the method for test, testing efficiency improves nearly 1,000,000 times, thereby with few equipment investment and testing cost, make the chip production test that meets industrialized production demand become possibility.
Apply the product that measuring method of the present invention is produced,, by the finished product test checking after test identification and the chip package of back segment, can be used for producing in enormous quantities.
Brief description of the drawings
The above and other features of the present invention, character and advantage are by by becoming more obvious below in conjunction with the description of drawings and Examples, wherein:
Fig. 1 is the schematic flow sheet of the measuring method of the capacitance parameter of each chip on the silicon chip of one embodiment of the invention;
Fig. 2 is the schematic flow sheet of the measuring method of the capacitance parameter of each chip on the silicon chip of another embodiment of the present invention;
Fig. 3 is 761 distributions of chip under test on silicon chip and the result schematic diagram comparing to determine thereof after the measuring method of the capacitance parameter of each chip on the silicon chip of one embodiment of the invention is implemented.
Embodiment
Thinking of the present invention is: if will accurately measure capacitance parameter, must before measuring, first return to zero to capacitance meter.The method of zeroing is that capacitance meter stores this value as calibration value when measuring probe very near distance but not yet when hand capacity electrode, first empty survey once obtains a capacitance parameter value above chip under test.Then measuring probe contact chip under test is formally measured, and the measured value obtaining deducts the calibration value that sky records, and is exactly the actual capacitance parameter value of chip under test.
According to this thinking, the method that the present invention has developed a kind of " zeroing in advance ".Be exactly before silicon chip is measured in formal production, first get a slice test silicon wafer and carry out taking turns the air-ground survey of noncontact, just can obtain the zero capacitance data file of the whole silicon chip of this product, wherein comprise " zero capacitance " value of the chip of measuring in all needs of diverse location on (electrical properties with silicon chip itself is irrelevant) silicon chip under current measurement environment.Then start formal measurement, chip of every measurement, just deducts measured value in zero capacitance data file the zero capacitance value of same position chip, is equivalent to this chip to return to zero.Finally by this, the capacitance parameter value after computing zeroing and normal value are made qualification determination after comparing, and save as data recording.So, on average to the zeroing calculation process time after each chip capacity parameter measurement be Microsecond grade.
Below in conjunction with embodiment and accompanying drawing more specifically, the invention will be further described; set forth in the following description more details so that fully understand the present invention; but the present invention obviously can implement with the multiple alternate manner that is different from this description; those skilled in the art can do similar popularization, deduction according to practical situations without prejudice to intension of the present invention in the situation that, therefore should be with content constraints protection scope of the present invention of this specific embodiment.
Fig. 1 is the schematic flow sheet of the measurement method of parameters of the stray capacitance of each chip on the silicon chip of one embodiment of the invention.As shown in Figure 1, this measurement method of parameters mainly comprises pre-zeroing step S101 and formal measuring process S102.Wherein, this pre-zeroing step S101 is: choose a slice test silicon wafer, non-contacting empty survey carried out taking turns in the top that the measuring probe of capacitance meter is moved to each chip in test silicon wafer successively, obtains under current measurement environment the zero capacitance data of each chip of diverse location in test silicon wafer.In this pre-zeroing step S101, in the time carrying out non-contacting empty survey, " very near " distance that measuring probe is positioned at each chip top in test silicon wafer can be 5～20 microns.
This formal measuring process S102 is: silicon slice under test is provided, by measuring probe respectively the each chip on contact measured silicon chip formally measure, chip of every measurement, just measured value is deducted and the zero capacitance data of the chip of same position in test silicon wafer, obtain the actual capacitance parameter value of each tested chip on silicon slice under test.
Fig. 2 is the schematic flow sheet of the measurement method of parameters of the stray capacitance of each chip on the silicon chip of another embodiment of the present invention.As shown in Figure 2, in the present embodiment, this measurement method of parameters can also comprise and compare to determine step S103 after the formal measuring process S102 of Fig. 1.This compares to determine step S103: the actual capacitance parameter value by each tested chip after computing zeroing compares with normal value respectively, judges that whether chip is qualified, and saves as data recording.
In the present invention, the capacitance of this capacitance parameter of chip is below 1pF.And this test silicon wafer and this silicon slice under test can be the silicon chip of 6 inches, 8 inches, 12 inches or 18 inch diameters, applicable surface of the present invention is very extensive.
Fig. 3 is 761 distributions of chip under test on silicon chip and the result schematic diagram comparing to determine thereof after the measuring method of the capacitance parameter of each chip on the silicon chip of one embodiment of the invention is implemented.The silicon chip that the present embodiment adopts is the silicon chip of one 8 inch diameters, on it, altogether manufactures and has thousands of, tens thousand of even more chips, chooses wherein equally distributed 761 chips as chip under test at this.
Before formal measurement, first appoint and get one batch of a slice in silicon chip and carry out taking turns the air-ground survey of noncontact, obtain the zero capacitance data of this product, wherein comprise " zero capacitance " value of the chip under test that on silicon chip, 761 needs in diverse location are measured, and have direct current biasing 0V and two capacitances of 5V (can set as requested).This zero capacitance data file can be used for the operation result of measurement of all silicon chips of this batch.
Then start the formal measurement of this batch, it should be noted that, the measurement data of each chip deducts its zero capacitance data, is only accurate final data.
In Fig. 3, can see intuitively distribution and the qualification determination result thereof of 761 chip under test on silicon chip, what classification results was " 1 " is certified products, other results (for example 5,6 etc.) are unacceptable product.In addition, result is not for there is no chip (also having five places except edge) herein on " sky " expression silicon chip.
More complicated due to the data of 761 chip under test shown in Fig. 3 are illustrated respectively, existing extract wherein representational 9 points (chip a～i) describe sees table (capacitance unit is all pF).
Wherein, Cap-0V refers to the capacitance parameter value that direct current biasing records while being 0V, and Cap-5V refers to the capacitance parameter value that direct current biasing records while being 5V.
In sum, little electric capacity (1pF the is following) parameter that the present invention has reached each chip on silicon chip is carried out the object of fast and accurately measuring, with in prior art one by one after chip zeroing compared with the method for test, testing efficiency improves nearly 1,000,000 times, thereby with few equipment investment and testing cost, make the chip production test that meets industrialized production demand become possibility.
Apply the product that measuring method of the present invention is produced,, by the finished product test checking after test identification and the chip package of back segment, can be used for producing in enormous quantities.
Although the present invention with preferred embodiment openly as above, it is not for limiting the present invention, and any those skilled in the art without departing from the spirit and scope of the present invention, can make possible variation and amendment.Therefore, every content that does not depart from technical solution of the present invention, any amendment, equivalent variations and the modification above embodiment done according to technical spirit of the present invention, within all falling into the protection domain that the claims in the present invention define.
Claims (5)
1. a measuring method for the capacitance parameter of each chip on silicon chip, comprising:
Pre-zeroing step: choose a slice test silicon wafer, non-contacting empty survey carried out taking turns in the top that the measuring probe of capacitance meter is moved to each chip in described test silicon wafer successively, obtains under current measurement environment the zero capacitance data of each described chip of diverse location in described test silicon wafer;
Formal measuring process: silicon slice under test is provided, each chip that described measuring probe is contacted respectively on described silicon slice under test is formally measured, described chip of every measurement, just measured value is deducted and the described zero capacitance data of the described chip of same position in described test silicon wafer, obtain the actual capacitance parameter value of each tested chip on described silicon slice under test.
2. the measuring method of capacitance parameter according to claim 1, is characterized in that, also comprises:
Compare to determine step: the described actual capacitance parameter value by each tested described chip after computing zeroing compares with normal value respectively, judges that whether described chip is qualified, and saves as data recording.
3. the measuring method of capacitance parameter according to claim 2, is characterized in that, in described pre-zeroing step, in the time carrying out non-contacting empty survey, the distance that described measuring probe is positioned at each described chip top in described test silicon wafer is 5～20 microns.
4. the measuring method of capacitance parameter according to claim 3, is characterized in that, the capacitance of described capacitance parameter is below 1pF.
5. the measuring method of capacitance parameter according to claim 4, is characterized in that, described test silicon wafer and described silicon slice under test are the silicon chip of 6 inches, 8 inches, 12 inches or 18 inch diameters.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410228103.3A CN103969511A (en) | 2014-05-27 | 2014-05-27 | Measuring method for capacity parameters of each chip on silicon chip |
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| CN201410228103.3A CN103969511A (en) | 2014-05-27 | 2014-05-27 | Measuring method for capacity parameters of each chip on silicon chip |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108152599A (en) * | 2017-12-28 | 2018-06-12 | 北京华峰测控技术股份有限公司 | The capacitance test method and test device of a kind of wafer |
| CN109884504A (en) * | 2019-03-14 | 2019-06-14 | 合肥本源量子计算科技有限责任公司 | A kind of quantum chip capacity detection method |
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| US6404222B1 (en) * | 2000-06-14 | 2002-06-11 | Faraday Technology Corp. | Chip capacitance measurement circuit |
| CN1598603A (en) * | 2003-09-15 | 2005-03-23 | 因芬尼昂技术股份公司 | Device and method for testing capacitor array in integrated circuit |
| CN101173967A (en) * | 2006-11-01 | 2008-05-07 | 上海华虹Nec电子有限公司 | Testing circuit and method for tiny capacitance |
| CN102096057A (en) * | 2010-11-16 | 2011-06-15 | 北京航天测控技术开发公司 | Calibration method and device of capacitance measurement circuit |
| CN202057729U (en) * | 2011-05-10 | 2011-11-30 | 嘉盛半导体(苏州)有限公司 | Internal capacitance test device for integrated circuit |
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2014
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Patent Citations (6)
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| US5294889A (en) * | 1992-03-27 | 1994-03-15 | Tandy Corporation | Battery operated capacitance measurement circuit |
| US6404222B1 (en) * | 2000-06-14 | 2002-06-11 | Faraday Technology Corp. | Chip capacitance measurement circuit |
| CN1598603A (en) * | 2003-09-15 | 2005-03-23 | 因芬尼昂技术股份公司 | Device and method for testing capacitor array in integrated circuit |
| CN101173967A (en) * | 2006-11-01 | 2008-05-07 | 上海华虹Nec电子有限公司 | Testing circuit and method for tiny capacitance |
| CN102096057A (en) * | 2010-11-16 | 2011-06-15 | 北京航天测控技术开发公司 | Calibration method and device of capacitance measurement circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108152599A (en) * | 2017-12-28 | 2018-06-12 | 北京华峰测控技术股份有限公司 | The capacitance test method and test device of a kind of wafer |
| CN109884504A (en) * | 2019-03-14 | 2019-06-14 | 合肥本源量子计算科技有限责任公司 | A kind of quantum chip capacity detection method |
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