CN103943562A - Interconnection line with graphene and preparation method of interconnection line - Google Patents

Interconnection line with graphene and preparation method of interconnection line Download PDF

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Publication number
CN103943562A
CN103943562A CN201410194398.7A CN201410194398A CN103943562A CN 103943562 A CN103943562 A CN 103943562A CN 201410194398 A CN201410194398 A CN 201410194398A CN 103943562 A CN103943562 A CN 103943562A
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CN
China
Prior art keywords
graphene
interconnection line
copper
layer
concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410194398.7A
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Chinese (zh)
Inventor
徐杨
任招娣
骆季奎
俞滨
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Zhejiang University ZJU
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Zhejiang University ZJU
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Publication date
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Priority to CN201410194398.7A priority Critical patent/CN103943562A/en
Publication of CN103943562A publication Critical patent/CN103943562A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers

Abstract

The invention discloses an interconnection line with graphene. A graphene layer and a copper conducting layer are sequentially arranged on an insulating substrate from bottom to top. A preparation method of the interconnection line includes the steps: transferring the graphene onto the washed insulating substrate; imaging the graphene by a photoetching method; forming the copper conducting layer on the graphene by an electroplating method. The graphene serves as a diffusion barrier layer of the conducting layer, the thickness of the diffusion barrier layer is reduced, miniaturization of devices is facilitated, the surface roughness of the conducting layer can be reduced, electric conductance of the conducting layer is improved, the graphene serves as both a metalized layer and the diffusion barrier layer of the conducting layer, and a preparation process is simplified.

Description

A kind of interconnection line with Graphene and preparation method thereof
Technical field
The present invention relates to a kind of interconnection line and preparation method thereof, relate in particular to a kind of interconnection line with Graphene and preparation method thereof.
Background technology
Existing interconnection line generally has insulated substrate, diffusion barrier layer, metal layer and conductive layer from bottom to top.Wherein, diffusion barrier layer is used the nanocrystalline or amorphous barrier layers such as TiNx conventionally, and its object is mainly the diffusion that stops copper.And metal layer is generally chemical plating copper layer, its effect is mainly that the negative electrode of conduction is provided for follow-up copper plating process.The resistance of diffusion barrier layer is conventionally very large, and thermal diffusion performance is also poor, and its thickness is conventionally also larger, and this has reduced the conductivity of interconnection line on the one hand, has increased on the other hand the size of interconnecting construction.The surface roughness of electroplating the interconnection line obtaining on the metal layers such as electroless copper is conventionally larger, can increase the electron scattering of wire, and the resistivity of interconnection line is increased.The double-decker of diffusion barrier layer and metal layer had both increased the complexity of technique, had increased again the size of device, had limited the further miniaturization of device.
Summary of the invention
The object of the present invention is to provide a kind of with Graphene as metal layer and diffusion barrier layer, what be conducive to device miniaturization has interconnection line of Graphene and preparation method thereof.
The interconnection line with Graphene of the present invention has successively graphene layer and copper conductive layer from bottom to top on insulated substrate.
Above-mentioned insulated substrate is PET or Si/SiO 2substrate.
The preparation method with the interconnection line of Graphene of the present invention, comprises the following steps:
1) insulated substrate is put into acetone ultrasonic cleaning, and with deionized water rinsing, nitrogen dries up;
2) Graphene is transferred to through step 1) on the insulated substrate processed;
3) use the method for photoetching to step 2) graphene layer graphical, interconnection line figure is transferred on graphene layer;
4) copper electrolyte configuration: copper sulphate water is dissolved, add successively therein sulfuric acid, surfactant and hydrochloric acid, stir, obtain copper electrolyte, concentration of copper sulfate in copper electrolyte is 150-250g/L, sulfuric acid concentration is 40-110 g/L, and chlorine ion concentration is 50-120 ppm, and surfactant concentration is 0.1-2g/L;
5) copper electrolyte plating: take phosphorus bronze sheet as anode, patterned Graphene, as negative electrode, is placed in step 4), adjusting temperature is 10-40 oc, current density are 0.5-16A/dm 2, under stirring condition, electroplate 1-120min, on Graphene surface, obtain copper conductive layer.
Above-mentioned surfactant can be neopelex or lauryl sodium sulfate.Described Graphene is single or multiple lift.
The present invention compares the beneficial effect having with background technology: the present invention is usingd Graphene as conductive layer and diffusion barrier layer, not only reduced the surface roughness of conductive layer, can improve the conductivity of interconnection line, and reduce the thickness of diffusion barrier layer, be conducive to the miniaturization of device.And preparation technology of the present invention is simple.
Accompanying drawing explanation
The schematic diagram of Fig. 1 interconnection line of the present invention.
Embodiment
Below in conjunction with embodiment, further illustrate the present invention.
As shown in Figure 1, the interconnection line with Graphene of the present invention has successively graphene layer 2 and copper conductive layer 3 from bottom to top on insulated substrate 1.
Embodiment 1
1) pet substrate put into acetone ultrasonic cleaning, also used deionized water rinsing, nitrogen dries up;
2) single-layer graphene is transferred to through step 1) on the pet substrate processed;
3) use the method for photoetching to step 2) graphene layer graphical, interconnection line figure is transferred on graphene layer;
4) copper electrolyte configuration: copper sulphate water is dissolved, add successively therein sulfuric acid, neopelex and hydrochloric acid, stir, obtain plating solution, concentration of copper sulfate in plating solution is 180g/L, sulfuric acid concentration is 80 g/L, and chlorine ion concentration is 50ppm, and neopelex concentration is 0.1g/L;
5) copper electrolyte plating: take phosphorus bronze sheet as anode, patterned Graphene, as negative electrode, is placed in step 4), regulating temperature is 10 oc, current density are 3A/dm 2, under stirring condition, electroplate 120min, on Graphene surface, obtain copper conductive layer.
Embodiment 2
1) by Si/SiO 2substrate is put into acetone ultrasonic cleaning, is also used deionized water rinsing, and nitrogen dries up;
2) single-layer graphene is transferred to through step 1) Si/SiO that processes 2on substrate;
3) use the method for photoetching to step 2) graphene layer graphical, interconnection line figure is transferred on graphene layer;
4) copper electrolyte configuration: copper sulphate water is dissolved, add successively therein sulfuric acid, neopelex and hydrochloric acid, stir, obtain plating solution, concentration of copper sulfate in plating solution is 150g/L, sulfuric acid concentration is 40 g/L, and chlorine ion concentration is 50 ppm, and neopelex concentration is 1g/L;
5) copper electrolyte plating: take phosphorus bronze sheet as anode, patterned Graphene, as negative electrode, is placed in step 4), regulating temperature is 30 oc, current density are 0.5A/dm 2, under stirring condition, electroplate 90min, on Graphene surface, obtain copper conductive layer.
Embodiment 3
1) base-plate cleaning: by Si/SiO 2substrate is put into acetone ultrasonic cleaning, is also used deionized water rinsing, and nitrogen dries up stand-by;
2) multi-layer graphene is transferred to through step 1) Si/SiO that processes 2on substrate;
3) use the method for photoetching to step 2) graphene layer graphical, interconnection line figure is transferred on graphene layer;
4) copper electrolyte configuration: copper sulphate water is dissolved, add successively therein sulfuric acid, lauryl sodium sulfate and hydrochloric acid, stir, obtain plating solution, concentration of copper sulfate in plating solution is 250g/L, sulfuric acid concentration is 110 g/L, and chlorine ion concentration is 120 ppm, and lauryl sodium sulfate concentration is 2g/L;
5) copper electrolyte plating: take phosphorus bronze sheet as anode, patterned Graphene, as negative electrode, is placed in step 4), regulating temperature is 40 oc, current density are 16A/dm 2, under stirring condition, electroplate 1min, on Graphene surface, obtain copper conductive layer.

Claims (5)

1. an interconnection line with Graphene, is characterized in that on insulated substrate (1), having successively graphene layer (2) and copper conductive layer (3) from bottom to top.
2. the interconnection line with Graphene according to claim 1, is characterized in that: described insulated substrate (1) is PET or Si/SiO 2substrate.
3. the preparation method with the interconnection line of Graphene according to claim 1, is characterized in that: described Graphene is single or multiple lift.
4. prepare a method with the interconnection line of Graphene as claimed in claim 1, it is characterized in that comprising the following steps:
1) insulated substrate is put into acetone ultrasonic cleaning, and with deionized water rinsing, nitrogen dries up;
2) Graphene is transferred to through step 1) on the insulated substrate processed;
3) use the method for photoetching to step 2) graphene layer graphical, interconnection line figure is transferred on graphene layer;
4) copper electrolyte configuration: copper sulphate water is dissolved, add successively therein sulfuric acid, surfactant and hydrochloric acid, stir, obtain copper electrolyte, concentration of copper sulfate in copper electrolyte is 150-250g/L, sulfuric acid concentration is 40-110 g/L, and chlorine ion concentration is 50-120 ppm, and surfactant concentration is 0.1-2g/L;
5) copper electrolyte plating: take phosphorus bronze sheet as anode, patterned Graphene, as negative electrode, is placed in step 4), adjusting temperature is 10-40 oc, current density are 0.5-16A/dm 2, under stirring condition, electroplate 1-120min, on Graphene surface, obtain copper conductive layer.
5. the preparation method with the interconnection line of Graphene according to claim 4, is characterized in that: described surfactant is neopelex or lauryl sodium sulfate.
CN201410194398.7A 2014-05-09 2014-05-09 Interconnection line with graphene and preparation method of interconnection line Pending CN103943562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410194398.7A CN103943562A (en) 2014-05-09 2014-05-09 Interconnection line with graphene and preparation method of interconnection line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410194398.7A CN103943562A (en) 2014-05-09 2014-05-09 Interconnection line with graphene and preparation method of interconnection line

Publications (1)

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CN103943562A true CN103943562A (en) 2014-07-23

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102593097A (en) * 2012-02-27 2012-07-18 北京大学 Integrated circuit metal interconnecting structure and manufacture method thereof
US20130302978A1 (en) * 2012-05-10 2013-11-14 International Business Machines Corporation Method of forming a graphene cap for copper interconnect structures
CN103579097A (en) * 2012-07-18 2014-02-12 国际商业机器公司 Method for forming interconnect structure and interconnect structure
CN103602964A (en) * 2013-10-17 2014-02-26 常州二维碳素科技有限公司 Method for preparing metal electrode on grapheme conductive film

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102593097A (en) * 2012-02-27 2012-07-18 北京大学 Integrated circuit metal interconnecting structure and manufacture method thereof
US20130302978A1 (en) * 2012-05-10 2013-11-14 International Business Machines Corporation Method of forming a graphene cap for copper interconnect structures
CN103579097A (en) * 2012-07-18 2014-02-12 国际商业机器公司 Method for forming interconnect structure and interconnect structure
CN103602964A (en) * 2013-10-17 2014-02-26 常州二维碳素科技有限公司 Method for preparing metal electrode on grapheme conductive film

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
张允诚等: "《电镀手册》", 31 July 1997, article "硫酸盐镀铜", pages: 292-295 *

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Application publication date: 20140723