CN103856296A - Address data compression algorithm for low-voltage power line carrier communication - Google Patents
Address data compression algorithm for low-voltage power line carrier communication Download PDFInfo
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Abstract
The invention discloses an address data compression algorithm for low-voltage power line carrier communication. The address data compression algorithm is mainly for the DL/T645 communication protocol, and compression of address data for power line carrier communication is achieved with an address byte matching and compressing method. The address data compression algorithm mainly converts address bytes of BCD codes into address bytes of HEX codes firstly, then performs the compression algorithm on the address bytes of the HEX codes and compresses the address data of which the high bytes are '00' in an address and address data of which the address bytes are repeated. According to the address data compression algorithm for low-voltage power line carrier communication, the length of the address data in low-voltage power line carrier communication can be effectively shortened, the communication success rate is improved, and the anti-interference capability is enhanced.
Description
[technical field]
The present invention relates to the address date compression algorithm for low-voltage powerline carrier communication.
[background technology]
Low-voltage powerline carrier communication is a kind of communication mode the most basic in power communication system, it is to utilize power line as transmission channel, do not need the independent construction of line and maintenance line, and power circuit is firm in structure, therefore power line carrier communication is also distinctive communication mode in electric power system, has been widely used at present the fields such as centralized automatic meter-reading, Smart Home, intelligent building.But low-voltage power line network configuration and load complexity, work under bad environment, signal attenuation are large, low voltage power line communication channel noise jamming and time become decay be its intrinsic defect, this has caused, and power line transmitted data rates is lower, reliability is also poor, has seriously restricted applying of power-line carrier communication.Country is promoting the construction of intelligent grid energetically at present, and low-voltage carrier communication is as a kind of important technical that solves " last kilometer " problem existing in intelligent grid, will play a greater and greater role.Therefore solve the reliability of low-voltage powerline carrier communication, the key that raising traffic rate becomes development low-voltage carrier communication technology.
Spread spectrum communication is the widely used a kind of communication technology in current power line carrier communication field.Although it is strong that this technology has antijamming capability, good confidentiality, anti-fading, anti-multipath interference performance is strong, there is multiple access ability, be easy to realize the advantages such as code division multiple access, but also not fully up to expectations in actual application, there is the problems such as communication success rate is not high, traffic rate is slower.If take certain algorithm, means, by communication message contraction in length, in existing situation, can improve communication success rate, strengthen antijamming capability.
The communication protocol extensively adopting in current domestic low-voltage power line automatic meter reading system is DL/T645 communication protocol, and its mailing address is 6 byte binary-coded decimals, and address is arranged in order from low byte to high byte.In actual applications, consider transistroute algorithm, mailing address is by the integral multiple that is 6 bytes, and this has increased much mailing address shared proportion in communication message, therefore, can design corresponding compression algorithm for the feature of mailing address.
[summary of the invention]
Object of the present invention shortens power line carrier communication message length, improves success rate and the reliability of power line carrier communication.The object of the invention is realized by following technical scheme:
An address date compression algorithm for low-voltage powerline carrier communication, for DL/T645 communication protocol; It is characterized in that, comprise the following steps: what the address byte (2) that (1) converts the address byte of binary-coded decimal to HEX code judged address byte repeats whether to belong to following three kinds of situations: the data that 1. repeat continuously same byte, and the byte repeating is more than three or three, 2. repeat to be continuously no more than the data of 3 bytes, 3. the repetition of no more than 6 bytes in interval; It is the compression of carrying out address byte; (3) in the time that repetition byte is compressed, adopt the bright concrete compaction algorithms of compressed format word table, address compression format words accounts for a byte, and its each bit D7~D0 is defined as follows:
D7-D6: be fixed as ' 11 ', represent that this byte is address compression format words
D5: repetition byte direction word: ' 0 ' represents that byte to be copied is close to this format words, ' 1 ' represents that byte to be copied is from the 1st byte of previous address;
D4-D3: byte number to be copied, be 3 bytes to the maximum, if D4D3 is ' 00 ', there are two kinds of implications: when 1. D5 is ' 0 ', represent that byte to be copied is ' 00 '; 2., when D5 is ' 1 ', represent that byte length to be copied is definite by the value of D2-D0;
D2-D0: the byte number (equaling D2D1D0+2) reducing, every format words reduces at most 9 bytes.
The present invention, mainly for DL/T645 communication protocol, is mated the method for compression by address byte, realize the compression of the address date to power line carrier communication.The present invention can effectively shorten the length of address date in low-voltage powerline carrier communication, improves communication success rate, strengthens antijamming capability.
[brief description of the drawings]
Fig. 1 is DL/T645 communication protocol frame format.
Fig. 2 is the code conversion compression algorithm example that embodiment mono-provides.
Fig. 3 is compression algorithm example between the multiaddress that provides of embodiment bis-.
Fig. 4 is the address byte Matching Compression Algorithm example that embodiment tri-provides.
[embodiment]
As shown in Figure 1, be DL/T645 communication protocol frame format, as can be seen from Figure, in DL/T645 communication protocol, address field accounts for 6 bytes, and message while transmitting low address byte in front, high address byte rear.
Embodiment mono-, code conversion compression algorithm example: as shown in Figure 2, two binary-coded decimal mailing addresses are respectively " 000000001234 " and " 000000220034 " (8bit, span is 0~99), and high address byte is front, and low address byte is rear.But in communication transfer process, first pass low byte, therefore BCD deposits order for " 34 12 00 00 00 00 " and " 34 00 22 00 00 00 00 ".BCD code conversion is become to HEX coding (8bit, span is 0~255), and address is just transformed to " 22 0C 00 00 0000 " and " 22 00 16 00 00 00 ".Then from high byte to low byte, finding is not ' 00 ' byte, being respectively of two address dates " 0C " and " 16 ", by the highest bit position ' 1 ' of corresponding byte, and to get this highest bit position be end mark, even this highest bit is ' 1 ', the address that represents 6 bytes finishes, and gets other low 7bits of this byte as effective address.Reduce the address that high byte in address is ' 00 ', the address byte after two address dates compressions is transformed to " 22 8C 22 0096 ", compared with original 12 address bytes, has shortened 7 bytes.
Said method is by code conversion, for the address that to reduce address high byte be ' 00 '.Wherein also can be using high 7bits as effective address in step (2), lowest order is as end mark, but needs like this displacement.
Embodiment bis-, compression algorithm example between multiaddress: as shown in Figure 3, three tactic binary-coded decimal mailing addresses are respectively " 000023651234 ", " 000023650034 " and " 000023650036 ", and high address byte is front, and low address byte is rear.Equally, in communication transfer process, first pass low byte, therefore BCD deposits order for " 341265230000 ", " 340065230000 " and " 320065230000 ", converts HEX code address byte to and is respectively " 22 0C 41 17 00 00 ", " 22 00 41 17 00 00 " and " 24 00 41 17 00 00 ".Then, retain first mailing address constant, and from first mailing address, the corresponding byte of adjacent two addresses is carried out to XOR, obtain respectively " 22 0C 41 17 00 00 ", " 00 0C 00 00 00 00 " and " 06 00 00 00 00 00 ".Afterwards, non-' 00 ' byte is found in each address from high byte to low byte, be respectively " 17 " and " 0C " and " 06 ", by the highest bit position ' 1 ' of corresponding byte, getting this highest bit position is end mark, even this highest bit is ' 1 ', represents that the address of 6 bytes finishes, and gets other low 7bits of this byte as effective address.Reduce the address that high byte in each address is ' 00 ', the byte after three address dates compressions is just transformed to " 22 0C 41 97 00 8C 86 ", compared with original 18 address bytes, has shortened 11 bytes.
Said method is more suitable for and reduces the identical part of high address byte in multiple continuation addresses.XOR in step (2) wherein also can be substituted by subtraction.
Embodiment tri-, address byte Matching Compression Algorithm example: as shown in Figure 4, three tactic binary-coded decimal mailing addresses are respectively " 000023010101 ", " 650023650000 " and " 000023650023 ", and high address byte is front, and low address byte is rear.Equally, in communication transfer process, first pass low byte, therefore BCD deposits order for " 010101230000 ", " 000065230065 " and " 230065230000 ", converts HEX code address byte to and is respectively " 01 01 01 17 00 00 ", " 00 00 41 17 00 41 " and " 17 00 41 17 00 00 ".Compression process is as follows:
1, three address dates are lined up, and three bytes that start are most " 01 ", meet contractive condition.Find out repetition byte " 01 ", first byte is not compressed, only two bytes after compression; Build compressed format word: the highest two bit(D7-D6 of format words) be fixed as " 11 ", byte to be copied will be close to format words, therefore D5bit is " 0 ", byte number to be copied is 1, therefore the value of D4D3 is " 01 ", needs the byte number 2 of filling, therefore D2-D0 is 2-2, i.e. " 000 ".Can obtain thus first compressed format word for " C8 ".
2, byte is subsequently " 17 ", does not have consecutive identical situation, does not compress.
3, be subsequently continuous 4 bytes " 00 " (across two addresses), meet contractive condition, build compressed format word: the highest two bit of format words are fixed as " 11 ", byte to be copied is " 00 ", therefore the value of D5D4D3 is " 000 ", need the byte number 4 of filling, therefore D2-D0 is 4-2, i.e. " 010 ".Can obtain thus second compressed format word for " C2 ".
4, " 411700 " there is not repetition situation, do not compress for three bytes subsequently.
5,6 bytes " 41 17 00 41 17 00 " subsequently, exist three bytes to repeat situation, need compression, build compressed format word: the highest two bit of format words are fixed as " 11 ", and byte to be copied is " 411700 ", and are close to format words, therefore the value of D5D4D3 is " 011 ", need the byte number 6 of filling, therefore D2-D0 is 6-2, i.e. " 100 ".Can obtain thus the 3rd compressed format word for " DC "
6, there is not continuous repetition situation in last byte " 00 ", do not compress.
After the compression finally obtaining, address is " 01 C8 17 C2 41 17 00 DC 00 ", compared with 18 address bytes original with three address dates, has reduce 9 bytes.
Claims (1)
1. an address date compression algorithm for low-voltage powerline carrier communication, for DL/T645 communication protocol; It is characterized in that, comprise the following steps: the address byte (2) that (1) converts the address byte of binary-coded decimal to HEX code judges the data that repeat whether to belong to following three kinds of situation: a. and repeat continuously same byte of address byte, and the byte repeating is more than three or three, b. repeat to be continuously no more than the data of 3 bytes, the repetition of no more than 6 bytes in c. interval; It is the compression of carrying out address byte; (3) in the time that repetition byte is compressed, adopt the bright concrete compaction algorithms of compressed format word table, address compression format words accounts for a byte, and its each bit D7~D0 is defined as follows:
D7-D6: be fixed as ' 11 ', represent that this byte is address compression format words
D5: repetition byte direction word: ' 0 ' represents that byte to be copied is close to this format words, ' 1 ' represents that byte to be copied is from the 1st byte of previous address;
D4-D3: byte number to be copied, be 3 bytes to the maximum, if D4D3 is ' 00 ', there are two kinds of implications: when i D5 is ' 0 ', represent that byte to be copied is ' 00 '; When ii D5 is ' 1 ', represent that byte length to be copied is definite by the value of D2-D0;
D2-D0: the byte number (equaling D2D1D0+2) reducing, every format words reduces at most 9 bytes.
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JPH05110448A (en) * | 1991-10-16 | 1993-04-30 | Matsushita Electric Ind Co Ltd | Digital data compression, expansion method and its reproduction device |
CN101241508A (en) * | 2007-08-01 | 2008-08-13 | 金立 | Structured data sequence compression method |
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