CN103823506A - Real-time clock frequency correction device - Google Patents

Real-time clock frequency correction device Download PDF

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Publication number
CN103823506A
CN103823506A CN201310167217.7A CN201310167217A CN103823506A CN 103823506 A CN103823506 A CN 103823506A CN 201310167217 A CN201310167217 A CN 201310167217A CN 103823506 A CN103823506 A CN 103823506A
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mentioned
integer
real
time clock
clock frequency
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CN201310167217.7A
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杨至信
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Coretex Tech Corp
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Coretex Tech Corp
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Abstract

Disclosed is a real-time clock frequency correction device which comprises a quartz oscillator, a control unit, a multiplexer and a counter. The quartz oscillator outputs multiple oscillation impulses with a frequency. The control unit sets a first integer and a second integer according to the frequency, a first frequency corresponding to the first integer and a second frequency corresponding to the second integer, wherein the first integer is larger than a smallest integer of the frequency, and the second integer is smaller than a largest integer of the frequency. The multiplexer outputs the first integer with the first frequency and outputs the second integer with the second frequency. The counter is coupled to the multiplexer and the quartz oscillator, and counts the number of the oscillation impulses according to the received first integer or second integer so as to output one impulse.

Description

Real-time clock frequency correcting device
Technical field
The present invention has about the device of revising real-time clock frequency, particularly about the device of the adjacent two integer correction real-time clock frequencies in the front and back that utilize frequency.
Background technology
Real-time clock (real-time clock, RTC) be in order to calculate year, day, time, minute, second counter, it comprises a quartz (controlled) oscillator, one second counter, a minute counter, a hour counter, one day counter and 1 year counter, conventionally supposes that the frequency of quartz (controlled) oscillator output is 32768Hz.
The pulse of second rolling counters forward quartz (controlled) oscillator output, when the counting while arriving 32768 of counter second, exports a notification signal to minute counter; In the time that minute counter stored count reaches 60, minute counter is exported a notification signal to hour counter; In the time that hour counter stored counts reaches 24, hour counter is exported a notification signal to daily counter; When daily counter stored count reaches a default value, another day counter is exported a notification signal to a year counter.
Therefore, the frequency that the accuracy of this real-time clock is produced by quartz (controlled) oscillator determines, but the frequency that quartz (controlled) oscillator produces is easily subject to the impact of environment temperature and produces frequency drift, or because the relation of processing procedure, conventionally the frequency that quartz (controlled) oscillator produces have one between 20ppm and-deviation ratio of 20ppm, if the frequency that quartz (controlled) oscillator produces is inaccurate, the related time of causing real-time clock is also thereupon inaccurate.But real-time clock can use the precision of many different its times of correction mechanism correction, but method often not intuition is simple.
Summary of the invention
In view of this, the present invention proposes a kind of real-time clock frequency correcting device, comprising: a quartz (controlled) oscillator, and output one oscillator signal, above-mentioned oscillator signal has the multiple oscillating impulses with a frequency output; One control module, according to said frequencies set one first integer and one second integer, corresponding to one first number of above-mentioned the first integer and corresponding to one second number of above-mentioned the second integer, wherein above-mentioned the first integer is greater than a smallest positive integral of said frequencies, and above-mentioned the second integer is less than a maximum integer of said frequencies; One multiplexer, with above-mentioned above-mentioned the first integer of output of number for the first time and with above-mentioned the second integer of the above-mentioned output of number for the second time; And a counter, being coupled to above-mentioned multiplexer and above-mentioned quartz (controlled) oscillator, the number of counting above-mentioned oscillating impulse according to received above-mentioned the first integer or above-mentioned the second integer is exported a pulse.
Real-time clock frequency correcting device of the present invention, wherein the said frequencies of above-mentioned oscillator signal is obtained by a look-up table or a polynomial expression according to a temperature.
Real-time clock frequency correcting device of the present invention, wherein this frequency of above-mentioned oscillator signal has one first integral part and one first fraction part.
Real-time clock frequency correcting device of the present invention, also comprises one first buffer, in order to store a prearranged number.
Real-time clock frequency correcting device of the present invention, wherein above-mentioned control module is obtained a product according to above-mentioned prearranged number and above-mentioned the first fraction part, and set above-mentioned first number according to one second integral part of above-mentioned product, and according to above-mentioned second number of poor setting of above-mentioned prearranged number and above-mentioned the first integer.
Real-time clock frequency correcting device of the present invention, also comprises: a decimal digits control buffer, in order to store a decimal digits; One decimal buffer, in order to store above-mentioned the second integral part; And if wherein above-mentioned decimal digits with binary representation, above-mentioned prearranged number be above-mentioned decimal digits 2 power.
Real-time clock frequency correcting device of the present invention, also comprises: an integer buffer, in order to store one the 3rd integer, the default value that above-mentioned the 3rd integer is said frequencies; One integer error buffer, deducts the value of above-mentioned the 3rd integer in order to store above-mentioned the first integral part.
Accompanying drawing explanation
Fig. 1 shows according to the calcspar of the real-time clock frequency correcting device described in one embodiment of the invention.
Fig. 2 shows according to the oscillogram of the oscillator signal S described in one embodiment of the invention.
Fig. 3 shows the calcspar of described according to another embodiment of the present invention general real-time clock frequency correcting device.
Fig. 4 is according to one embodiment of the invention graphic extension prearranged number, first number and second number.
Being simply described as follows of symbol in accompanying drawing:
11: quartz (controlled) oscillator; 12: control module; 13: multiplexer; 14: counter; 15: the first buffers; 16: the second buffers; 17: prearranged number buffer; 18: pulse; 31: decimal digits control buffer; 32: decimal buffer; 33: integer buffer; 34: integer error buffer.
Embodiment
Fig. 1 shows according to the calcspar of the real-time clock frequency correcting device described in one embodiment of the invention.Comprise a quartz (controlled) oscillator 11, a control module 12, a multiplexer 13, a counter 14, the first buffer 15, the second buffer 16 and prearranged number buffer 17 according to the real-time clock frequency correcting device described in one embodiment of the invention.Quartz (controlled) oscillator 11 is exported an oscillator signal S, and this oscillator signal S has the multiple oscillating impulses with a frequency output.Fig. 2 shows according to the oscillogram of the oscillator signal S described in one embodiment of the invention.As shown in the figure, oscillator signal S has multiple oscillating impulse I, can be 32768Hz according to the frequency of this oscillator signal of one embodiment of the invention S, or near frequency 32768Hz.In addition, the frequency of 11 outputting oscillation signal S of quartz (controlled) oscillator can be drifted about because of the impact of environment temperature, for example, become 32766Hz etc. from 32768Hz.
Obtain after the frequency that quartz (controlled) oscillator 11 exports via control module 12, and be integral part and fraction part by this frequency separation of its above-mentioned oscillator signal.According to one embodiment of the invention, the frequency of oscillator signal S can be obtained by a look-up table or a polynomial expression according to temperature.
Control module 12 is according to frequency setting the first integer of oscillator signal S and the second integer and corresponding to first number of the first integer and second number corresponding to the second integer.Control module 12 is made as the smallest positive integral value of the frequency that is greater than oscillator signal S by the first integer and is stored in the first buffer 15, the second integer is made as to the max-int of the frequency that is less than oscillator signal S, in addition, the integral part of the frequency of oscillator signal S is made as to the second integer, and the second integer is stored in to the second buffer 16.Namely the first integer is greater than the second integer, and both differences are one.
Control module 12 is obtained a product according to the fraction part of the frequency of prearranged number and oscillator signal S, and sets first number according to the integral part of product, and according to second number of poor setting of prearranged number and the first integer.Therefore, first number is the first integer and is loaded into the number of times of counter 14; Same, second number is the number of times that the second integer is loaded into counter 14.First number and second number and be the prearranged number that is stored in prearranged number buffer 17.
Control module 12 is controlled multiplexer 13 with first number output the first integer and is exported the second integer to counter 14 with second number.Counter 14, is coupled to multiplexer 13 and quartz (controlled) oscillator 11, exports pulse 18 according to the number of received above-mentioned the first integer or above-mentioned the second integer counting oscillating impulse I.
For instance, suppose that the frequency that quartz (controlled) oscillator 11 is exported is 32767.46Hz, integral part is 32767, and therefore the second integer is that 32767, the first integers are 32768.The fraction part of frequency is 0.46, and this value will determine that the first integer and the second integer load the arrangement of the number of times (i.e. first number and second number) of counter 14.Take prearranged number as 10, the fraction part of frequency is take the product of prearranged number as 4.6(0.46 × 10=4.6), round numbers part 4 is made as number first time, therefore loading the second integer to second number of counter 14 is 6(10-4=6).Fig. 3 shows the calcspar of described according to another embodiment of the present invention general real-time clock frequency correcting device.According to another embodiment of the present invention, general real-time clock frequency correcting device, except the unit shown in Fig. 1, also comprises a decimal digits control buffer 31, a decimal buffer 32, an integer buffer 33 and an integer error buffer 34.Wherein decimal digits control buffer 31 is in order to store decimal digits n, according to one embodiment of the invention, for example decimal digits is with binary representation, and the decimal digits n that is stored in decimal digits control buffer 31 is 8, represent that prearranged number is 28 powers, 256 times.The fraction part of the frequency of prearranged number and oscillator signal S obtains product, and the integral part of this product is stored in to decimal buffer 32, is the first times N.
Integer buffer 33 is in order to store a default value C, and integer error buffer 34 is in order to store the integral part of frequency and the difference P of default value C of oscillator signal S.According to one embodiment of the invention, the frequency that for example quartz (controlled) oscillator 11 is exported is conventionally 32768Hz, thus conventionally default value C is made as to 32768, but the frequency of actual oscillator signal S is 32766.46Hz, therefore difference P is 32766-32768=-2.Wherein, the complement representation that sign can 2.
According to one embodiment of the invention, general real-time clock frequency correcting device is described.For instance, quartz (controlled) oscillator 11 is exported an oscillator signal S, and to obtain frequency via control module 12 be 32767.46Hz, and be divided into integral part and fraction part.Be 32768 owing to being stored in the default value of integer buffer 33, should be-1 so be stored in the difference P of integer error buffer 34, therefore the second integer M that is stored in the second buffer 16 is 32767, and the first integer (M+1) that is stored in the first buffer 15 is 32768.
Moreover the decimal digits n that is stored in decimal digits control buffer 31 is 8, and with binary representation, represent that prearranged number is 256.Fig. 4 is according to one embodiment of the invention graphic extension prearranged number, first number and second number.Namely, in two continuous integral numbers (32767 and 32768) of the most close frequency, be divided into 256 intervals.Then, according to the fraction part of the frequency of prearranged number and oscillator signal S, getting a product is 0.46 × 256=117.76, and its integral part 117 is the first times N, represents that the first integer (M+1) need be written into the number of times of counter 14.Prearranged number and the first times N differ from 139, be stored in the second war storage 16 and be second number, represent that the second integer M is written into the number of times of counter 14.The frequency of oscillator signal S can be represented by following formula:
32767.46 ≅ [ 32767 × ( 256 - 117 ) + 32768 × 117 ] / 256 - - - ( 1 )
Therefore the time, adding up at the counter 14 of 256 times is:
[32767.4632767×(256-117)+32767.4632768×117]=256.0000233
(2)
If with the divisor (32768) of fixing, the time of identical 256 accumulations is:
32767.46332768×256=255.9957813 (3)
The disclosed real-time clock frequency of embodiments of the invention correcting device can produce real-time clock frequency accurately in mode simple, intuition, and as known in the result of formula 2 and formula 3, after the disclosed real-time clock frequency of embodiments of the invention correcting device frequency of amendment, really can be compensated accurately.
Simultaneously, buffer referred in this, comprise all computer-readable storage mediums, and " computer-readable storage medium " can be any medium, it can hold, stores or maintain logical OR application described herein, to provide this instruction execution system to use or to link.Computer-readable medium can comprise arbitrary essence medium, as magnetic, light or semiconductor media.The embodiment of computer-readable medium includes, but are not limited to more specifically, tape, floppy discs, hard disk, storage card, solid state hard disc, USB flash memory or CD.
Meanwhile, computer-readable medium can be random access memory (RAM), and it comprises as static random access memory (SRAM), DRAM (Dynamic Random Access Memory) (DRAM) or magnetic RAM (MRAM).In addition, computer-readable medium can be ROM (read-only memory) (ROM), can program ROM (read-only memory) (PROM), EPROM (EPROM), the electronics formula of erasing can make carbon copies the memory device of ROM (read-only memory) (EEPROM) or other form.
The foregoing is only preferred embodiment of the present invention; so it is not in order to limit scope of the present invention; anyone familiar with this technology; without departing from the spirit and scope of the present invention; can do on this basis further improvement and variation, therefore protection scope of the present invention is when being as the criterion with the application's the scope that claims were defined.

Claims (7)

1. a real-time clock frequency correcting device, is characterized in that, comprising:
One quartz (controlled) oscillator, output one oscillator signal, above-mentioned oscillator signal has the multiple oscillating impulses with a frequency output;
One control module, according to said frequencies set one first integer and one second integer, corresponding to one first number of above-mentioned the first integer and corresponding to one second number of above-mentioned the second integer, wherein above-mentioned the first integer is greater than a smallest positive integral of said frequencies, and above-mentioned the second integer is less than a maximum integer of said frequencies;
One multiplexer, with above-mentioned above-mentioned the first integer of output of number for the first time and with above-mentioned the second integer of the above-mentioned output of number for the second time; And
One counter, is coupled to above-mentioned multiplexer and above-mentioned quartz (controlled) oscillator, and the number of counting above-mentioned oscillating impulse according to received above-mentioned the first integer or above-mentioned the second integer is exported a pulse.
2. real-time clock frequency correcting device according to claim 1, is characterized in that, the said frequencies of above-mentioned oscillator signal is obtained by a look-up table or a polynomial expression according to a temperature.
3. real-time clock frequency correcting device according to claim 1, is characterized in that, this frequency of above-mentioned oscillator signal has one first integral part and one first fraction part.
4. real-time clock frequency correcting device according to claim 3, is characterized in that, also comprises one first buffer, in order to store a prearranged number.
5. real-time clock frequency correcting device according to claim 4, it is characterized in that, above-mentioned control module is obtained a product according to above-mentioned prearranged number and above-mentioned the first fraction part, and set above-mentioned first number according to one second integral part of above-mentioned product, and according to above-mentioned second number of poor setting of above-mentioned prearranged number and above-mentioned the first integer.
6. real-time clock frequency correcting device according to claim 5, is characterized in that, also comprises:
One decimal digits control buffer, in order to store a decimal digits;
One decimal buffer, in order to store above-mentioned the second integral part; And
If wherein above-mentioned decimal digits is with binary representation, above-mentioned prearranged number be above-mentioned decimal digits 2 power.
7. real-time clock frequency correcting device according to claim 3, is characterized in that, also comprises:
One integer buffer, in order to store one the 3rd integer, the default value that above-mentioned the 3rd integer is said frequencies;
One integer error buffer, deducts the value of above-mentioned the 3rd integer in order to store above-mentioned the first integral part.
CN201310167217.7A 2012-11-16 2013-05-08 Real-time clock frequency correction device Pending CN103823506A (en)

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CN201220610602.5 2012-11-16
CN201310167217.7A CN103823506A (en) 2012-11-16 2013-05-08 Real-time clock frequency correction device

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105591632A (en) * 2014-10-22 2016-05-18 上海东软载波微电子有限公司 Real-time clock generation method and apparatus
CN111429711A (en) * 2020-04-01 2020-07-17 深圳盈特创智能科技有限公司 Infrared receiving method and device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10325888A (en) * 1997-05-26 1998-12-08 Ricoh Co Ltd Real-time clock and time correction method
JP2001228932A (en) * 2000-02-15 2001-08-24 Ricoh Co Ltd Real-time clock device
CN1707464A (en) * 2005-03-17 2005-12-14 联想(北京)有限公司 Embedded safety ship of real-time clock and method for correcting real-time clock thereof
CN101030777A (en) * 2006-03-02 2007-09-05 中颖电子(上海)有限公司 Apparatus and method for calibrating realtime clock source
CN202256438U (en) * 2011-08-02 2012-05-30 珠海中慧微电子有限公司 Hardware real time clock (RTC) error compensation system of intelligent electric energy meter

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10325888A (en) * 1997-05-26 1998-12-08 Ricoh Co Ltd Real-time clock and time correction method
JP2001228932A (en) * 2000-02-15 2001-08-24 Ricoh Co Ltd Real-time clock device
CN1707464A (en) * 2005-03-17 2005-12-14 联想(北京)有限公司 Embedded safety ship of real-time clock and method for correcting real-time clock thereof
CN101030777A (en) * 2006-03-02 2007-09-05 中颖电子(上海)有限公司 Apparatus and method for calibrating realtime clock source
CN202256438U (en) * 2011-08-02 2012-05-30 珠海中慧微电子有限公司 Hardware real time clock (RTC) error compensation system of intelligent electric energy meter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105591632A (en) * 2014-10-22 2016-05-18 上海东软载波微电子有限公司 Real-time clock generation method and apparatus
CN105591632B (en) * 2014-10-22 2018-04-17 上海东软载波微电子有限公司 Real-time clock generation method and device
CN111429711A (en) * 2020-04-01 2020-07-17 深圳盈特创智能科技有限公司 Infrared receiving method and device

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Application publication date: 20140528