CN103779480A - 用于使用液体模塑技术制造led组件的方法和装置 - Google Patents
用于使用液体模塑技术制造led组件的方法和装置 Download PDFInfo
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- CN103779480A CN103779480A CN201310645805.7A CN201310645805A CN103779480A CN 103779480 A CN103779480 A CN 103779480A CN 201310645805 A CN201310645805 A CN 201310645805A CN 103779480 A CN103779480 A CN 103779480A
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- isolator structure
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Abstract
一种用于制造LED的方法和***,包括使用液体转移模具在整块硅晶片上同时形成多个隔离体结构,在每个隔离体结构内部将裸片附着到硅晶片,执行焊剂回流,清除焊剂,执行接线键合,分配荧光物,固化荧光物,通过使用液体转移模具在所有隔离体结构上同时形成圆顶结构,安装晶片,以及使用锯以用于单个或多个LED单片化。
Description
技术领域
本发明涉及电子器件组件。更特别地,本发明涉及LED组件。
背景技术
传统的LED组装工艺执行隔离体(dam)附着或分配(dispense)隔离体环氧树脂(epoxy)粘合剂并在随后进行固化,以及在从整块硅晶片单片化的单个硅芯片上形成圆顶。由于需对每个芯片重复地执行上述工艺,因而这种工艺导致了较高的制造/组装成本、较低的吞吐量、较低的产量、以及较低的定位精确度。结果,在这种工艺中需要更多的机器,且该传统LED组装工艺中涉及更多检查和控制步骤。
在下文中描述传统LED组装工艺。图1示出了传统LED组装工艺的工艺流程100。在步骤102中,由整块硅晶片形成单片化的硅面板。在步骤104中,将裸片附着至单片化的硅面板。在步骤106中,执行焊剂回流。在步骤108中,执行焊剂清除。在步骤110中,进行接线键合。在步骤112中,将隔离体附着至基底或分配隔离体环氧树脂。在步骤114中,执行隔离体固化工艺。在步骤116中,将荧光物分配在隔离体中。在步骤118中,固化分配在隔离体中的荧光物。随后,形成圆顶以包封LED部件。在步骤120中,分配用于形成圆顶的材料。在步骤122中,执行圆顶固化的步骤。在步骤124中,将具有LED单元的带状面板安装在基底上。在步骤126中,执行锯割单片化以制造单体芯片。
发明内容
公开了用于改进LED组装工艺的方法和装置。在一些实施例中,使用液体模塑技术(同时形成多个隔离体和圆顶)来替换传统LED组装工艺中的单个隔离体附着和单个圆顶分配步骤。在一些实施例中,在组装工艺中使用整块硅晶片,来替代传统LED组装工艺中使用的小硅面板。
一方面,一种制造LED的方法,包括在硅晶片上形成多个隔离体结构、将多个裸片耦合在硅晶片上、向多个隔离体结构中的一个或多个隔离体结构添加荧光物、固化荧光物以及包封荧光物。在一些实施例中,硅晶片包括整块硅晶片(例如,未切分的晶片薄片)。在其它实施例中,该方法包括使用液体模塑。在一些其它实施例中,形成多个隔离体结构的步骤包括使用液体模塑。在一些实施例中,包封荧光物的步骤包括使用液体模塑。在其它实施例中,包封荧光物的步骤包括在隔离体结构中的至少一个隔离体结构上形成一个或多个圆顶结构。在一些其它实施例中,该方法进一步包括在包封荧光物的步骤之后进行单片化。在一些实施例中,该方法包括在硅晶片上同时形成多个隔离体结构。在其它实施例中,该方法进一步包括在硅晶片上同时形成多个圆顶结构。在一些实施例中,该方法进一步包括在形成多个隔离体结构之后将硅晶片切割为一个或多个带体。
另一方面,一种发光装置,包括在硅晶片上的LED单元阵列、在LED单元中的每个LED单元上的隔离体结构、在隔离体结构中包含的荧光物以及覆盖隔离体结构的盖体。在一些实施例中,硅晶片包括整片硅晶片。在其它实施例中,阵列包括至少20个LED单元。在一些其它实施例中,盖体包括圆顶结构。在一些实施例中,盖体包封荧光物。在其它实施例中,硅晶片通过液体转移模具进行包封。
另一方面,一种制造LED的方法,包括使用液体转移模具在硅晶片上同时形成多个隔离体结构的阵列、将一个或多个LED裸片耦合至隔离体结构、将接线耦合至LED裸片、添加荧光物以被包含在隔离体结构内、以及使用液体转移模具在每个隔离体结构上同时形成圆顶结构。在一些实施例中,该方法进一步包括进行单片化。在其它实施例中,通过锯执行单片化步骤。在一些其它实施例中,该方法进一步包括在硅晶片上形成多个LED光单元的阵列。在一些实施例中,硅晶片包括整块硅晶片。
另一方面,一种制造LED的方法,包括使用第一液体模塑在整块硅晶片上同时形成多个隔离体结构、将至少一个裸片附着至多个隔离体结构中的每个隔离体结构、执行焊剂回流、执行焊剂清除、执行接线键合、在接线键合后分配荧光物、固化分配的荧光物、使用第二液体转移模塑在多个隔离体结构中的每个隔离体结构上形成圆顶结构、安装整块硅晶片以及通过锯进行单片化。
通过阅读下文对实施例的详细描述,本发明的其它特征和优点将更加明显。
附图的简要说明
并入说明书并构成说明书一部分的附图示出了本发明的实施例,其与说明书一起,用于解释本发明的原理,但不旨在将本发明限制为所公开的实施例。
图1是示出传统LED组装工艺的流程图。
图2是示出根据本发明一些实施例的LED组装工艺的流程图。
图3A-3F示出根据本发明一些实施例的LED组装工艺的各个部分。
图3A示出根据本发明一些实施例的隔离体形成工艺。
图3B示出根据本发明一些实施例的裸片附着工艺。
图3C示出根据本发明一些实施例的接线键合工艺。
图3D示出根据本发明一些实施例的荧光物分配工艺。
图3E示出根据本发明一些实施例的圆顶形成工艺
图3F示出根据本发明一些实施例的单片化工艺。
参考上述多篇附图描述了本发明。适当地,仅当相同的元件在超过一篇附图中被公开或示出时,使用相同的附图标记来标识该相同的元件。
具体实施例
现在详细地参考本发明的LED组装方法和设备的实施例,附图中示出这些实施例的示例。下文将结合这些实施例来描述本发明,可以理解,并不旨在将本发明限制为这些实施例和示例。相反,本发明旨在覆盖包含在由所附权利要求书定义的本发明的精神和范围内的变型、修改以及等同体。此外,在下文对本发明的具体说明中,阐述了多个特定的细节以更加详尽地阐述本发明。然而,对于获知所公开内容教导的本领域普通技术人员,可在没有这些特定细节的情况下实践本发明是显而易见的。在其它实例中,并未详细地描述已知的方法和步骤、器件以及工艺,以免不必要地模糊本发明的各个方面。显然地,可以理解,在任意实际实施的开发中,为了获得开发者的特定目的而必须做出许多实施特定的决定,例如服从与应用和商业相关的规定,并且这些特定目的对于不同的实施方式和不同的开发者而言将是不同的。此外,可以理解,这种开发努力可能是复杂和耗时的,但仍然是获知本发明教导的本领域普通技术人员的常规设计。
本文公开了用于改进LED组装工艺的方法和装置。在一些实施例中,使用液体模塑技术来替换传统LED组装工艺中的单个隔离体附着和单个圆顶分配,从而可以在LED光芯片组装工艺中提供较低的组装制造成本、具有更好的产量的较高的生产率。
下文中,附图2是示出了根据本发明一些实施例的LED组装工艺200的流程图。在步骤202中,制备整块硅晶片。根据例如制造单晶硅晶片的传统工艺来制备该整块硅晶片。在步骤204中,使用液体模塑来在整块硅晶片上形成隔离体。在步骤206中,在隔离体以内将一个多个裸片附着到基底。在步骤208中,执行焊剂回流步骤。在步骤210中,从晶片清除焊剂。在步骤212中,将接线键合至基底。在步骤214中,将荧光物分配到隔离体中。在步骤216中,固化分配的荧光物。在步骤218中,执行液体模塑工艺以使每个待包封的隔离体结构变为圆顶结构。在步骤220中,安装整块硅晶片以用于锯切单片化工艺。在步骤222中,执行锯切单片化工艺以制造单片化的单个LED芯片/单元。下文中,随后示出用于实施工艺200的设备。
图3A-3F示出了根据本发明一些实施例的LED组装工艺300。参考附图3A,根据本发明一些实施例,示出了隔离体形成工艺。工艺300可以从制备基底302开始,诸如硅基底或硅晶片。基底302包括一个或多个LED晶格单元304。单元晶格304可以以阵列的方式布置在基底上以最大化基底302上晶格的数量。本领域技术人员可以理解,晶格的任何其它图案或布置是可行的。电极308被图案化在基底302上。电极308可以包括用于与电源耦合以提供使LED(发光二极管)发光的电压偏置的连接器。可在每个单元晶格304上形成一个隔离体结构316作为用于容纳/限制随后步骤中分配的荧光物的侧壁。本领域普通技术人员可以理解,隔离体的壁的形状、高度以及厚度都是可变的。在一些实施例中,隔离体结构316的壁的内部部分形成具有平坦底部的碗状结构。可在每个单元晶格304上形成隔离体结构316。
在一些实施例中,可使用液体转移模具310形成隔离体结构316。液体转移模具可包括顶模具312和底模具314。顶模具312和底模具314可压在一起,从而使用与隔离体结构互补的模具内结构来同时形成多个隔离体结构316。底模具314可以具有用于合适配合基底晶片302的空腔或孔。顶模具312可以包含能够成型并形成多个隔离体结构316的模具结构。表面318(顶模具312的底侧)包括能够同时形成多个隔离体结构316的图案322。可在图案322上的多个空腔320上注入/散布/施加液体模塑材料(例如聚合物),从而可以形成多个隔离体结构316。在一些实施例中,每个晶格单元304包括在基底302上形成的隔离体结构316。
参考附图3B,根据本发明一些实施例,描述了裸片附着工艺。在基底晶片302上选择的位置上,将LED箱(bin)401附着至晶格单元304。在一些实施例中,通过使用粘合剂裸片附着工艺来执行裸片附着。在一些其它实施例中,通过使用共熔附着工艺来执行裸片附着。
参考附图3C,根据本发明一些实施例,描述了接线键合工艺500。在一些实施例中,在每个单元晶格304上使用金接线502将LED裸片键合至基底晶片302。在一些实施例中,可使用本领域普通技术人员已知的传统接线键合工艺来执行接线键合。
参考附图3D,根据本发明一些实施例,描述了荧光物分配工艺600。通过荧光物分配装置602来分配荧光物604。在隔离体结构316中分配的荧光物604被限制在隔离体结构316内。
参考附图3E,根据本发明一些实施例,描述了圆顶形成工艺700。在分配荧光物后,形成圆顶704来包封包含有分配在隔离体结构中的荧光物的结构702。可以使用液体转移模塑706来执行圆顶704形成工艺700。
参考附图3F,根据本发明一些实施例,描述了单片化工艺800。在台802上安装组装有LED的基底晶片302,以通过切割装置804(诸如锯)进行切割。在分离工艺800后,形成单个LED单元806。
本文描述的LED组装工艺和装置具有超越传统LED组装工艺的多个有利方面。例如,本文所公开的在整块硅晶片上执行的组装工艺与在小面板形状上执行的传统工艺相比,更加有效。此外,本文公开的液体转移模塑工艺可以增强隔离体和圆顶定位的精确性,从而使用本文公开的方法的LED组装的部件与硅基底之间具有更好的粘附力。在相同的测试条件下,与使用单个隔离体附着和单个片化分配工艺的传统工艺相比,生产速率(单元/小时,UPH)提高了四倍。
在本文公开的工艺中使用液体转移模塑还提供了许多有利的方面。例如,本文公开的液体转移模塑工艺能够在硅晶片上同时制造多个/阵列的隔离体和圆顶,这具有较高的尺寸准确度和精密度。在一些实施例中,使用本文公开的工艺的定位和尺寸准确度可达到±10微米的范围内。相反,在传统LED组装工艺中,准确度和精密度仅在±250微米的范围内。此外,使用液体模塑工艺,可省略许多不必要的细装工艺步骤。充分使用晶片和机箱有许多有利的方面。例如,可获得较低的组装成本。
本文公开的工艺和装置可用于制造LED和半导体器件。在操作中,可批量模式地进行制造/组装工艺,从而可消除在每单个LED上的制造工艺的重复。
上文描述了本发明的特定实施例,其中并入了便于理解构造原理和本发明操作的细节。关于各个模块及它们之间的互连关系所示出的特定配置仅是示例性的。这里参考特定实施例及其细节并不是要限制所附的权利要求书的范围。对本领域技术人员而言,在不背离本发明精神和范围的情况下,可对选择示出的实施例进行修改。
Claims (20)
1.一种制造LED组件的方法,包括:
a.在整块硅晶片上形成多个隔离体结构;
b.在所述隔离体结构中的每个隔离体结构内,将多个LED裸片耦合在所述硅晶片上;
c.向所述多个隔离体结构添加荧光物;
d.固化所述荧光物;以及
e.包封所述荧光物。
2.如权利要求1所述的方法,进一步包括使用液体模塑模具。
3.如权利要求1所述的方法,其中,所述形成多个隔离体结构包括使用液体模塑模具。
4.如权利要求1所述的方法,其中,所述包封所述荧光物包括使用液体模塑模具。
5.如权利要求1所述的方法,其中,所述包封所述荧光物包括在所述多个隔离体结构上形成一个或多个圆顶结构。
6.如权利要求1所述的方法,进一步包括在所述包封所述荧光物之后进行单片化。
7.如权利要求1所述的方法,进一步包括在所述硅晶片上同时形成所述多个隔离体结构。
8.如权利要求1所述的方法,进一步包括在所述硅晶片上同时形成多个圆顶结构。
9.如权利要求1所述的方法,进一步包括在所述形成多个隔离体结构之后,将所述硅晶片切割为一个或多个带体。
10.一种发光装置,包括:
a.在整块硅晶片上的LED单元阵列;
b.围绕所述LED单元中的每个LED单元的隔离体结构;
c.在所述隔离体结构中包含的荧光物;以及
d.覆盖所述隔离体结构的盖体。
11.如权利要求10所述的发光装置,其中所述阵列包括至少20个LED单元。
12.如权利要求10所述的发光装置,其中所述盖体包括圆顶结构。
13.如权利要求10所述的发光装置,其中所述盖体包封所述荧光物。
14.如权利要求10所述的发光装置,其中通过液体转移模具包封所述硅晶片。
15.一种制造LED的方法,包括:
a.使用液体转移模具在硅晶片上同时形成多个隔离体结构的阵列;
b.将一个或多个LED裸片耦合至所述多个隔离体结构;
c.将接线键合至所述LED裸片;
d.添加被包含在所述隔离体结构内的荧光物;以及
e.使用液体转移模具在所述隔离体结构中的每个隔离体结构上形成圆顶结构。
16.如权利要求15所述的方法,进一步包括单片化。
17.如权利要求16所述的方法,其中通过锯执行所述单片化。
18.如权利要求15所述的方法,进一步包括在所述硅晶片上形成多个LED光单元的阵列。
19.如权利要求15所述的方法,其中所述接线包括金接线。
20.一种制造LED的方法,包括:
a.使用第一液体模塑在整块硅晶片上同时形成多个隔离体结构;
b.将至少一个裸片附着至所述多个隔离体结构中的每个隔离体结构;
c.执行焊剂回流;
d.执行焊剂清除;
e.执行接线键合;
f.在接线键合后分配荧光物;
g.固化分配的所述荧光物;
h.使用第二液体模塑在所述多个隔离体结构中的每个隔离体结构上同时形成圆顶结构;
i.安装所述整块硅晶片;以及
j.通过锯进行单片化。
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Cited By (2)
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US9499921B2 (en) | 2012-07-30 | 2016-11-22 | Rayton Solar Inc. | Float zone silicon wafer manufacturing system and related process |
US9209046B2 (en) * | 2013-10-02 | 2015-12-08 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device and manufacturing method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010042865A1 (en) * | 1997-01-15 | 2001-11-22 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device and its manufacturing method |
CN102456781A (zh) * | 2010-10-21 | 2012-05-16 | 旭明光电股份有限公司 | 发光二极管封装及其制造方法 |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE36414E (en) | 1992-04-03 | 1999-11-30 | Sportlite, Inc. | Lighting apparatus |
CN1464953A (zh) * | 2001-08-09 | 2003-12-31 | 松下电器产业株式会社 | Led照明装置和卡型led照明光源 |
US6882111B2 (en) | 2003-07-09 | 2005-04-19 | Tir Systems Ltd. | Strip lighting system incorporating light emitting devices |
US9198237B2 (en) | 2004-02-25 | 2015-11-24 | Lynk Labs, Inc. | LED lighting system |
US7688280B2 (en) | 2004-05-18 | 2010-03-30 | Lightwild, L.C. | Expanded bit map display for mounting on a building surface and a method of creating same |
US7858408B2 (en) * | 2004-11-15 | 2010-12-28 | Koninklijke Philips Electronics N.V. | LED with phosphor tile and overmolded phosphor in lens |
KR100587017B1 (ko) * | 2005-02-23 | 2006-06-08 | 삼성전기주식회사 | 발광 다이오드 패키지 및 그 제조 방법 |
US8878219B2 (en) * | 2008-01-11 | 2014-11-04 | Cree, Inc. | Flip-chip phosphor coating method and devices fabricated utilizing method |
JP5094802B2 (ja) * | 2008-09-26 | 2012-12-12 | シャープ株式会社 | 光学素子ウエハの製造方法 |
JP2010123620A (ja) * | 2008-11-17 | 2010-06-03 | Stanley Electric Co Ltd | 半導体装置の製造方法 |
US8227269B2 (en) * | 2009-05-19 | 2012-07-24 | Intematix Corporation | Manufacture of light emitting devices with phosphor wavelength conversion |
US8597963B2 (en) * | 2009-05-19 | 2013-12-03 | Intematix Corporation | Manufacture of light emitting devices with phosphor wavelength conversion |
US8440500B2 (en) * | 2009-05-20 | 2013-05-14 | Interlight Optotech Corporation | Light emitting device |
US8097894B2 (en) * | 2009-07-23 | 2012-01-17 | Koninklijke Philips Electronics N.V. | LED with molded reflective sidewall coating |
CA2786119A1 (en) | 2009-12-30 | 2011-07-07 | Lumenpulse Lighting Inc. | High powered light emitting diode lighting unit |
JP2011199066A (ja) * | 2010-03-19 | 2011-10-06 | Seiko Instruments Inc | 発光部品、発光器及び発光部品の製造方法 |
CN101937962A (zh) * | 2010-07-30 | 2011-01-05 | 晶科电子(广州)有限公司 | 一种led封装结构及其封装方法 |
JP2012054270A (ja) * | 2010-08-31 | 2012-03-15 | Toyoda Gosei Co Ltd | 発光装置の製造方法 |
JP5276217B2 (ja) | 2010-10-22 | 2013-08-28 | パナソニック株式会社 | ランプ及び照明装置 |
US8486724B2 (en) * | 2010-10-22 | 2013-07-16 | Tsmc Solid State Lighting Ltd. | Wafer level reflector for LED packaging |
CN102130235B (zh) * | 2010-12-31 | 2012-12-26 | 深圳中景科创光电科技有限公司 | 一种led芯片的封装方法及封装器件 |
KR20120091839A (ko) * | 2011-02-10 | 2012-08-20 | 삼성전자주식회사 | 플립칩 발광소자 패키지 및 그 제조 방법 |
CN102738373B (zh) * | 2011-04-11 | 2014-11-05 | 展晶科技(深圳)有限公司 | 发光二极管封装结构及其制造方法 |
US8678611B2 (en) | 2011-08-25 | 2014-03-25 | Gt Biomescilt Light Limited | Light emitting diode lamp with light diffusing structure |
-
2012
- 2012-10-25 US US13/660,893 patent/US9041019B2/en active Active
-
2013
- 2013-10-24 CN CN201310645805.7A patent/CN103779480B/zh not_active Expired - Fee Related
- 2013-10-25 EP EP19195705.9A patent/EP3608978A1/en not_active Ceased
- 2013-10-25 EP EP13190235.5A patent/EP2725631B1/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010042865A1 (en) * | 1997-01-15 | 2001-11-22 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device and its manufacturing method |
CN102456781A (zh) * | 2010-10-21 | 2012-05-16 | 旭明光电股份有限公司 | 发光二极管封装及其制造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107470091A (zh) * | 2017-09-14 | 2017-12-15 | 深圳市鑫龙邦科技有限公司 | 一种led cob围坝点胶一体机及其实现方法 |
CN107470091B (zh) * | 2017-09-14 | 2022-10-04 | 深圳市鑫龙邦科技有限公司 | 一种led cob围坝点胶一体机及其实现方法 |
CN111148338A (zh) * | 2018-11-01 | 2020-05-12 | 邱昱维 | 在布局有电路的陶瓷基板上成形环绕壁的方法及该基板 |
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EP3608978A1 (en) | 2020-02-12 |
EP2725631B1 (en) | 2020-08-26 |
CN103779480B (zh) | 2018-05-22 |
US20140117384A1 (en) | 2014-05-01 |
EP2725631A1 (en) | 2014-04-30 |
US9041019B2 (en) | 2015-05-26 |
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