CN103716049A - Bias-current generating circuit - Google Patents
Bias-current generating circuit Download PDFInfo
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- CN103716049A CN103716049A CN201310746682.6A CN201310746682A CN103716049A CN 103716049 A CN103716049 A CN 103716049A CN 201310746682 A CN201310746682 A CN 201310746682A CN 103716049 A CN103716049 A CN 103716049A
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- operational amplifier
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Abstract
The invention provides a bias-current generating circuit. The bias-current generating circuit comprises a current-steering DAC circuit, a current buffer circuit and an auxiliary circuit, wherein the current buffer circuit is used for buffering current output by the current-steering DAC circuit and outputting bias current; the input end of the auxiliary circuit is connected to the two output ends of the current-steering DAC circuit, and voltages across the two output ends are set to be roughly equal; the output end of the auxiliary circuit is connected to one voltage bias end of the current buffer circuit. According to the bias-current generating circuit, the bias of a current buffer is dynamically changed by utilizing the auxiliary circuit, and therefore the establishment speed of the output current of the current-steering DAC circuit is increased.
Description
Technical field
The present invention relates to electronic circuit, particularly a kind of current steering DAC circuit of Single-end output.
Background technology
Current steering DAC circuit is commonly used to produce single-ended adjustable current as the biasing of other circuit module.In some application scenario, in the laser tube drive circuit such as optical communication circuit, not only need current steering DAC circuit to produce adjustable current as biasing, also need the adjustable current of its generation as modulation signal.This electric current that just needs DAC to produce can change in time rapidly.Due to the requirement of coupling, in DAC, the area of the pipe of generation current is larger, and the impact of its parasitic capacitance is comparatively obvious, has limited the Rapid Establishment of DAC output signal.Particularly serious in the current steering DAC circuit that this phenomenon forms at single tube current source.
Summary of the invention
In order to solve the technical problem that the output current of current steering DAC circuit in prior art can not Rapid Establishment, the invention provides a kind of bias current generative circuit, comprise that current steering DAC circuit and the electric current that described current steering DAC circuit is exported cushion and export the current buffering circuit of described bias current, also comprise auxiliary circuit, the input of described auxiliary circuit is connected to two outputs of described current steering DAC circuit, and the voltage that is configured so that described two outputs about equally, the output of described auxiliary circuit is connected to a voltage bias end of described current buffering circuit.
Further, described auxiliary circuit comprises operational amplifier, and two inputs of described operational amplifier are connected with two outputs of described current steering DAC circuit respectively.
Alternatively, described current buffering circuit comprises the first triode and the second triode, and the base stage of described the first triode is connected with the output of described operational amplifier; The base stage of described the second triode is connected with predetermined bias voltage source.
Alternatively, described current buffering circuit comprises the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, and the grid of described the first metal-oxide-semiconductor is connected with the output of described operational amplifier; The grid of described the second metal-oxide-semiconductor is connected with predetermined bias voltage source.
Further, described current steering DAC circuit comprises data input pin, positive current output terminal and negative-phase sequence curent output, described positive current output terminal is connected with the first input end of described operational amplifier, and described negative-phase sequence curent output is connected with the second input of described operational amplifier.
Preferably, the first input end of described operational amplifier is inverting input, and the second input of described operational amplifier is normal phase input end.
Bias current generative circuit of the present invention, connects auxiliary circuit by the output at current steering DAC circuit, makes bias current generative circuit can set up rapidly output current.
Accompanying drawing explanation
Fig. 1 is the schematic circuit of existing bias current generative circuit;
Fig. 2 is that the voltage of A node and B node in Fig. 1 is with the changing trend diagram of the input data of current steering DAC circuit;
Fig. 3 is the schematic circuit preferred embodiment of bias current generative circuit of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, bias current generative circuit of the present invention is described in further detail, but not as a limitation of the invention.
Fig. 1 is the schematic circuit of biasing circuit generative circuit in prior art, and this circuit comprises current steering DAC circuit and the output current of current steering DAC circuit is cushioned to the also current buffering circuit of output offset electric current.The input data D of current steering DAC circuit
inthe current source of controlling DAC inside switches between two difference current output P, N.Current buffering circuit comprises the first triode Q
1with the second triode Q
2, Q
1and Q
2base stage connect identical bigoted voltage source V b.
The first triode Q
1emitter be connected with the positive current output terminal P of current steering DAC circuit, its collector electrode connects the circuit module that is biased/modulates.The second triode Q
2emitter be connected with the negative-phase sequence curent output N of current steering DAC circuit, it is floating empty that its collector electrode keeps.The electric current of the P end output of current steering DAC circuit is through Q
1after buffering, be used for the circuit module that is biased of biasing, or as modulation signal, the signal in modulated module modulated.The output of N end is in order to hold output matching just through Q with P
2cushion, there is no use.
In this execution mode, the triode in current buffering circuit also can replace with metal-oxide-semiconductor.
V due to triode
bEwith I
cexponential relationship (if metal-oxide-semiconductor is V
gSwith I
dquadratic relationship), in Fig. 1, the voltage of node A, B can be along with the input data D of DAC
inand change, the trend of its variation as shown in Figure 2, at D
inwhen minimum and maximum, the voltage difference of node A and Node B reaches maximum.
Because a DAC internal current source part outputs to node A, another part outputs to Node B, so the inner respective current sources output of DAC parasitic capacitance C
pthe voltage at two ends is respectively V
aand V
b.Work as D
induring variation, just have current source and switch between two outputs of DAC, this current source output parasitic capacitance C
pcan be first by current source charge or discharge, after experience voltage jump, DAC output could be stablized, and has reduced the speed of setting up of DAC output.This phenomenon, at D
inthe most serious in the time of maximum or minimum.
Fig. 3 is the schematic circuit preferred embodiment of bias current generative circuit of the present invention.This circuit also comprises the auxiliary circuit for the output current of Rapid Establishment current steering DAC circuit, this auxiliary circuit comprises operational amplifier, two inputs of operational amplifier are connected with two outputs of current steering DAC circuit respectively, and its output is connected to the Q of current buffering circuit
1base stage.
Add after the auxiliary circuit of output current Rapid Establishment, operational amplifier wherein can be so that the voltage approximately equal of A, two nodes of B need to C thereby do not exist DAC output to set up before
ptherefore the process of charge and discharge, can improve the speed of setting up of DAC output signal.
Above embodiment is only illustrative embodiments of the present invention, can not be for limiting the present invention, and protection scope of the present invention is defined by the claims.Those skilled in the art can make various modifications or be equal to replacement the present invention in essence of the present invention and protection range, these modifications or be equal to replacement and also should be considered as dropping in protection scope of the present invention.
Claims (6)
1. a bias current generative circuit, comprise that current steering DAC circuit and the electric current that described current steering DAC circuit is exported cushion and export the current buffering circuit of described bias current, it is characterized in that, also comprise auxiliary circuit, the input of described auxiliary circuit is connected to two outputs of described current steering DAC circuit, and the voltage that is configured so that described two outputs about equally, the output of described auxiliary circuit is connected to a voltage bias end of described current buffering circuit.
2. bias current generative circuit according to claim 1, is characterized in that, described auxiliary circuit comprises operational amplifier, and two inputs of described operational amplifier are connected with two outputs of described current steering DAC circuit respectively.
3. bias current generative circuit according to claim 2, is characterized in that, described current buffering circuit comprises the first triode and the second triode,
The base stage of described the first triode is connected with the output of described operational amplifier;
The base stage of described the second triode is connected with predetermined bias voltage source.
4. bias current generative circuit according to claim 2, is characterized in that, described current buffering circuit comprises the first metal-oxide-semiconductor and the second metal-oxide-semiconductor,
The grid of described the first metal-oxide-semiconductor is connected with the output of described operational amplifier;
The grid of described the second metal-oxide-semiconductor is connected with predetermined bias voltage source.
5. according to the bias current generative circuit described in claim 3 or 4, it is characterized in that, described current steering DAC circuit comprises data input pin, positive current output terminal and negative-phase sequence curent output, described positive current output terminal is connected with the first input end of described operational amplifier, and described negative-phase sequence curent output is connected with the second input of described operational amplifier.
6. bias current generative circuit according to claim 5, is characterized in that, the first input end of described operational amplifier is inverting input, and the second input of described operational amplifier is normal phase input end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310746682.6A CN103716049B (en) | 2013-12-30 | 2013-12-30 | Bias current generative circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310746682.6A CN103716049B (en) | 2013-12-30 | 2013-12-30 | Bias current generative circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103716049A true CN103716049A (en) | 2014-04-09 |
| CN103716049B CN103716049B (en) | 2017-10-10 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310746682.6A Active CN103716049B (en) | 2013-12-30 | 2013-12-30 | Bias current generative circuit |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1482736A (en) * | 2002-04-22 | 2004-03-17 | 雷凌科技股份有限公司 | Gain amplifier circuit that minimizes the miller effect |
| CN202395750U (en) * | 2011-12-02 | 2012-08-22 | 上海贝岭股份有限公司 | Differential reference voltage buffer |
| CN103326681A (en) * | 2012-03-21 | 2013-09-25 | 三星电子株式会社 | Amplifier for output buffer, signal processing apparatus and amplifier circuit |
| CN103474015A (en) * | 2013-08-20 | 2013-12-25 | 北京大学深圳研究生院 | Output amplifier, digital-to-analogue converter, data drive circuit and display device |
| CN203661044U (en) * | 2013-12-30 | 2014-06-18 | 上海贝岭股份有限公司 | Bias current generating circuit |
-
2013
- 2013-12-30 CN CN201310746682.6A patent/CN103716049B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1482736A (en) * | 2002-04-22 | 2004-03-17 | 雷凌科技股份有限公司 | Gain amplifier circuit that minimizes the miller effect |
| CN202395750U (en) * | 2011-12-02 | 2012-08-22 | 上海贝岭股份有限公司 | Differential reference voltage buffer |
| CN103326681A (en) * | 2012-03-21 | 2013-09-25 | 三星电子株式会社 | Amplifier for output buffer, signal processing apparatus and amplifier circuit |
| CN103474015A (en) * | 2013-08-20 | 2013-12-25 | 北京大学深圳研究生院 | Output amplifier, digital-to-analogue converter, data drive circuit and display device |
| CN203661044U (en) * | 2013-12-30 | 2014-06-18 | 上海贝岭股份有限公司 | Bias current generating circuit |
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| Publication number | Publication date |
|---|---|
| CN103716049B (en) | 2017-10-10 |
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