CN103681868A - 带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管 - Google Patents

带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管 Download PDF

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CN103681868A
CN103681868A CN201310752768.XA CN201310752768A CN103681868A CN 103681868 A CN103681868 A CN 103681868A CN 201310752768 A CN201310752768 A CN 201310752768A CN 103681868 A CN103681868 A CN 103681868A
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韩根全
刘艳
刘明山
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Chongqing University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure

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Abstract

本发明提供一种带有源漏应变源的GeSn n沟道MOSFET。该MOSFET(10)的特征在于：源漏应变源（106）生长在源漏极区域（101），GeSn沟道上生长绝缘介电质薄膜（104），绝缘介电质薄膜上覆盖一层柵（105）。源漏应变源（106）的晶格常数比源漏极区（101）大，形成对沟道区的应变，该应变在yz平面内为双轴张应变，在x方向为单轴压应变。这种应变有利于GeSn沟道Γ点下移，使间接带隙结构利于转化为直接带隙结构，Γ点参与导电的电子数目大大增加，从而提高MOSFET性能。

Description

带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管
技术领域
本发明涉及一种带有源漏应变源的GeSn n沟道MOSFET（Metal-oxide-semiconductor Field-effect Transistor：金属氧化物半导体场效应晶体管）。 
背景技术
随着集成电路技术的深入发展，晶圆尺寸的提高以及芯片特征尺寸的缩小可以满足微型化、高密度化、高速化、高可靠性和***集成化的要求。根据国际半导体技术蓝图（International Technology Roadmap for Semiconductors，ITRS）的预测，当集成电路技术节点到10纳米以下的时候，应变Si材料已经不能满足需要，要引入高载流子迁移率材料MOSFET来提升芯片性能。理论和实验显示GeSn具有比纯Ge材料更高的载流子迁移率。理论计算显示通过调节GeSn中Sn的组分和改变GeSn结构的应变情况，可以把间接带隙结构GeSn中Γ点下移，这样Γ点参与导电的电子数量增加，从而电子迁移率大大提高（Physical Review B,vol.75,pp.045208,2007）。 
对于弛豫的GeSn材料，当Sn的组分达到6.5%～11%的时候，GeSn就会变成直接带隙（Journal of Applied Physics,113,073707,2013以及其中的参考文献）。Sn在Ge中的固溶度度很低（<1%）,因此制备高质量、无缺陷的GeSn很难。现在用外延生长的方法可制备出Sn组分达到20%的GeSn材料[ECS Transactions,41(7),pp.231,2011;ECS Transactions,50(9),pp.885,2012]。但是随着Sn组分的增加，材料质量和热稳定型都会变差，因此单纯依靠提高Sn的组分实现直接带隙GeSn材料，比较困难。理论计算显示，在GeSn中引入双轴张应变有利于从间接带隙到直接带隙的转变，即在比较低的Sn组分就可以变成直接带隙材料（Applied Physics Letters,98,011111,2011）。 
为实现双轴张应变GeSn，有人在晶格常数比较大的衬底材料上生长GeSn外延层，衬底材料可以是III-V族材料，比如InGaAs或者Sn组分更高的GeSn。 
发明内容
本发明的目的是提出一种带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管（MOSFET）的结构。其中源漏应变源的晶格常数比沟道区域的大， 对沟道GeSn材料形成沿沟道方向的单轴压应变，沿垂直沟道的平面内形成双轴张应变。这种应变状态有利于GeSn材料从间接带隙变成直接带隙，从而实现高的电子迁移率。 
本发明用以实现上述目的的技术方案如下： 
本发明所提出的金属氧化物半导体场效应晶体管具有一GeSn沟道、一源极、一漏极、一源应变源、一漏应变源、一绝缘介电质薄膜、一栅电极。 
其中，沟道为单晶GeSn材料，绝缘介电质薄膜位于沟道上，栅电极覆盖在绝缘介电质薄膜上，源极和漏极材料为单晶GeSn，源极应变源和漏极应变源生长在源极和漏极上。其关键是，源、漏应变源晶格常数比沟道区域的材料的晶格常数大，从而形成对沟道的应变，使沟道GeSn由间接带隙变为直接带隙。 
本发明的优点分析如下： 
由于本发明的源漏极、沟道、源漏应变源材料为单晶GeSn，通过改变GeSn中Sn的组分，使得源漏应变源的晶格常数比沟道区域的材料的晶格常数大，从而对沟道GeSn材料形成沿沟道方向的单轴压应变，沿垂直沟道的平面的双轴张应变，这种应变状态有利于GeSn材料从间接带隙变成直接带隙，从而实现高的电子迁移率。 
附图说明
图1为GeSn n沟道MOSFET的立体模式图。 
图2为GeSn n沟道MOSFET的YZ面剖面图。 
图3为GeSn n沟道MOSFET制造的第一步。 
图4为GeSn n沟道MOSFET制造的第二步。 
图5为GeSn n沟道MOSFET制造的第三步。 
图6为GeSn n沟道MOSFET制造的第四步。 
具体实施方式
为了更为清晰地了解本发明的技术实质，以下结合附图和实施例详细说明本发明的结构和工艺实现： 
参见图1和图2所示的带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管10，其包括： 
一沟道103，采用单晶GeSn材料，材料通式为Ge1-xSnx（0≤x≤0.25），如 可采用Ge0.947Sn0.053（参考文献Proc.IEEE Intl.Electron Devices Meeting,2011,pp.16.7.1-16.7.3）。 
一绝缘介电质薄膜104，生长在沟道103上，如采用H-k材料HfO2。 
一栅电极105，覆盖在所述绝缘介电质薄膜上。 
一源极101与一漏极102，材料为单晶GeSn，通式为Ge1-xSnx（0≤x≤0.25），如采用Ge0.947Sn0.053。 
一源极应变源106与一漏极应变源，分别生长在源极和漏极上，材料为GeSn，通式为Ge1-ySny（0<y≤0.25）,如用含Sn组分为10%的Ge0.9Sn0.1。 
参见图3-图6，为带有源漏应变源的GeSn n沟道MOSFET（10）的制造过程： 
第一步如图3所示，制备一根GeSn材料（Ge1-xSnx）纳米线，其中中间部分即为GeSn沟道（103）。 
第二步如图4所示，在GeSn纳米线形成围栅结构，即在GeSn沟道上生长绝缘介电质薄膜104，在绝缘介电质薄膜上覆盖栅电极105。 
第三步如图5所示，在GeSn材料（Ge1-xSnx）纳米线的两端，对源漏区域刻蚀，形成源极101和漏极102。 
第四步如图6所示，在源漏区域利用外延生长的方法生长应变材料GeSn，形成源极应变源和漏极应变源106，其材料的晶格常数大于沟道GeSn材料的晶格常数。 
虽然本发明已以实例公开如上，然其并非用以限定本发明，本发明的保护范围当视权利要求为准。 
本发明并不局限于上述实施方式，如果对发明的各种改动或变形不脱离本发明的精神和范围，倘若这些改动和变形属于本发明的权利要求和等同技术范围之内，则本发明也意图包含这些改动和变形。 

Claims (5)

1.一种带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管，其特征在于，包括：
一沟道103，为单晶GeSn材料；
一绝缘介电质薄膜104，位于沟道上；
一栅电极105，位于所述绝缘介电质薄膜上；
一源极101与一漏极102，材料为单晶GeSn；
一源极应变源106与一漏极应变源，分别位于源和漏上，材料为单晶GeSn；
其中源漏应变源的晶格常数比沟道区域的晶格常数大。
2.如权利要求1所述的带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管，其特征在于，所述沟道的单晶GeSn材料通式为Ge1-xSnx（0≤x≤0.25）。
3.如权利要求1所述的带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管，其特征在于，所述源漏区域为单晶GeSn材料，通式为Ge1-xSnx（0≤x≤0.25）。
4.如权利要求2或3所述的带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管，其特征在于，所述源漏应变源采用单晶半导体材料GeSn,通式为Ge1-ySny（0<y≤0.25,y>x）。
5.如权利要求1-4之任一项所述的带有源漏应变源的GeSn n沟道金属氧化物半导体场效应晶体管，其特征在于，其中源漏应变源通过半导体外延生长的技术生长在源漏区域。
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Cited By (3)

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CN103824885A (zh) * 2014-02-20 2014-05-28 重庆大学 带有源应变源的GeSnn沟道隧穿场效应晶体管
CN104022152A (zh) * 2014-06-04 2014-09-03 重庆大学 带有压应变薄膜应变源的双栅p沟道MOSFET及制备方法
US10164103B2 (en) 2016-10-17 2018-12-25 International Business Machines Corporation Forming strained channel with germanium condensation

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CN103824885A (zh) * 2014-02-20 2014-05-28 重庆大学 带有源应变源的GeSnn沟道隧穿场效应晶体管
CN104022152A (zh) * 2014-06-04 2014-09-03 重庆大学 带有压应变薄膜应变源的双栅p沟道MOSFET及制备方法
CN104022152B (zh) * 2014-06-04 2017-03-01 重庆大学 带有压应变薄膜应变源的双栅p沟道MOSFET及制备方法
US10164103B2 (en) 2016-10-17 2018-12-25 International Business Machines Corporation Forming strained channel with germanium condensation

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