CN103630881B - A kind of distributed waveform generation on-line synchronous Circuit tuning and method - Google Patents
A kind of distributed waveform generation on-line synchronous Circuit tuning and method Download PDFInfo
- Publication number
- CN103630881B CN103630881B CN201310513613.0A CN201310513613A CN103630881B CN 103630881 B CN103630881 B CN 103630881B CN 201310513613 A CN201310513613 A CN 201310513613A CN 103630881 B CN103630881 B CN 103630881B
- Authority
- CN
- China
- Prior art keywords
- waveform
- waveform generation
- radar
- distributed
- dds
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/282—Transmitters
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
The invention belongs to radar distributed waveform generation synchronism integrated design technique field, be specifically related to a kind of distributed waveform generation on-line synchronous Circuit tuning and method.The present invention is completed by main control terminal and carries out control with the waveform generating section in transmitting-receiving subassembly and communicate, and according to pre-set communication protocol, what realize the correlation parameters such as wave form output forward position, rear edge and initial frequency arranges adjustment.The present invention has with low cost, simple operation, precision is high and structure is simply easy to integrated.
Description
Technical field
The invention belongs to radar distributed waveform generation synchronism integrated design technique field, be specifically related to a kind of distributed waveform generation on-line synchronous Circuit tuning and method.
Background technology
The design of phased-array radar waveform generation mainly can be divided into centralized waveform generation and the design of distributed waveform generation, centralized waveform generation design unified waveform generation intermediate-freuqncy signal is carried out isolation merit divide, be supplied to each transmitting-receiving subassembly, this kind of method shortcoming is each unity of form that transmits, and can not change flexibly; Distributed waveform generation is that each transmitting-receiving subassembly has independently wave generating unit, compared with centralized waveform generation, has that Waveform Control is flexible, the high obvious advantage of phase shifting accuracy.But the radar adopting distributed waveform to produce has following shortcoming: the difference that between passage, the difference of analog channel characteristic causes interchannel to output signal; The batch difference of device and the difference of the output signal caused; Above shortcoming is difficult to accurately control in actual design and batch product process, but the conforming quality that in distributed radar transmitting-receiving subassembly, waveform generation exports can directly affect the energy of radar in space and synthesize, and then affect the critical index of the radar such as power coverage of radar, so can this problem effectively solve become one of Main Bottleneck of promoting this type of radar performance.
It is realized by the synchronizing function of integrated DDS chip self that present multi-channel waveform produces the method for synchronization that in design process, Application comparison is general, need during design to provide synchronizing signal by clock distributor, ensure synchronism and the consistance of each DDS device output signal.In distributed waveform generation Radar Design process, be relatively independent because signal generator divides in physical space, be difficult in this way to solve distributed signal produce interchannel and batch between the synchronism difference problem that exists.
In phased-array radar, the stationary problem that transmitting-receiving subassembly adopts distributed signal to produce form mainly comprises phase-locking and time synchronized two aspect, phase-locking can carry out the phase differential of the interchannel signal of phase shift correction by the corrective network of self of radar, but there is delay difference when signal produces between output signal, interchannel signal can be caused to produce difference on the frequency at synchronization.Signal the most frequently used in radar real work is linear FM signal and NLFM signal, this patent is for linear FM signal, will increase along with the increase of time according to the interchannel phase differential of characteristics of signals, the phase differential that this kind of situation causes cannot be revised by corrective network, the result finally causing radar dimensional energy to be synthesized distorts, and has a strong impact on the overall performance of radar.
Based on this, the present invention is directed to consistency problem in distributed waveform generation Radar Design process and propose a kind of distributed waveform generation on-line synchronous method of adjustment based on DDS technology and simulating signal synthetic technology.
Summary of the invention
For the problem proposed in background technology, the invention provides a kind of radar distributed waveform generation on-line synchronous method.The method is completed by main control terminal carries out control with the waveform generating section in transmitting-receiving subassembly and communicates, and according to pre-set communication protocol, what realize the correlation parameters such as wave form output forward position, rear edge and initial frequency arranges adjustment; In the radar that the multi-channel waveform of the distributed waveform generation of radar produces, each waveform generation passage is made up of clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit, and wherein clock conditioning unit completes the process to FPGA and DDS clock; Wave generating unit produces corresponding waveform signal according to waveform code, phase shift code and interface adjustment control signal, and simulated frequency conversion unit completes radiofrequency signal and exports after completing twice up-conversion.Thus producing the high radar waveform of radar distributed waveform generation inter-channel synchronization precision, the method has with low cost, simple operation, precision is high and structure is simply easy to integrated.
Technical method of the present invention is: a kind of distributed waveform generation on-line synchronous method of adjustment, comprise N roadbed in the Waveform generating circuit of DDS technology, every road Waveform generating circuit all comprises clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit, and its feature comprises the steps:
Step one: the distributed waveform generation of the hyperchannel based on DDS technology;
Step 2: exact and digital phase shifting controls;
Step 3: carry out initial frequency and delay parameter control based on serial ports;
Step 4: amplitude-phase consistency analysis after the synthesis of radio frequency analog pulse signal,
Wherein, N is transmitting-receiving subassembly quantity.
Its beneficial effect is: produce synchronization accuracy high, waveform catalog is radar waveform flexibly.
The distribution controlled based on serial ports is as above the synchronous method of waveform generation, it is characterized in that: in described step one, the concrete grammar of the distributed waveform generation of hyperchannel is: radar distributed N road waveform generation adopts DDS technology to realize, wherein acp chip adopts the AD99XX family chip of ADI company, this chip is Direct Digital Frequency Synthesizers (DDS) chip that a slice cost performance is higher, its speed is fast, output waveform is stablized, and frequency, phase place and amplitude all can control and resolution is high.Its inner integrated 14bit digital to analog converter (DAC) and support high 1GSPS ground sampling rate, by the output of FPGA control DDS.
The distribution controlled based on serial ports is as above the synchronous method of waveform generation, it is characterized in that: in described step 2, the concrete grammar of high-precision numerical control phase shift is: according to the control code of more than 8 of FPGA decoding, deliver to DDS phase control word register, carry out accurate phase shifting control.
The distribution controlled based on serial ports is as above the synchronous method of waveform generation, it is characterized in that: carrying out based on serial ports the concrete grammar that initial frequency and delay parameter control in described step 3 is: the control of the initial frequency provided according to interface control unit and waveform delay parameter, the interchannel that utilizing DDS chip to produce distributed waveform generation radar needs has the radar waveform of high-precise synchronization.
The distribution controlled based on serial ports is as above the synchronous method of waveform generation, it is characterized in that: in described step 4, after the synthesis of radio frequency analog pulse signal, the concrete grammar of amplitude-phase consistency analysis is: after the radar waveform signal that DDS chip produces being carried out the process such as frequency conversion, filtering and amplification, directly carry out radio frequency analog synthesis, obtain between two-way and, difference signal, carry out width facies analysis and obtain conformity error.
Based on an on-line synchronous Circuit tuning for distributed waveform generation, comprise the Waveform generating circuit that N road is identical, every road all has clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit composition; The input end of clock conditioning unit is connected with external clock, and DDS chip is delivered to as waveform generation clock in its output terminal one road, and FPGA is delivered to as work clock in another road; Interface control unit is connected with FPGA, the waveform catalog that control DDS exports; Wave generating unit is that DDS chip produces the intermediate frequency Modulation waveform signal of radar needs according to external clock and Waveform Control parameter; Interface control unit is connected with FPGA, and the waveform parameters such as original frequency, waveform catalog and output time are delivered to DDS chip, produces the radar waveform that radar needs; Simulated frequency conversion unit exports with DDS chip and is connected, and is carried out by the modulated intermediate frequency signal that DDS produces amplifying and frequency conversion obtains the radiofrequency signal that radar finally launches.
As above based on the on-line synchronous Circuit tuning of distributed waveform generation, it is characterized in that: be made up of clock modulate circuit, DDS chip AD9910, serial interface chip MAX232E and FPGAEP2C70F672I8, wherein clock modulate circuit is connected with FPAG with DDS chip, serial interface chip is connected with FPGA, and the radar fm waveform output terminal that DDS chip AD9910 chip produces is connected with the input end of amplifying circuit with frequency conversion, filtering.Its beneficial effect is: generation low spurious, Low phase noise, high resolving power, the radar Frequency Modulated radio signals that inter-channel synchronization precision is high and consistance is good.
Accompanying drawing explanation
Fig. 1: working-flow figure;
Fig. 2: system architecture diagram.
Embodiment
Below in conjunction with accompanying drawing, the present invention will be further described.
A kind of based on distributed radar waveform generation on-line synchronous method for designing, be illustrated in figure 2 the structure composition frame chart of native system, system is formed primarily of clock conditioning unit, DDS chip AD9910, serial interface chip MAX232E and FPGAEP2C70F672I8, wherein clock conditioning unit is connected with FPAG with DDS chip, serial interface chip is connected with FPGA, the radar fm waveform output terminal that DDS chip AD9910 chip produces is connected with the input end of amplifying circuit with frequency conversion, filtering, and its delivery outlet is directly connected with delivery outlet.Its beneficial effect is: generation low spurious, Low phase noise, high resolving power, the radar fm waveform signal that inter-channel synchronization precision is high.
Just can realize producing the repetition period according to waveform code, phase shift code and solidification waveform parameter by the above critical piece is T, and carrier frequency is
waveform signal, pulse width τ is respectively 30 μ s or 60 μ s or 100 μ s, and the interchannel that bandwidth B is respectively 2MHz or 10MHz has high-precision synchronous linear FM signal.And controlled by serial ports, the waveform parameter that the initial frequency of interchannel waveform and waveform time delay etc. are concrete can be changed online in real time, produce the transmitted waveform meeting radar complete machine needs.
Phase differential between the distributed waveform generation of the radar that the present invention revises mainly by:
1) difference of phase place between channel reference clock;
2) time difference of DDS waveform control signal configuration register;
3) signal produces the difference of the analog feature indexs such as the group delay of simulating part in passage.
The present invention is by based on based on the waveform generation technique of DDS, the method of a kind of online solution inter-channel synchronization sex chromosome mosaicism proposed, choosing of external clock is main based on the frequency of the intermediate frequency waveform signal of DDS generation, the waveform Clock selected in this example is the 80MHz of outside input, through oversampling clock modulate circuit, one tunnel produces 400MHz and delivers to DDS chip AD9910 as waveform generation clock after 5 frequencys multiplication, and another road 80MHz directly delivers to FPGA as work clock.
Wide adjustment during signal, produce passage for benchmark with a road signal, other signal produces passage and compares adjustment with it, by advanced position and the back edge position of serial ports adjustment wave form output, make error on the time domain width between two-way≤
.
Interchannel waveform overlaps and adjusts initial phase, reads the phase differential in two forward positions, passage waveform overlapping region from oscillograph
, phase shift code adopts 8 bit parallel codes to control, and namely corresponding phase place adjustment control word is
, make two channel signal overlapping region start-up phase potential differences
≈ 0 °.
The adjustment of interchannel waveform overlapping region difference on the frequency, reads afterbody phase differential by oscillograph
, by
, draw the afterbody moment
instantaneous frequency poor
, the frequency control register of DDS chip is 48, i.e. frequency control word
,
for module exports initial frequency, by serial ports by this
send into DDS corresponding configuration register, and then finely tune initial frequency, make, thereafter along overlapping as far as possible, namely to reduce interchannel synchronism difference, substantially to meet the requirement of radar overall performance.
Implementation procedure concrete according to the present invention below, analytical calculation is carried out to systematic error:
First, paired pulses leading edge phase corrects, and because phase shifting control is 8 bit parallel control signals, calculates corresponding phase control code according to the leading edge phase difference that oscillograph reads, completes leading edge phase alignment.
Secondly, extrapolating pulsed frequency error by reading pulse matching region reverse phase error, utilizing serial ports to carry out frequency of amendment.
So the reading accuracy that system main source of error can reach in oscillograph.Namely error formula is
, wherein
for the theoretical error that oscillograph reads, B is signal bandwidth,
for the centre frequency of signal carrier frequency.But reading error can reach 2ps in theory on oscillograph, actually pass after repeatedly reading gets average, can make control errors within ± 2.5ps.Suppose signal bandwidth B=2MHz, centre frequency is
=1200MHz, then under error maximum case
=5ps, the maximum error drawn is
=3ns, is folded to pulse back edge phase error and is about 2.2 °, can meet the requirement of the lobe coverage of antenna, can imagine thus, and for B=10MHz broadband signal, such error can be less.As can be seen here, the adjustment control accuracy that reaches of this method is far above the synchronization accuracy introduced in usual manner.
This method for the distributed waveform generation method for designing of radar, be mainly used in owing to being physically distributed waveform generation separately, the synchronism design that ADI company is recommended cannot be adopted, make the distributed waveform generation of radar have wider application prospect.
Claims (2)
1. a distributed waveform generation on-line synchronous method of adjustment, have employed N roadbed in the Waveform generating circuit of DDS technology, every road Waveform generating circuit all comprises clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit, and its feature comprises the steps:
Step one: the distributed waveform generation of the hyperchannel based on DDS technology;
Step 2: the step of digital phase shifted control, concrete grammar is: according to the control code of more than 8 of FPGA decoding, deliver to DDS phase control word register, carry out accurate phase shifting control;
Step 3: carry out initial frequency and delay parameter control based on serial ports, concrete grammar is: the control of the initial frequency provided according to interface control unit and waveform delay parameter, and the interchannel that utilizing DDS chip to produce distributed waveform generation radar needs has the radar waveform of high-precise synchronization;
Step 4: amplitude-phase consistency analysis after the synthesis of radio frequency analog pulse signal, concrete grammar is: after the radar waveform signal that DDS chip produces is carried out frequency conversion, filtering and amplification process, directly carry out radio frequency analog synthesis, obtain between N road and, difference signal, carry out width facies analysis and obtain conformity error;
Wherein, N is transmitting-receiving subassembly quantity.
2. distributed waveform generation on-line synchronous method of adjustment as claimed in claim 1, it is characterized in that: in described step one, the concrete grammar of the distributed waveform generation of hyperchannel is: radar distributed N road waveform generation adopts DDS technology to realize, and wherein acp chip adopts the AD99XX family chip of ADI company.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310513613.0A CN103630881B (en) | 2013-10-28 | 2013-10-28 | A kind of distributed waveform generation on-line synchronous Circuit tuning and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310513613.0A CN103630881B (en) | 2013-10-28 | 2013-10-28 | A kind of distributed waveform generation on-line synchronous Circuit tuning and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103630881A CN103630881A (en) | 2014-03-12 |
| CN103630881B true CN103630881B (en) | 2015-11-18 |
Family
ID=50212132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310513613.0A Expired - Fee Related CN103630881B (en) | 2013-10-28 | 2013-10-28 | A kind of distributed waveform generation on-line synchronous Circuit tuning and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103630881B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106354196B (en) * | 2016-09-29 | 2019-11-12 | 华东电子工程研究所（中国电子科技集团公司第三十八研究所） | Low noise wideband signal generator and signal generating method |
| CN108401003B (en) * | 2017-02-08 | 2021-01-22 | 北京百度网讯科技有限公司 | Radar data synchronization method, device, equipment and computer storage medium |
| CN109061572A (en) * | 2018-06-21 | 2018-12-21 | 武汉滨湖电子有限责任公司 | DDS realizes the four-way T/R component realization method of digital phase shift as local oscillator |
| CN111220952B (en) * | 2020-03-16 | 2021-09-17 | 中国人民解放军63926部队 | Phased array radar area type high-precision adjusting method under large-load working condition |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101162398A (en) * | 2006-10-12 | 2008-04-16 | 东莞理工学院 | Arbitrarily signal generating device |
| US7576616B2 (en) * | 2005-08-29 | 2009-08-18 | Agilent Technologies, Inc. | Phase controlling apparatus, frequency controlling apparatus, oscillating apparatus, phase controlling method, and frequency controlling method |
| CN102780490A (en) * | 2012-08-14 | 2012-11-14 | 武汉滨湖电子有限责任公司 | DDS (direct digital synthesis) type ultra-wide band frequency-modulated signal generating circuit and method |
| CN102904550A (en) * | 2012-09-26 | 2013-01-30 | 北京工业大学 | Multi-channel synchronous waveform generator based on AD9959 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3536426B2 (en) * | 1995-05-29 | 2004-06-07 | 横河電機株式会社 | Waveform generator |
-
2013
- 2013-10-28 CN CN201310513613.0A patent/CN103630881B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7576616B2 (en) * | 2005-08-29 | 2009-08-18 | Agilent Technologies, Inc. | Phase controlling apparatus, frequency controlling apparatus, oscillating apparatus, phase controlling method, and frequency controlling method |
| CN101162398A (en) * | 2006-10-12 | 2008-04-16 | 东莞理工学院 | Arbitrarily signal generating device |
| CN102780490A (en) * | 2012-08-14 | 2012-11-14 | 武汉滨湖电子有限责任公司 | DDS (direct digital synthesis) type ultra-wide band frequency-modulated signal generating circuit and method |
| CN102904550A (en) * | 2012-09-26 | 2013-01-30 | 北京工业大学 | Multi-channel synchronous waveform generator based on AD9959 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103630881A (en) | 2014-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108631809B (en) | Multichannel digital TR assembly | |
| CN101150316B (en) | A multi-channel clock synchronization method and system | |
| CN103630881B (en) | A kind of distributed waveform generation on-line synchronous Circuit tuning and method | |
| CN103675780B (en) | A kind of radar simulator for the full coherent of Ku wave band | |
| CN104917556B (en) | A kind of synchronous multibeam signals generation method based on ultrahigh speed DAC | |
| CN112260890B (en) | Digital array time delay measuring method | |
| CN109683137A (en) | A kind of multi-channel synchronization method applied to phased-array radar | |
| CN106154907A (en) | A kind of high speed high-accuracy data collection system based on time interleaving sampling | |
| CN109459733A (en) | Anticollision Radar target velocity simulator, system and method based on pm mode | |
| CN205829606U (en) | A kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop | |
| CN111123230B (en) | Phased array intermediate frequency radar simulator, radar signal processor testing method and device | |
| CN103560769B (en) | A kind of AWG and random waveform production method | |
| CN107247252A (en) | Produce the device of multichannel coherent analog signal | |
| CN103560785B (en) | Method and device for generating phase-coherent signals | |
| CN103713279A (en) | Multi-channel synchronization excitation source system | |
| CN105510888A (en) | Radar signal simulation method based on digital synthesis, and simulator | |
| CN102780490A (en) | DDS (direct digital synthesis) type ultra-wide band frequency-modulated signal generating circuit and method | |
| CN105137401A (en) | Fast small-stepping agile frequency conversion radar signal generation device | |
| WO2021018057A1 (en) | Multi-channel phase synchronization device for base station, method, and base station | |
| CN106772264A (en) | A kind of ground and spaceborne general ultra-wideband radar signal generating means and method | |
| Sandenbergh et al. | A common view GPSDO to synchronize netted radar | |
| CN107147395A (en) | A kind of quadrature modulator output DAC synchronous circuits based on bicyclic frequency synthesis | |
| CN103884922A (en) | Measuring device and method for Terahertz vector field shape of single receiver | |
| CN104569589A (en) | Device and method for automatically testing Ku waveband phase difference of multi-branch power amplifier | |
| Ji et al. | The synchronization design of multi-channel digital TR module for phased array radar |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151118 Termination date: 20181028 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |