CN103616823A - DC motor speed regulation simulation and experiment integrated apparatus and method - Google Patents

Abstract

The invention provides a DC motor speed regulation simulation and experiment integrated apparatus and a method. The apparatus includes a host computer unit, a control unit and a DC motor unit. Bidirectional communication between the host computer unit and the control unit are achieved through a USB communication module. The DC motor transmits a value of a real-time rotating speed to the control unit, and the control unit can control the rotating speed of the DC motor unit according to a calculated control value, wherein the control value is calculated according to a deviation value of a set value of the rotating speed of the DC motor and the value of the real-time rotating speed of the DC motor. By adopting the USB communication technology, the DC motor speed regulation simulation and experiment integrated apparatus can continuously transmit data acquired at a high speed to a host computer in real time, real-time communication between sampled data and the host computer can be continuously achieved with no loss at the sampling rate of 6 M/s. According to the method provided by the invention, after requirements of a simulation result are met through DC motor speed regulation system modeling and simulation research on a control algorithm, the control algorithm is directly transmitted to a controller to be carried out an experiment in the DC motor speed regulation simulation and experiment integrated apparatus, to greatly facilitate research on the control algorithm.

Description

A kind of DC motor speed-regulating simulation and experiment integrated apparatus and method

Technical field

The invention belongs to automation field, be specifically related to a kind of DC motor speed-regulating simulation and experiment integrated apparatus and method.

Background technology

In the study and research of Theory of Automatic Control, emulation and experiment occupy an important position.At present automation-control experiment system is mainly divided two types: a kind of is experimental system based on DCS or PLC, and this systemic-function is powerful, software and hardware resources is complete, and control algolithm flexible in programming is abundant, yet it is expensive, volume is large; Another kind is SCM Based experimental system, this experimental system price is relatively cheap, easy to use, yet the mode that the control algolithm in single-chip microcomputer needs software programming, then download with compiling realizes, caused this experimental system aspect the modeling and control algorithm research of control object, exist very flexible, available resources scarcity wretched insufficiency.

Summary of the invention

The deficiency existing for prior art, the invention provides a kind of DC motor speed-regulating simulation and experiment integrated apparatus and method.

Technical scheme of the present invention:

A DC motor speed-regulating simulation and experiment integrated apparatus, comprising:

Host computer unit, control module and direct current generator unit;

Described control module comprises: communication module, controller, D/A converter module and analog-to-digital conversion module; Communication module is connected with controller, controller is connected with D/A converter module, the output terminal of D/A converter module connects the input end of direct current generator unit, controller is connected with analog-to-digital conversion module, and the input end of analog-to-digital conversion module connects the output terminal of direct current generator unit as the input end of control module;

Described communication module adopts USB communication module;

Described direct current generator unit comprises: driver module, direct current generator, tech-generator and load; The input end of driver module connects the output terminal of D/A converter module as the input end of direct current generator unit, the output terminal of driver module connects the input end of direct current generator, the output terminal of direct current generator connects the input end of tech-generator, the output terminal of tech-generator connects the input end of analog-to-digital conversion module as the output terminal of direct current generator unit, load is connected on motor;

Described host computer unit and control module carry out two-way communication by USB communication module.

Described host computer unit, for DC motor speed-regulating emulation, set DC motor speed, set the sampling period and monitor in real time direct current generator operation conditions.

The USB communication module of described control module is for the start stop signal of the DC motor speed value that receives host computer and set and sampling period value, direct current generator and the DC motor speed data that collect are sent to host computer.

The controller of described control module is used for the interface sequence of given D/A converter module and the interface sequence of analog-to-digital conversion module, the DC motor speed data that collect is sent to host computer unit, calculates the deviate of the DC motor speed setting value receiving and the direct current generator real-time rotate speed value collecting, and through control algolithm, calculate controlled quentity controlled variable according to this deviate, and this controlled quentity controlled variable is sent to D/A converter module.

The analog-to-digital conversion module of described control module is for being converted to digital signal by the d. c. voltage signal of tech-generator output, i.e. the DC motor speed data of Real-time Collection direct current generator unit be sent to controller.

The D/A converter module of described control module is used for receiving the controlled quentity controlled variable that controller sends, and this controlled quentity controlled variable is converted to d. c. voltage signal and is sent to direct current generator unit.

Driver module in described direct current generator unit is for receiving the DC low-voltage signal of D/A converter module and producing 0～220V adjustable DC output voltage signal and this adjustable DC output voltage signal is sent to direct current generator.

After the adjustable dc voltage signal that direct current generator reception driver module in described direct current generator unit sends, rotate, its rotating speed is controlled volume; Tech-generator in direct current generator unit is used for the just tach signal of direct current generator and converts d. c. voltage signal to and send analog-to-digital conversion module to; The characteristic of load in direct current generator unit for loading to test the speed governing of direct current generator bringing onto load to direct current generator.

Adopt described DC motor speed-regulating simulation and experiment integrated apparatus to carry out the integrated method of DC motor speed-regulating simulation and experiment, comprise the steps:

Step 1: carry out DC motor speed-regulating emulation in host computer unit;

Step 1-1: regulate and produce controlled quentity controlled variable and set up DC motor speed and time curve under different controlled quentity controlled variables;

Step 1-2: whether the rotating speed while judging direct current generator stable state by this DC motor speed and time curve in DC motor speed setting value deviation allowed band, be, performs step 2, no, performs step 1-1;

Step 2: carry out DC motor speed-regulating experiment;

Step 2-1: the start stop signal value of DC motor speed setting value, sampling period setting value and direct current generator is set in host computer unit;

Step 2-2:USB communication module receives the start stop signal value of DC motor speed setting value, sampling period setting value and direct current generator and sends controller to;

Step 2-3: controller judges whether to start direct current generator according to DC motor start-stop signal, according to sampling period setting value, clock signal to be carried out obtaining frequency doubling clock signal, execution step 2-4 after frequency multiplication, no, wait for and receive the start stop signal of direct current generator next time;

Step 2-4: controller carries out obtaining sub-frequency clock signal after frequency division to clock signal according to sampling period setting value;

Step 2-5: controller receives the real-time rotate speed value of direct current generator according to sub-frequency clock signal, the real-time rotate speed value of direct current generator sends host computer unit to through USB communication module, generates this DC motor speed time plot constantly;

Step 2-6: controller calculates the deviate of the real-time rotate speed value of DC motor speed setting value and direct current generator, calculates and produces the controlled quentity controlled variable that regulates DC motor speed according to this deviate;

Step 2-7: regulate the controlled quentity controlled variable of DC motor speed to be converted to and to control the analog voltage of driver module and send driver module to through D/A converter module;

Step 2-8: driver module, according to receive the analog voltage obtaining from D/A converter module, converts alternating voltage to direct current generator required DC voltage;

Step 2-9: direct current generator obtains its required DC voltage from driver module, and direct current generator starts to synchronize and rotate with tech-generator;

Step 2-10: tech-generator converts its tach signal analog voltage signal to and sends analog-to-digital conversion module to;

Step 2-11: analog-to-digital conversion module converts the analog voltage signal receiving from tech-generator digital quantity to and sends controller to;

Step 2-12: controller receives the digital quantity that analog-to-digital conversion module sends, i.e. the real-time rotate speed value of direct current generator according to sub-frequency clock signal;

The digital quantity that step 2-13:USB communication module receives controller sends host computer unit to and generates this DC motor speed and time curve constantly;

Step 2-14: according to DC motor speed setting value deviation range and DC motor speed time plot, whether the rotating speed while judging direct current generator stable state in DC motor speed setting value deviation allowed band, is that experiment finishes, no, performs step 1.

Beneficial effect: DC motor speed-regulating simulation and experiment integrated apparatus of the present invention and method have following advantage compared with prior art:

1. the designed DC motor speed-regulating simulation and experiment integrated apparatus of the present invention, adopt USB mechanics of communication the data of high speed acquisition can be communicated by letter in host computer in real time, continuously, under the sampling rate of 6M/s, can realize continuous, the nothing of sampled data and host computer and lose real-time Communication for Power.

2. the designed DC motor speed-regulating simulation and experiment integral method of the present invention, utilize the simulation study of DC motor speed drive system modeling and control algorithm, after simulation result meets the demands, control algolithm is directly sent on the inherent DC motor speed-regulating simulation and experiment of controller integrated apparatus and is tested, be very easy to the research work of control algolithm.

Accompanying drawing explanation

Fig. 1 is the structural representation of the DC motor speed-regulating simulation and experiment integrated apparatus of one embodiment of the present invention;

Fig. 2 is the control module circuit diagram of one embodiment of the present invention;

Fig. 3 is the drive circuit module circuit diagram of one embodiment of the present invention;

Fig. 4 is the DC motor speed-regulating simulation and experiment integral method process flow diagram of one embodiment of the present invention;

Fig. 5 is the DC motor speed-regulating simulation and experiment integral control system structural representation of one embodiment of the present invention;

The ZYT04 type permanent magnet DC motor rotating speed time plot in ZYT04 type permanent magnet DC motor speed setting value deviation allowed band that Fig. 6 (a) is one embodiment of the present invention, (b) is the not ZYT04 type permanent magnet DC motor rotating speed time plot in ZYT04 type permanent magnet DC motor speed setting value deviation allowed band of one embodiment of the present invention.

Embodiment

Below in conjunction with accompanying drawing, one embodiment of the present invention are elaborated.

The DC motor speed-regulating simulation and experiment integrated apparatus of present embodiment, comprising: host computer unit, control module and direct current generator unit, as shown in Figure 1;

Host computer unit is connected with control module is two-way, and control module is connected with direct current generator unit is two-way;

Host computer unit, for DC motor speed-regulating emulation, set DC motor speed, set the sampling period and monitor in real time direct current generator operation conditions;

Control module comprises: communication module, controller, D/A converter module and analog-to-digital conversion module; What the communication module of present embodiment adopted is USB communication module, application be USB2.0 communications protocol; What the controller of present embodiment adopted is FPGA module; 12 single channel Voltage-output type TLV5639 type analog-digital chips that the D/A converter module of present embodiment adopts TI company to produce; The CMOS AD9201 pattern number converter of two sampling channels of the analog-to-digital conversion module employing ADI of present embodiment, 20MHz sample frequency, 10 bit resolutions.USB communication module is connected with FPGA module is two-way, FPGA module and two-way connection of TLV5639 type analog-digital chip, an output terminal of TLV5639 type analog-digital chip connects the input end of direct current generator unit, FPGA module and two-way connection of AD9201 pattern number converter, an input end of AD9201 pattern number converter connects the output terminal of direct current generator unit as an input end of control module;

USB communication module is for the start stop signal of the DC motor speed value that receives host computer and set and sampling period value, direct current generator and the DC motor speed data that collect are sent to host computer, USB communication module comprises: eeprom chip, USB Type B mouth interface, USB2.0 chip, as shown in Figure 2, eeprom chip is connected with USB2.0 chip is two-way, and USBB type mouth interface is connected with USB2.0 chip is two-way, eeprom chip adopts the eeprom chip that model is 24LC64, for receiving, send and store the data message that USB2.0 chip sends, the SCL pin of 24LC64 chip connects the SCL output pin of USB2.0 chip as clock signal input terminal, the SDA pin of 24LC64 chip is transmitted in both directions pin, the SDA pin that connects USB2.0 chip as serial data interface end, WP is the write-protect pin of 24LC64 chip, connect low level, permission is carried out read-write operation to this device, A0～A2 is that address pin and the page of 24LC64 chip selected pin, its level value is A[2..0]=001, USB Type B mouth interface connects host computer unit, for realizing the bi-directional of data with host computer unit, and is connected with DP pin the bi-directional that USB2.0 chip is realized data by its DM pin, USB2.0 chip is selected the CY7C68013A chip of the EZ-USB FX2LP series of Cypress company release, for and FPGA main control chip between carry out the bi-directional of data, its U_FD[15..0] pin is 16 bit data transmission ends, by the SLOE pin determination data transmission direction of CY7C68013A chip, the clock signal of the IFCLK pin of CY7C68013A chip output can be used as the synchronous clock of communication, FLAGA pin, FLAGB pin, FLAGC pin, FLAGD pin is the fifo status information output pin of CY7C68013A chip, the chip selection signal input pin that the SLCS pin of CY7C68013A chip is FIFO, the SLOE pin of CY7C68013A chip is FIFO output enable pin, the SLRD pin of CY7C68013A chip is FIFO read signal pin, during synchronous reading out data, when SLRD pin input signal is effective, FIFO pointer increases progressively at the rising edge of the clock signal of each IFCLK pin transmission, during asynchronous reading out data, when SLRD pin input signal is effective, FIFO pointer increases progressively at the negative edge of the clock signal of each IFCLK pin transmission, the SLWR pin of CY7C68013A chip is FIFO write signal, during synchronized write data, the rising edge of each the IFCLK pin of data when SLWR pin is effective writes FIFO, FIFO pointer increases progressively, during asynchronous write data, FIFO pointer increases progressively at the negative edge of the clock signal of each IFCLK pin transmission, the PKTEND pin of CY7C68013A chip is end-of-packet signal, the FIFOADR[1:0 of CY7C68013A chip] pin is for selecting the address wire pin of four end points FIFO, and the FD pin data bus of decision CY7C68013A chip with which end points is connected with FIFO.

FPGA module is for providing the interface sequence of TLV5639 type analog-digital chip and AD9201 pattern number converter and the DC motor speed data that collect being sent to host computer unit and calculating the DC motor speed setting value receiving and the deviate of the direct current generator real-time rotate speed value collecting, based on this deviate, through control algolithm, calculate controlled quentity controlled variable, and this controlled quentity controlled variable is sent to TLV5639 type analog-digital chip; AD9201 pattern number converter is for being in real time converted to digital signal by the d. c. voltage signal of tech-generator output, i.e. the DC motor speed data of direct current generator unit, and be sent to FPGA module; TLV5639 type analog-digital chip is used for receiving the controlled quentity controlled variable that FPGA module sends, and this controlled quentity controlled variable is converted to d. c. voltage signal and is sent to direct current generator unit;

FPGA module comprises: jtag interface circuit, series arrangement chip, clock generation module and FGPA main control chip, and as shown in Figure 2, jtag interface circuit, series arrangement chip and clock generation module are all connected with FGPA main control chip, the configuration data that the TDI pin of jtag interface circuit sends for receiving host computer unit, the TDO pin of jtag interface circuit is exported to FPGA main control chip by this configuration data, the TCK pin of jtag interface circuit is as the transmission pin of configurable clock generator, its output terminal is connected to the TCK pin of FPGA main control chip, the TMS pin of jtag interface circuit is selected pin as configuration mode, and its output terminal connects the TMS pin of FPGA main control chip, series arrangement chip is selected the series arrangement chip that model that altera corp provides is EPCS64SI16N, its effect is store configuration data, be convenient to power on and restart rear system call, the nCS pin of EPCS64SI16N series arrangement chip connects the output pin nCS of FPGA main control chip as chip selection signal, the DCLK pin of EPCS64SI16N series arrangement chip connects the output pin DCLK of FPGA main control chip as the clock signal of configuration data transmission, the ASDI pin of EPCS64SI16N series arrangement chip connects the output pin ASDI of FPGA main control chip as the input end of serial data, the DATA pin of EPCS64SI16N series arrangement chip connects the input pin DATA of FPGA main control chip as the output terminal of serial data, clock generation module is for generation of the work clock of whole system, and what the clock generation module of present embodiment adopted is the active crystal oscillator of 50MHZ, and its CLK_IN output pin connects the CLK_IN pin of FPGA main control chip, FPGA main control chip is selected the chip that model that altera corp provides is EP3C16Q240C8N, has 240 pins, wherein MSEL[0..2] pin is for selecting the configuration mode of FPGA, can not suspending.

The DA0_D[11..0 of TLV5639 type analog-digital chip] to be 12 bit data bus pins obtain digital quantity input as tachometer value to pin, is connected to the DA0_D[11..0 of FPGA main control chip] pin; The DA0_CS pin of TLV5639 type analog-digital chip is chip selection signal, is connected to the DA0_CS pin of FPGA main control chip, and during low level, numeral input effectively.The DA0_WE pin of TLV5639 type analog-digital chip is write-enable pin, is connected to the DA0_WE pin of FPGA main control chip, during low level, and latch data; The DA0_L pin of TLV5639 type analog-digital chip is output pin, is connected to the DA0_L pin of FPGA main control chip, during low level, allows output analog voltage; The DA0_REG pin of TLV5639 type analog-digital chip is that register is selected pin, be connected to the DA0_REG pin of FPGA main control chip, during low level, the digital quantity receiving is stored to the data latches of TLV5639, during high level, the digital quantity receiving is stored to the control register of TLV5639; The DA0_OUT pin of TLV5639 type analog-digital chip is analog voltage output interface, be connected to driver module input end, as shown in Figure 2.

The IN_I pin of AD9201 pattern number converter is connected the output terminal of 55CY08 type DC permanent magnet tech-generator as simulating signal input channel with IN_Q pin, as shown in Figure 2; The AD_SLEEP pin of AD9201 analog to digital converter is connected to the AD_sleep pin of FPGA main control chip, when pin is high level, enters dormant state; The AD_CSEL pin of AD9201 analog to digital converter connects the AD_csel pin of FPGA main control chip as the chip selection signal of AD9201; The AD_SEL pin of AD9201 analog to digital converter connects the output terminal of the AD_sel pin of FPGA main control chip as passage gating signal, Q passage input when the input of I passage, low level during high level; The AD_CLK pin of AD9201 analog to digital converter connects FPGA main control chip AD_clk pin as the input pin of sampling clock; The AD_D[9..0 of AD9201 analog to digital converter] pin is 10 bit data bus, connects the AD_D[9..0 of FPGA main control chip] pin, as shown in Figure 2, the digital quantity of output analog voltage.

Direct current generator unit comprises: driver module, direct current generator, tech-generator and load; What the direct current generator of present embodiment adopted is ZYT04 type permanent magnet DC motor, and rated voltage is 110V DC, and rated current is 2.8A, and rated power is 200W, and rated speed is 1500r/min; What tech-generator adopted is the DC permanent magnet tech-generator of 55CY08 type, and rated voltage is 60V, and rated current is 30mA, and rated speed is 1500r/min; What load adopted is the FZ25J type magnetic particle damper of Hai'an Lan Ling Mechanical and Electrical Equipment Company, and moment of torsion is 2.5NM, and rated voltage is 24V, and rated current is 0.4A; The input end of driver module connects an output terminal of D/A converter module as the input end of direct current generator unit, the output terminal of driver module connects the input end of ZYT04 type permanent magnet DC motor, the output terminal of ZYT04 type permanent magnet DC motor connects the input end of 55CY08 type DC permanent magnet tech-generator, the output terminal of 55CY08 DC permanent magnet tech-generator connects an input end of analog-to-digital conversion module as the output terminal of direct current generator unit, FZ25J type magnetic particle damper is connected on ZYT04 type permanent magnet DC motor;

Driver module for receive TLV5639 type analog-digital chip 0～5V DC low-voltage signal and produce 0～220V adjustable DC output voltage signal this adjustable DC output voltage signal is sent to ZYT04 type permanent magnet DC motor; After the adjustable dc voltage signal that ZYT04 type permanent magnet DC motor reception driver module sends, rotate, its rotating speed is controlled volume; The DC permanent magnet tech-generator of 55CY08 type is for converting the tach signal of ZYT04 type permanent magnet DC motor d. c. voltage signal to and send AD9201 pattern number converter to; The characteristic of FZ25J type magnetic particle damper for loading to test the speed governing of ZYT04 type permanent magnet DC motor bringing onto load to ZYT04 type permanent magnet DC motor;

Drive circuit module comprises: single phase full bridge controlled rectifier 1, the first thyristor gating circuit 2 and the second thyristor gating circuit 3.The IN end of the first thyristor gating circuit 2 and the IN end of the second thyristor gating circuit 3 are connected the pin DA0_OUT end of TLV5639 type analog-digital chip as the input end of direct current generator unit; Thyristor gating circuit 2 connects respectively the trigger end of thyristor D6 in single phase full bridge controlled rectifier 1 and the trigger end of thyristor D8 by resistance R 12; Thyristor gating circuit 3 connects respectively the trigger end of thyristor D7 in single phase full bridge controlled rectifier 1 and the trigger end of thyristor D9 by resistance R 3; The c end of the output terminal of single phase full bridge controlled rectifier 1 is the power supply of ZYT04 type permanent magnet DC motor with the input end that d end is all connected ZYT04 type permanent magnet DC motor, as shown in Figure 3.

The IN end of thyristor gating circuit 2 connects an output terminal of TLV5639 type analog-digital chip, controls blocking-up and the conducting of single phase full bridge controlled rectifier 1, as shown in Figure 3 for generation of gate pole trigger pulse.The process that gate pole trigger pulse produces: when pulse amplifying element V1 and V2 conducting, by pulse transformer TM, between the gate pole of the thyristor of single phase full bridge controlled rectifier and negative electrode, export strong trigger pulse, when capacitor C 2 both end voltage are during lower than 15V, enter trigger action plateau; When pulse amplifying element V1 and V2 cut-off, the energy that pulse transformer stores discharges, strong trigger pulse landing.The strong start pulse signal producing in this process export to single phase full bridge controlled rectifier in the trigger end of thyristor 1 as trigger pip.

Single phase full bridge controlled rectifier 1 comprises: the RC resistance-capacitance absorption loop, fully controlled bridge He Si road that four road unidirectional thyristors form, as shown in Figure 3.The gate pole trigger pulse that the break-make of single phase full bridge controlled rectifier is produced by thyristor gating circuit is controlled, for 220V alternating current is directly changed into the stepless adjustable pulsating dc voltage of amplitude, realize direct current generator both end voltage is regulated within the scope of 0～220V.

Adopt described DC motor speed-regulating simulation and experiment integrated apparatus to carry out the integrated method of DC motor speed-regulating simulation and experiment, as shown in Figure 4, comprise the steps:

Step 1: carry out ZYT04 type permanent magnet DC motor speed timing simulation in host computer unit;

The input dc power of driver module is pressed in when 0-5V is interior to be changed, voltage on direct current generator is adjustable to maximal value linearity from 0V, consider that driver module inside exists rc filter circuit, after ignoring the little coefficient link of high-order, the mathematical model of driver module part can be equivalent to first order inertial loop, its transport function W _z(s) be

$W_z\left(s\right)=\frac{\mathrm{\λ}}{T_{z}s+1}---\left(1\right)$

In formula,

S is the complex frequency domain variable in Laplace transform; λ is driving circuit amplification coefficient; T _ztime constant for driving circuit.

The rotating speed of ZYT04 type permanent magnet DC motor is controlled and is adopted armature voltage to control.The work essence of armature control ZYT04 type permanent magnet DC motor is in armature circuit, to produce armature supply by the armature voltage of inputting, then is interacted and produced electromagnetic torque by electric current and magnetic flux, thereby drags load movement.Therefore, the equation of motion of ZYT04 type permanent magnet DC motor can be comprised of following three parts:

Armature circuit balance of voltage equation

$u_a\left(t\right)=L_a\frac{{\mathrm{di}}_a\left(t\right)}{\mathrm{dt}}+R_a{i}_a\left(t\right)+E_a---\left(2\right)$

In formula,

U _a(t) be armature voltage, V; L _afor armature circuit inductance, H; T is the time, s; i _a(t) be armature supply, A; R _afor armature loop resistance, Ω; E _afor armature back-emf, the back-emf that it produces while being armature rotation, its size is directly proportional to magnetic flux and rotating speed, direction and armature voltage u _a(t) contrary, V.

Electromagnetic torque equation

M _m(t)＝C _mi _a(t) (3)

In formula,

C _mfor motor torque coefficient; M _m(t) electromagnetic torque producing for armature supply, Nm.

Torque balance equation on motor shaft

$J_m\frac{d{\mathrm{\ω}}_m\left(t\right)}{\mathrm{dt}}+f_m{\mathrm{\ω}}_m\left(t\right)=M_m\left(t\right)-M_c\left(t\right)---\left(4\right)$

In formula,

F _mfor motor and load are folded to the viscous friction coefficient on motor shaft; J _mfor motor and load are folded to the moment of inertia on motor shaft, Kg*m ²; M _cfor being folded to the total load torque on motor shaft, Nm; ω _m(t) be motor speed, r/min

Cancellation intermediate variable i _a(t), E _aand M _m(t), just can obtain with ω _m(t) be output quantity, u _a(t) be the direct current generator differential equation of input quantity

$\begin{array}{c}{L}_a{\mathrm{<figure-callout\; id="2"\; label="J\; m\; d"\; filenames="HDA0000380432260000021.png,HDA0000380432260000031.png"\; state="\{\{state\}\}">J</figure-callout>}}_m\frac{d^{}}{}\frac{{}^2{\mathrm{\&omega;}}_m\left(t\right)}{{\mathrm{<figure-callout\; id="2"\; label="dt"\; filenames="HDA0000380432260000021.png,HDA0000380432260000031.png"\; state="\{\{state\}\}">dt</figure-callout>}}^2}+(L_a{f}_m+R_a{J}_m)\frac{d{\mathrm{\&omega;}}_m\left(t\right)}{\mathrm{dt}}+(R_a{f}_m+C_m{C}_e){\mathrm{\&omega;}}_m\left(t\right)\\ =C_m{u}_a-L_a\frac{d{M}_c\left(t\right)}{\mathrm{dt}}-R_a{M}_c\left(t\right)\end{array}---\left(5\right)$

In formula,

C _efor electromotive force constant.

Due to armature circuit inductance L _aless, conventionally ignore, thereby formula (5) can be reduced to

$T_m\frac{d{\mathrm{\&omega;}}_m\left(t\right)}{\mathrm{dt}}+{\mathrm{\&omega;}}_m\left(t\right)=K_m{u}_a\left(t\right)-K_c{M}_c\left(t\right)---\left(6\right)$

In formula,

T _m=R _aj _m/ (R _af _m+ C _mc _e) be motor electromechanical time constant; K _m=C _m/ (R _af _m+ C _mc _e) be motor transfer coefficient; K _c=C _m/ (R _af _m+ C _mc _e) be motor transfer coefficient.

If armature resistance R _amoment of inertia J with motor _mwhen all very I is ignored, formula (6) can also further be reduced to

C _eω _m(t)＝u _a(t) (7)

At this moment, the rotational speed omega of motor _m(t) with armature voltage u _a(t) be directly proportional.

In the present embodiment, can be in host computer unit, the Simulink environment based on Matlab emulation platform, sets up the analogous diagram of motor speed regulation system, carries out the simulation study of control algolithm;

Step 1-1: regulate and produce controlled quentity controlled variable and set up ZYT04 type permanent magnet DC motor rotating speed and time curve under different controlled quentity controlled variables;

Step 1-2: whether the rotating speed while judging ZYT04 type permanent magnet DC motor stable state by this ZYT04 type permanent magnet DC motor rotating speed and time curve in DC motor speed setting value deviation allowed band, be, performs step 2, no, performs step 1-1;

The deviation allowed band of the steady-state speed when ZYT04 type permanent magnet DC motor of present embodiment enters stable state and ZYT04 type DC speed setting value is ± 3%～± 5%.

Step 2: carry out ZYT04 type permanent magnet DC motor speed regulation experiment;

In present embodiment, the control algolithm of the simulation process of step 1 can be generated and can be directly downloaded to the project file moving on FPGA control chip with hardware compilation language compiling, download to and in FPGA control chip, carry out ZYT04 type permanent magnet DC motor speed regulation experiment;

Step 2-1: the start stop signal value of ZYT04 type permanent magnet DC motor speed setting value, sampling period setting value and ZYT04 type permanent magnet DC motor is set in host computer unit;

The ZYT04 type permanent magnet DC motor speed setting value of present embodiment is 1000r/min.

Step 2-2:USB communication module receives the start stop signal value of ZYT04 type permanent magnet DC motor speed setting value, sampling period setting value and ZYT04 type permanent magnet DC motor and sends FPGA module to;

Step 2-3:FPGA module judges whether to start ZYT04 type permanent magnet DC motor according to ZYT04 type permanent magnet DC motor start stop signal, be, according to sampling period setting value, clock signal is carried out obtaining frequency doubling clock signal after frequency multiplication, execution step 2-4, no, wait for and receive the start stop signal of ZYT04 type permanent magnet DC motor next time;

Step 2-4:FPGA module carries out obtaining sub-frequency clock signal after frequency division to clock signal according to sampling period setting value;

Step 2-5:FPGA module receives the real-time rotate speed value of ZYT04 type permanent magnet DC motor according to sub-frequency clock signal, the real-time rotate speed value of ZYT04 type permanent magnet DC motor sends host computer unit to through USB communication module, generates this ZYT04 type permanent magnet DC motor rotating speed time plot constantly;

Step 2-6:FPGA module calculates the deviate of the real-time rotate speed value of ZYT04 type permanent magnet DC motor speed setting value and ZYT04 type permanent magnet DC motor, calculates and produce the controlled quentity controlled variable that regulates ZYT04 type permanent magnet DC motor rotating speed according to this deviate;

Step 2-7: regulate the controlled quentity controlled variable of ZYT04 type permanent magnet DC motor rotating speed to be converted to and to control the analog voltage of driver module and send driver module to through TLV5639 type analog-digital chip;

Step 2-8: driver module, according to receive the analog voltage obtaining from TLV5639 type analog-digital chip, converts alternating voltage to ZYT04 type permanent magnet DC motor required DC voltage;

Step 2-9:ZYT04 type permanent magnet DC motor obtains its required DC voltage from driver module, and ZYT04 type permanent magnet DC motor starts to synchronize and rotate with 55CY08 type DC permanent magnet tech-generator;

Step 2-10:55CY08 type DC permanent magnet tech-generator converts its tach signal to analog voltage signal and sends AD9201 pattern number converter to;

Step 2-11:AD9201 pattern number converter converts the analog voltage signal receiving from 55CY08 type DC permanent magnet tech-generator digital quantity to and sends FPGA module to;

Step 2-12:FPGA module receives the digital quantity that AD9201 pattern number converter sends, i.e. the real-time rotate speed value of ZYT04 type permanent magnet DC motor according to sub-frequency clock signal;

The digital quantity that step 2-13:USB communication module receives FPGA module sends host computer unit to and generates this rotating speed and time curve constantly;

Step 2-14: according to ZYT04 type permanent magnet DC motor speed setting value deviation range and ZYT04 type permanent magnet DC motor rotating speed time plot, whether the rotating speed while judging ZYT04 type permanent magnet DC motor stable state is in ZYT04 type permanent magnet DC motor speed setting value deviation allowed band, be, as shown in Figure 6 (a), experiment finishes, no, as shown in Figure 6 (b), perform step 1.

In present embodiment, DC motor speed-regulating simulation and experiment integrated apparatus is method, in the DC motor speed-regulating simulation and experiment integral control system that can build in FPGA main control chip, realize, this system comprises: synchronous serial Peripheral Interface control module, Clock management module, control algolithm module, digital-to-analogue time-sequence control module and data acquisition and transport module, as Fig. 5; An output terminal of synchronous serial Peripheral Interface control module connects the input end of control algolithm module, the input end of another output terminal connected system Clock management module of synchronous serial Peripheral Interface control module; An output terminal of Clock management module connects an input end of control algolithm module, output terminal connection data of another two output terminals of Clock management module gathers and the input end of transport module, and another output terminal connects an input end of digital-to-analogue time-sequence control module; The output terminal of data acquisition and transport module connects an input end of control algolithm module; The output terminal of control algolithm module connects an input end of digital-to-analogue time-sequence control module.

Synchronous serial Peripheral Interface control module is the data transmission interface between USB2.0 chip and FPGA main control chip, be used for receiving ZYT04 type permanent magnet DC motor speed setting value, sampling period setting value and ZYT04 type permanent magnet DC motor start stop signal, and the sampling period setting value receiving is sent to Clock management module, and send the ZYT04 type permanent magnet DC motor speed setting value receiving to control algolithm module;

Clock management module passes for receiving sampling period setting value and the reception control unit that synchronous serial Peripheral Interface control module sends the clock signal that active crystal oscillator provides; According to described sampling period setting value, described clock signal is carried out producing the clock signal of control algolithm module and sending control algolithm module to after frequency multiplication; According to described sampling period setting value, described clock signal is carried out producing respectively the needed clock signal value of digital-to-analogue time-sequence control module and data acquisition and transport module and sending to respectively digital-to-analogue time-sequence control module and data acquisition and transport module after frequency division;

Data acquisition and transport module comprise: modulus time-sequence control module and USB interface Logic control module.Modulus time-sequence control module is for receiving the digital quantity that AD9201 pattern number converter sends, be the real-time rotate speed value of ZYT04 type permanent magnet DC motor, and send respectively this digital quantity to USB interface Logic control module and control algolithm module according to the clock signal sending from Clock management module; USB interface Logic control module is for receiving the digital quantity that modulus time-sequence control module sends and this digital quantity being sent to USB2.0 chip;

Control algolithm module is for the real-time rotate speed value of the ZYT04 type permanent magnet DC motor that receives ZYT04 type permanent magnet DC motor speed setting value that synchronous serial Peripheral Interface control module sends, clock signal that Clock management module sends and data acquisition and transport module and send, calculate the deviate of the real-time rotate speed value of ZYT04 type permanent magnet DC motor speed setting value and ZYT04 type permanent magnet DC motor, and calculate and regulate the controlled quentity controlled variable of ZYT04 type permanent magnet DC motor rotating speed and send to digital-to-analogue time-sequence control module according to this deviate.

The controlled quentity controlled variable of the adjusting ZYT04 type permanent magnet DC motor rotating speed that the clock signal that digital-to-analogue time-sequence control module receive clock administration module sends and control algolithm module are sent, and according to the configuration signal of described clock signal generation TLV5639 type analog-digital chip, and the controlled quentity controlled variable of the adjusting DC motor speed receiving is sent to TLV5639 type analog-digital chip.

Claims (9)

1. a DC motor speed-regulating simulation and experiment integrated apparatus, is characterized in that: comprising:

Host computer unit, control module and direct current generator unit;

Described control module comprises: communication module, controller, D/A converter module and analog-to-digital conversion module; Communication module is connected with controller, controller is connected with D/A converter module, the output terminal of D/A converter module connects the input end of direct current generator unit, controller is connected with analog-to-digital conversion module, and the input end of analog-to-digital conversion module connects the output terminal of direct current generator unit as the input end of control module;

Described communication module adopts USB communication module;

Described direct current generator unit comprises: driver module, direct current generator, tech-generator and load; The input end of driver module connects the output terminal of D/A converter module as the input end of direct current generator unit, the output terminal of driver module connects the input end of direct current generator, the output terminal of direct current generator connects the input end of tech-generator, the output terminal of tech-generator connects the input end of analog-to-digital conversion module as the output terminal of direct current generator unit, load is connected on motor;

Described host computer unit and control module carry out two-way communication by USB communication module.

2. DC motor speed-regulating simulation and experiment integrated apparatus according to claim 1, it is characterized in that: described host computer unit, for DC motor speed-regulating emulation, set DC motor speed, set the sampling period and monitor in real time direct current generator operation conditions.

3. DC motor speed-regulating simulation and experiment integrated apparatus according to claim 1, is characterized in that: the USB communication module of described control module is for the start stop signal of the DC motor speed value that receives host computer and set and sampling period value, direct current generator and the DC motor speed data that collect are sent to host computer.

4. DC motor speed-regulating simulation and experiment integrated apparatus according to claim 1, it is characterized in that: the controller of described control module is used for the interface sequence of given D/A converter module and the interface sequence of analog-to-digital conversion module, the DC motor speed data that collect are sent to host computer unit, calculate the deviate of the DC motor speed setting value receiving and the direct current generator real-time rotate speed value collecting, and through control algolithm, calculate controlled quentity controlled variable according to this deviate, and this controlled quentity controlled variable is sent to D/A converter module.

5. DC motor speed-regulating simulation and experiment integrated apparatus according to claim 1, it is characterized in that: the analog-to-digital conversion module of described control module is for being converted to digital signal by the d. c. voltage signal of tech-generator output, i.e. the DC motor speed data of Real-time Collection direct current generator unit be sent to controller.

6. DC motor speed-regulating simulation and experiment integrated apparatus according to claim 1, it is characterized in that: the D/A converter module of described control module is used for receiving the controlled quentity controlled variable that controller sends, and this controlled quentity controlled variable is converted to d. c. voltage signal and is sent to direct current generator unit.

7. DC motor speed-regulating simulation and experiment integrated apparatus according to claim 1, is characterized in that: the driver module in described direct current generator unit is for receiving the DC low-voltage signal of D/A converter module and producing 0～220V adjustable DC output voltage signal and this adjustable DC output voltage signal is sent to direct current generator.

8. DC motor speed-regulating simulation and experiment integrated apparatus according to claim 1, is characterized in that: after the adjustable dc voltage signal that the direct current generator reception driver module in described direct current generator unit sends, rotate, its rotating speed is controlled volume; Tech-generator in direct current generator unit is used for the just tach signal of direct current generator and converts d. c. voltage signal to and send analog-to-digital conversion module to; The characteristic of load in direct current generator unit for loading to test the speed governing of direct current generator bringing onto load to direct current generator.

9. adopt DC motor speed-regulating simulation and experiment integrated apparatus claimed in claim 1 to carry out the integrated method of DC motor speed-regulating simulation and experiment, it is characterized in that: comprise the steps:

Step 1: carry out DC motor speed-regulating emulation in host computer unit;

Step 1-1: regulate and produce controlled quentity controlled variable and set up DC motor speed and time curve under different controlled quentity controlled variables;

Step 1-2: whether the rotating speed while judging direct current generator stable state by this DC motor speed and time curve in DC motor speed setting value deviation allowed band, be, performs step 2, no, performs step 1-1;

Step 2: carry out DC motor speed-regulating experiment;

Step 2-1: the start stop signal value of DC motor speed setting value, sampling period setting value and direct current generator is set in host computer unit;

Step 2-2:USB communication module receives the start stop signal value of DC motor speed setting value, sampling period setting value and direct current generator and sends controller to;

Step 2-3: controller judges whether to start direct current generator according to DC motor start-stop signal, according to sampling period setting value, clock signal to be carried out obtaining frequency doubling clock signal, execution step 2-4 after frequency multiplication, no, wait for and receive the start stop signal of direct current generator next time;

Step 2-4: controller carries out obtaining sub-frequency clock signal after frequency division to clock signal according to sampling period setting value;

Step 2-5: controller receives the real-time rotate speed value of direct current generator according to sub-frequency clock signal, the real-time rotate speed value of direct current generator sends host computer unit to through USB communication module, generates this DC motor speed time plot constantly;

Step 2-6: controller calculates the deviate of the real-time rotate speed value of DC motor speed setting value and direct current generator, calculates and produces the controlled quentity controlled variable that regulates DC motor speed according to this deviate;

Step 2-7: regulate the controlled quentity controlled variable of DC motor speed to be converted to and to control the analog voltage of driver module and send driver module to through D/A converter module;

Step 2-8: driver module, according to receive the analog voltage obtaining from D/A converter module, converts alternating voltage to direct current generator required DC voltage;

Step 2-9: direct current generator obtains its required DC voltage from driver module, and direct current generator starts to synchronize and rotate with tech-generator;

Step 2-10: tech-generator converts its tach signal analog voltage signal to and sends analog-to-digital conversion module to;

Step 2-11: analog-to-digital conversion module converts the analog voltage signal receiving from tech-generator digital quantity to and sends controller to;

Step 2-12: controller receives the digital quantity that analog-to-digital conversion module sends, i.e. the real-time rotate speed value of direct current generator according to sub-frequency clock signal;

The digital quantity that step 2-13:USB communication module receives controller sends host computer unit to and generates this DC motor speed and time curve constantly;

Step 2-14: according to DC motor speed setting value deviation range and DC motor speed time plot, whether the rotating speed while judging direct current generator stable state in DC motor speed setting value deviation allowed band, is that experiment finishes, no, performs step 1.

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