CN103367263A - 一种改进的大功率半导体模块的注塑封装结构及封装方法 - Google Patents

一种改进的大功率半导体模块的注塑封装结构及封装方法 Download PDF

Info

Publication number
CN103367263A
CN103367263A CN2013103077250A CN201310307725A CN103367263A CN 103367263 A CN103367263 A CN 103367263A CN 2013103077250 A CN2013103077250 A CN 2013103077250A CN 201310307725 A CN201310307725 A CN 201310307725A CN 103367263 A CN103367263 A CN 103367263A
Authority
CN
China
Prior art keywords
chip
injection molding
power semiconductor
packaging
common electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2013103077250A
Other languages
English (en)
Inventor
沈首良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN2013103077250A priority Critical patent/CN103367263A/zh
Publication of CN103367263A publication Critical patent/CN103367263A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本发明公开了属于半导体器件制造的封装技术范围的一种改进的大功率半导体模块的注塑封装结构及封装方法。在金属底板上焊接陶瓷绝缘片,在陶瓷绝缘片上面间隔焊接公用电极和二号芯片阳极引出,在公用电极上连接一号半导体芯片和一号芯片阴极过桥,一号芯片阴极引出从一号芯片阴极过桥上引出;二号半导体芯片焊接在二号芯片阳极引出电极上,焊在二号半导体芯片顶面上的阴极过桥与公用电极相连。本发明改进了模块塑料外壳封装结构和封装工艺,上注塑机一次注塑成型,并且一次可同时注塑多块,从而使半导体模块厚度减薄到三分之一左右,减轻了模块的重量,提高了模块的密闭性,提高了模块的封装速度,大大提高模块的可靠性和生产效率。

Description

一种改进的大功率半导体模块的注塑封装结构及封装方法
技术领域
本发明属于半导体器件制造的封装技术范围,特别涉及一种改进的大功率半导体模块的注塑封装结构及封装方法。
背景技术
传统的大功率半导体模块的封装结构如图1所示,在金属底板2上放置陶瓷绝缘片3,在陶瓷绝缘片3上面间隔焊接公用电极7和二号芯片阳极引出电极10,在公用电极7上放置一号半导体芯片4和在二号芯片阳极引出电极10上放置二号半导体芯片9,门阴极引出端子11经过塑封支撑15后从模块塑料上盖14引出,模块塑料上盖14中预埋三个电极外接螺母13,三个电极从上盖14引出后打弯,压在预埋螺母13上,由此可以看出半导体模块的封装结构形状复杂,使大功率半导体模块的厚度达到28mm以上;并且在盖上盖以前在模块空隙灌有硅凝胶及环氧树脂,两次灌封时间很长,需1-2天时间,还要进行高温固化;采用外壳式封装,给模块封装带来比较大的麻烦,由于组装的要求,厚度受到限制,很难减薄。
发明内容
本发明的目的是提出一种改进的大功率半导体模块的注塑封装结构及封装方法,其特征在于,在金属底板2上焊接陶瓷绝缘片3,在陶瓷绝缘片3上面间隔焊接公用电极7和二号芯片阳极引出电极10,在公用电极7上连接一号半导体芯片4和一号芯片阴极过桥6,一号芯片阴极引出5从一号芯片阴极过桥6上引出;二号半导体芯片9焊接在二号芯片阳极引出电极10上,焊在二号半导体芯片9顶面上的二号芯片阴极过桥8与公用电极7相连,所述两个阴极过桥将两个半导体芯片连接在一起,门阴极引出端子11经过塑封后固定在塑料外壳上,焊接在二号半导体芯片或一号半导体芯片顶面的门极和阴极内部引出线12由门阴极引出端子11从塑料外壳1顶面伸出。 
所述公用电极7、一号芯片阴极引出5和二号芯片阳极引出10均从塑料外壳1顶面伸出。
所述半导体模块的厚度为10~12mm或更薄。
一种改进的大功率半导体模块的注塑封装的封装方法,其特征在于,具体步骤如下:
1)在金属底板上焊接陶瓷绝缘片,在陶瓷绝缘片上按照大功率半导体模块的组成结构组装成裸芯,
2)在裸芯上涂敷或灌封上电子硅凝胶保护厚度为0.5~1mm, 
3)上注塑机一次注塑封装,注塑材料为pps, 阻燃温度为260℃,注塑温度为320℃,压力为80kg。
本发明的有益效果是改进了模块塑料外壳结构,上注塑机一次注塑成型,从而使半导体模块厚度减薄到三分之一左右,提高模块的密闭性,大大提高模块的可靠性和生产效率。
附图说明
图1为传统的大功率半导体模块的封装结构示意图。
图2改进的大功率半导体模块的封装结构示意图。
具体实施方式
本发明提出一种改进的大功率半导体模块的注塑封装结构及封装方法,下面结合附图予以说明。
图2所示为改进的大功率半导体模块的封装结构示意图。图中,在金属底板2上焊接陶瓷绝缘片3,在陶瓷绝缘片3上面间隔焊接公用电极7和二号芯片阳极引出电极10,在公用电极7上连接一号半导体芯片4和一号芯片阴极过桥6,一号芯片阴极引出5从一号芯片阴极过桥6上引出;二号半导体芯片9焊接在二号芯片阳极引出电极10上,焊在二号半导体芯片9顶面上的阴极过桥8与公用电极7相连,所述两个阴极过桥将两个半导体芯片连接在一起,门阴极引出端子11经过塑封后固定在模块上,焊接在二号半导体芯片9或一号半导体芯片4顶面的门极和阴极内部引出线12由门阴极引出端子11从模块塑料外壳1顶面伸出。所述公用电极7、一号芯片阴极引出5和二号芯片阳极引出10均从模块塑料外壳1顶面伸出。
所述改进的大功率半导体模块的注塑封装的具体步骤如下:
1)在金属底板上焊接陶瓷绝缘片,在陶瓷绝缘片上按照上述大功率半导体模块的组成结构组装成裸芯
2)在裸芯上涂敷或灌封上电子硅凝胶保护厚度为0.5~1mm;
3)上注塑机一次注塑封装,注塑材料为pps, 阻燃温度为260℃,注塑温度为320℃,压力为80kg。
本发明采用该改进的结构,可以使半导体模块的厚度减薄到10mm左右,并且提高模块的密闭性,大大提高模块的可靠性和生产效率。
上述电子硅凝胶属加成型液体硅橡胶体系,它从液体硅橡胶过渡到硅凝胶是通过基础聚合物分子中乙烯基(或烯丙基)与交联剂的分子中的硅氨基CSi-H在铂催化剂的存在下发生氢硅加成反应而成;具有好的绝缘性和粘接性,使其广泛应用于光学仪器、照明产品、晶体管及集成电路的涂敷及灌封。电子硅凝胶的特点如下:
1、硅凝胶是具有加成型液体硅橡胶的耐高温和耐低温性能,耐高温210℃,耐低温-80-55℃;
2、硫化时没有副产物,收缩率低,无味、无毒、无腐蚀、具有生理惰性,使用时安全可靠;
3、交联密度低,柔软,弹性率低,承受负荷力不强,可缓冲膨胀应力,防震效果显著;
4、具有优良的耐候,耐水,防潮,防污性能和高的透明性及透光率,适用于对电子元器件,光学品质,LED组件进行灌封保护,
5、低粘度,流动性好,适用于填充精密构件的微细部件。 

Claims (4)

1.一种改进的大功率半导体模块的注塑封装结构,其特征在于,在金属底板(2)上焊接陶瓷绝缘片(3),在陶瓷绝缘片(3)上面间隔焊接公用电极(7)和二号芯片阳极引出电极(10),在公用电极(7)上连接一号半导体芯片(4)和一号芯片阴极过桥(6),一号芯片阴极引出(5)从一号芯片阴极过桥(6)上引出;二号半导体芯片(9)焊接在二号芯片阳极引出电极(10)上,焊在二号半导体芯片(9)顶面上的二号芯片阴极过桥(8)与公用电极(7)相连,所述两个阴极过桥将两个半导体芯片连接在一起,门阴极引出端子(11)经过塑封后固定在塑料外壳上,焊接在二号半导体芯片或一号半导体芯片顶面的门极和阴极内部引出线(12)由门阴极引出端子(11)从塑料外壳(1)顶面伸出。
2.根据权利要求1所述改进的大功率半导体模块的注塑封装结构,其特征在于,所述公用电极(7)、一号芯片阴极引出(5)和二号芯片阳极引出(10)均从塑料外壳(1)顶面伸出。
3.根据权利要求1所述改进的大功率半导体模块的注塑封装结构,其特征在于,所述半导体模块的厚度为10~12mm或更薄。
4.一种改进的大功率半导体模块的注塑封装的封装方法,其特征在于,具体步骤如下:
1)在金属底板上焊接陶瓷绝缘片,在陶瓷绝缘片上按照大功率半导体模块的组成结构组装成裸芯,
2)在裸芯上涂敷或灌封电子硅凝胶保护,厚度为0.5~1mm, 
3)上注塑机一次注塑封装,注塑材料为高导热pps,阻燃温度为260℃,注塑温度为320℃,压力为80kg,
4)公用电极(7)、一号芯片阴极引出(5)、二号芯片阳极引出(10)和门阴极引出端子(11)均从塑料外壳(1)顶面伸出。 
CN2013103077250A 2013-07-22 2013-07-22 一种改进的大功率半导体模块的注塑封装结构及封装方法 Pending CN103367263A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2013103077250A CN103367263A (zh) 2013-07-22 2013-07-22 一种改进的大功率半导体模块的注塑封装结构及封装方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013103077250A CN103367263A (zh) 2013-07-22 2013-07-22 一种改进的大功率半导体模块的注塑封装结构及封装方法

Publications (1)

Publication Number Publication Date
CN103367263A true CN103367263A (zh) 2013-10-23

Family

ID=49368323

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013103077250A Pending CN103367263A (zh) 2013-07-22 2013-07-22 一种改进的大功率半导体模块的注塑封装结构及封装方法

Country Status (1)

Country Link
CN (1) CN103367263A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106601701A (zh) * 2017-01-19 2017-04-26 贵州煜立电子科技有限公司 大功率二端表面引出脚电子元器件立体封装方法及结构

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1219767A (zh) * 1997-12-08 1999-06-16 东芝株式会社 半导体功率器件的封装及其组装方法
CN102064158A (zh) * 2010-11-04 2011-05-18 嘉兴斯达微电子有限公司 一种紧凑型功率模块
CN102201396A (zh) * 2011-05-31 2011-09-28 常州瑞华电力电子器件有限公司 一种大规格igbt模块及其封装方法
CN202749361U (zh) * 2012-07-28 2013-02-20 江阴市赛英电子有限公司 大功率整晶圆igbt陶瓷封装外壳
CN203339138U (zh) * 2013-07-22 2013-12-11 沈首良 改进的大功率半导体模块的注塑封装结构

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1219767A (zh) * 1997-12-08 1999-06-16 东芝株式会社 半导体功率器件的封装及其组装方法
CN102064158A (zh) * 2010-11-04 2011-05-18 嘉兴斯达微电子有限公司 一种紧凑型功率模块
CN102201396A (zh) * 2011-05-31 2011-09-28 常州瑞华电力电子器件有限公司 一种大规格igbt模块及其封装方法
CN202749361U (zh) * 2012-07-28 2013-02-20 江阴市赛英电子有限公司 大功率整晶圆igbt陶瓷封装外壳
CN203339138U (zh) * 2013-07-22 2013-12-11 沈首良 改进的大功率半导体模块的注塑封装结构

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106601701A (zh) * 2017-01-19 2017-04-26 贵州煜立电子科技有限公司 大功率二端表面引出脚电子元器件立体封装方法及结构
CN106601701B (zh) * 2017-01-19 2023-03-28 贵州煜立电子科技有限公司 大功率二端表面引出脚电子元器件立体封装方法及结构

Similar Documents

Publication Publication Date Title
US8558367B2 (en) Semiconductor module
CN103994794A (zh) 流量传感器及其制造方法和流量传感器模块及其制造方法
US20140124936A1 (en) Power semiconductor module and method of manufacturing same
CN103487175A (zh) 一种塑料封装的压力传感器的制作方法
CN107209067B (zh) 温度传感器及其制造方法
CN104422558B (zh) 压力传感器封装的管芯边缘保护
Lai et al. Characterization of dual side molding SiP module
KR20150072898A (ko) 반도체 패키지 및 그 제조 방법
CN101325183B (zh) 一种超薄空腔型功率模块及其封装方法
CN103367263A (zh) 一种改进的大功率半导体模块的注塑封装结构及封装方法
CN101409157B (zh) 固体电解电容器封装方法
CN202041316U (zh) 一种透明封装热敏电阻温度传感器
CN104392969A (zh) 一种多芯片集成电路抗冲击封装结构
CN203339138U (zh) 改进的大功率半导体模块的注塑封装结构
CN103427007B (zh) 发光二极管及其封装方法
CN202633053U (zh) 一种多芯组陶瓷电容器
CN202948921U (zh) 非绝缘型功率模块
CN103511890A (zh) 一种led注塑模组
CN103971939A (zh) 染料敏化太阳电池组件的灌注封装方法
CN100521129C (zh) 大功率半导体器件电极的保护封装方法
CN203479620U (zh) 一种集成电路恒定加速度试验保护夹具
CN101764068A (zh) 一种半导体器件组件的封装方法
CN205376521U (zh) 一种非绝缘型frd模块的封装结构
CN112992794A (zh) 一种具有光学收发器的半导体封装装置及其使用方法
CN211504447U (zh) 模组化导热测温传感器

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20131023

RJ01 Rejection of invention patent application after publication