CN103325643A - Manufacturing method of light-emitting display structure - Google Patents
Manufacturing method of light-emitting display structure Download PDFInfo
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- CN103325643A CN103325643A CN2013102476003A CN201310247600A CN103325643A CN 103325643 A CN103325643 A CN 103325643A CN 2013102476003 A CN2013102476003 A CN 2013102476003A CN 201310247600 A CN201310247600 A CN 201310247600A CN 103325643 A CN103325643 A CN 103325643A
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Abstract
The invention discloses a manufacturing method of a light-emitting display structure. A substrate with the nonconductive surface is adopted, parallel array patterns formed by the stacking of a seed layer, an electrode layer and a fluorescent material layer are sequentially manufactured on the substrate through the microprocessing technology and the thin film deposition technology, and field emission material clusters are developed on the side walls of the patterns; bias voltage is exerted on the patterns arranged in parallel in an array and the field emission material clusters located on the low-voltage (cathode) side wall are induced to emit electrons; the emitted electrons can bombard the fluorescent material layer on the high-voltage (anode) surface, so that the function of light emission and display is achieved. The light-emitting display structure obtained through the manufacturing method has the advantages that the preparing technology is simple, the distance between the cathode and the anode is accurate and controllable, the cathode and the anode can be self-aligned, the problems that a solid light-emitting display structure is complex in microprocessing technology and high in aligning accuracy are solved.
Description
Technical field
The present invention relates to the luminescence display field, particularly a kind of manufacture method of luminescence display structure.
Background technology
The advantages such as field emission display (FED) has low-power consumption, the life-span is high, angle of visibility is large, high brightness and contrast get more and more people's extensive concerning.At present, in the field emission display structure of the grinding three-dimensional feds structures of constructing along the substrate surface normal direction that adopt, grid (or anode) is induced the cathode material electron emission more, and electronics transmits along the substrate normal direction.Prepare the complicated micro fabrication of this structure needs, and alignment precision requires high.Anode and cathode is made in same substrate surface, is arranged in parallel, construct new device architecture, have that preparation technology is simple, cathode and anode spacing accurately controlled and anode and cathode can realize the advantages such as autoregistration, can overcome the problem of three-dimensional feds structure.But the field-transmitting cathode emitter of planar device structure is how parallel with substrate surface at present, and electron emission is absorbed by the less anode electrode layer side surface of area, can't bombard anode surface, is difficult to realize luminescence display.
Therefore, obtain to be the electron emitter of oblique angle (0 °～90 °) and the anode and cathode patterning that is arranged in parallel at substrate surface with substrate, making the cathode emission electronics can bombard the fluorescent material of anode surface, obtain the luminescence display effect, is the difficult problem that needs overcome.
Summary of the invention
The object of the present invention is to provide a kind of manufacture method of luminescence display structure, it can be avoided, and three-dimensional luminescence display structure micro fabrication is complicated, an alignment precision requirement high-technology difficult problem.
The object of the invention to solve the technical problems realizes by the following technical solutions.The manufacture method of a kind of luminescence display structure that proposes according to the present invention, draw together following steps:
A) adopt surperficial nonconducting substrate as substrate;
B) make the stacking parallel array pattern that forms of Seed Layer, electrode layer and fluorescent material layer in conjunction with little graphics processing technology and coating technique at substrate;
C) in pattern sidewalls growth field emmision material cluster;
D) pattern parallel in the pair array applies bias voltage, induces the field emmision material cluster electron emission that is positioned at low-pressure end (negative electrode) sidewall;
E) electron emission can bombard the fluorescent material layer on high-pressure side (anode) surface, realizes luminescence display.
Manufacture method of the present invention, described dielectric substrate can be metal or the semiconductor chip that sheet glass, potsherd, flexible insulation substrate, surface are coated with insulation film, perhaps other insulating material substrate.
Manufacture method of the present invention, described little graphics processing technology can be photoetching technique, lift-off technology, laser irradiation technology, ion beam processing technology, nano impression, self-assembling technique, or other can obtain the technical method of little shape figure; Described coating technique can be magnetron sputtering, thermal evaporation, electron beam evaporation, chemical vapour deposition (CVD), ald, precipitation method deposition, electrophoretic deposition, Vacuum Arc deposition, or other can make the deposition technique of film.
Manufacture method of the present invention, described Seed Layer can be zinc, mix the zinc oxide of aluminium (AZO), zinc oxide, copper, gold, silver, electrum, iron and its oxi film, or other can be used for the material of induced material growth; Described electrode layer can be metallic film, semiconductive thin film or Graphene; Described fluorescent material layer can be that fluorescent material or other can be realized luminous material by the electronics bombardment.
Manufacture method of the present invention, described metallic film can be copper, chromium, aluminium, molybdenum, or the alloy of various metals material formation; Described semiconductive thin film can be indium tin oxide (Indium Tin Oxide) film or other semiconductive thin film.
Manufacture method of the present invention, rapid c) in, can be thermal oxidation method, hydro thermal method, chemical vapour deposition technique, degeneration at high temperature method, epitaxy in the employed technology of pattern sidewalls growth field emmision material cluster, but also can be the method for other induced material growth.
Manufacture method of the present invention, in the step d), the field emmision material cluster can be nano wire, nanotube, Graphene, nanometer rods, nanocone, nanometer sheet, or other can realize the material of Field Electron Emission.
Manufacture method of the present invention, Seed Layer can be that individual layer also can be the 2-5 layer, and metal level can be that individual layer also can be the 2-5 layer, and fluorescent material layer can be that individual layer also can be the 2-5 layer.
Manufacture method of the present invention can be by regulating the Seed Layer film thickness in 1nm～100 μ m scopes, and controlling filed emissive material cluster growth direction and substrate surface form 0～90 °; Can be by regulating the crystallization degree of Seed Layer film, i.e. amorphous, polycrystalline, crystal, controlling filed emissive material cluster growth direction and 0～90 ° of substrate surface formation.
Manufacture method of the present invention, if electrode layer has fluorescent characteristic simultaneously, or fluorescent material layer can conduct electricity, and also can only use electrode layer and need not to make fluorescent material layer again; If fluorescent material layer can conduct electricity, also can only use fluorescent material layer and need not to make again electrode layer.
Manufacture method of the present invention, pattern array is arranged in parallel at substrate surface.
It is 100V～3000V that manufacture method of the present invention, the pattern parallel in the pair array are executed biased voltage range.
By technique scheme, advantage and beneficial effect that the present invention has are:
The present invention adopts surperficial nonconducting substrate as substrate, and adopts micro-processing technology and coating technique to make successively the stacking parallel array pattern that forms of Seed Layer, electrode layer and fluorescent material layer on substrate.Adopt the Seed Layer induced growth techinque, in pattern sidewalls growth field emmision material cluster; Pattern parallel in the pair array applies bias voltage, induces the field emmision material cluster electron emission that is positioned at low-pressure end (negative electrode) sidewall; Electron emission can bombard the fluorescent material layer on high-pressure side (anode) surface, realizes the luminescence display function.The luminescence display structure that the present invention obtains has that preparation technology is simple, cathode and anode spacing accurately controlled and anode and cathode can realize the advantages such as autoregistration, can avoid that three-dimensional luminescence display structure micro fabrication is complicated, alignment precision requirement high-technology problem.
Description of drawings
Fig. 1 (a)-1 (d) is followed successively by and adopts zinc oxide nanowire as the device architecture preparation flow figure of field emmision material, and wherein the direction of growth of zinc oxide nanowire is perpendicular to substrate plane;
Fig. 2 (a)-2 (d) is followed successively by and adopts zinc oxide nanowire as the device preparation flow figure of field emmision material, and wherein the direction of growth of zinc-oxide nano line chart bunch and the angular range of substrate plane are 0-68.6 °;
Fig. 3 A is that field emmision material (zinc oxide nanowire) and substrate plane angle are 90 ° scanning electron microscopy picture;
Fig. 3 B is that field emmision material (zinc oxide nanowire) and substrate plane angle are 0-68.6 ° scanning electron microscopy picture;
Fig. 4 is for adopting zinc oxide nanowire as the field emission characteristic curve of the device of field emmision material;
Fig. 5 is for adopting zinc oxide nanowire as the demonstration luminescent image of the device of field emmision material.
Embodiment
The present invention adopts surperficial nonconducting substrate as substrate.Adopt micro-processing technology and coating technique on substrate, to make successively the stacking parallel array pattern that forms of Seed Layer, electrode layer and fluorescent material layer.Adopt the Seed Layer induced growth techinque, in pattern sidewalls growth field emmision material cluster.By regulating seed layer thickness or crystallinity, the direction of growth of controlling filed emissive material makes itself and substrate surface be special angle (0 °～90 °).Pattern parallel in the pair array applies bias voltage, induces the field emmision material cluster electron emission that is positioned at low-pressure end (negative electrode) sidewall.Electron emission can bombard the fluorescent material layer on high-pressure side (anode) surface, realizes the luminescence display function.
Below the present invention is described further by specific embodiment, but the present invention is not limited to this specific examples.
Embodiment
Adopt zinc oxide nanowire as the field emmision material fabricate devices.Because ito thin film has conductive characteristic and fluorescent characteristic simultaneously, the ito thin film that adopts in the present embodiment both as conductive layer also as the fluorescence radiation layer.
Concrete technological process is as follows:
See also shown in Fig. 1 (a)-1 (d) and Fig. 2 (a)-2 (d), the present invention adopts insulating glass substrate 1 as substrate.Adopt the optical exposure technology to make photoetching offset plate figure 2 at substrate.Make the photoetching offset plate figure parameter as follows: even spin coating last layer photoresist on the substrate, the gluing rotating speed is 1200rpm, the time is 55s, 120 ° of C baking 120s on hot plate.Adopt following condition to expose: ultraviolet light intensity: 9～10Lux, time for exposure 25s.Photoresist developing liquid is that concentration is 5 ‰ NaOH solution, developing time 30s.Adopt magnetron sputtering at sample difference plated metal zinc film and indium tin oxide (ITO) film.With shown in Fig. 2 (b), can deposit the zinc film of different crystallization degrees (amorphous/polycrystalline) such as Fig. 1 (b).
Deposition polycrystalline Al-Doped ZnO film 3 is as follows with the preparation condition of indium tin oxide (ITO) film 4:
Base vacuum: 5.0 * 10
-3Pa; Process gas: high-purity argon gas (flow: 60sccm); Working temperature: room temperature; Direct current sputtering Al-Doped ZnO film power: 300W, time: 15min, thickness: 150nm; Direct current sputtering indium tin oxide (ITO) thin film power: 300W, time: 20min, thickness 150nm.
Deposited amorphous zinc-oxide film 5 is as follows with the preparation condition of indium tin oxide (ITO) film 4:
Base vacuum: 5.0 * 10
-3Pa; Process gas: high-purity argon (Ar) gas (flow: 60sccm); Working temperature: room temperature; Direct current sputtering zinc-oxide film power: 200W, time: 6min, thickness 150nm; Direct current sputtering indium tin oxide (ITO) thin film power: 300W, time: 20min, thickness 150nm.
, adopt and peel off (Lift-off) technique at substrate making negative electrode and positive electrode pattern with shown in Fig. 2 (c) such as Fig. 1 (c).The stripping technology parameter is as follows:
The sample face down is positioned in the beaker that fills acetone (purity 99.99%) solution ultrasonic processing 30min.After ultrasonic depolymerization finishes, use respectively absolute ethyl alcohol and deionized water ultrasonic cleaning sample 30min.
With shown in Fig. 2 (d), adopt hydro thermal method to prepare the zinc oxide nanowire cluster at the Seed Layer sidewall such as Fig. 1 (d).Concrete growth conditions is as follows:
Growth-promoting media is zinc nitrate hexahydrate (Zn (NO
3)
2.6H
2O) and hexamethylenetetramine (C
6H
12N
4) mixed solution, solution concentration: 1mmol/L, liquor capacity: 180mL; With the sample face down, tilt to put into growth-promoting media; Growth temperature: 80 ° of C; Growth time: 12 hours.After growth is finished, obtain zinc oxide nanowire 6 at the Al-Doped ZnO film sidewall; Obtain zinc oxide nanowire 7 at the zinc-oxide film sidewall.
The present embodiment has obtained to adopt zinc oxide nanowire as the light-emitting display device of field emmision material.Fig. 3 A is the scanning electron microscopy picture that is grown in the zinc oxide nanowire 6 of Al-Doped ZnO film sidewall, and zinc oxide nanowire 6 is 90 ° with the angle of substrate plane, and diameter is about 400nm, and length is about 8.0m; Fig. 3 B is the scanning electron microscopy picture that is grown in the zinc oxide nanowire 7 of zinc-oxide film sidewall, and zinc oxide nanowire 7 is 0 °-68.6 ° with the angle of substrate plane, and diameter is about 150nm, and length is about 8.5m.
Adopt with the substrate surface angle be 0 °-68.6 ° zinc oxide nanowire 7 as the device of field emmision material, can realize luminescence display.Fig. 4 and Fig. 5 are respectively field emission characteristic curve and the light emitting pixel points of device.As shown in Figure 4, when device architecture is 135V at anode voltage, can obtain the field emission current of 0.1 μ A; When anode voltage was 477V, (corresponding cathode emission current density was 6.22A/cm can to obtain the maximum field emission current of 9.33 μ A
2).In test process, along with anode voltage progressively raises, luminous bright spot can be observed at the anode position of device architecture in cathode emission electronics bombardment anode ITO surface.Fig. 5 is under the different anode voltage conditions, the luminance point diagram of device architecture.As can be seen from the figure, the luminous point area increases gradually along with the rising of anode voltage.The shape of luminous bright spot and electrode strip rectangular shape match.Square bright spot length is about 500 μ m (identical with electrode strip length), and width is respectively 100 μ m (corresponding anode voltage is 450V), 215 μ m (corresponding anode voltage is 463V) and 250 μ m (corresponding anode voltage is 477V).
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, therefore every technical solution of the present invention content that do not break away from,, all still belong in the scope of technical solution of the present invention any simple modification, equivalent variations and modification that above embodiment does according to technical spirit of the present invention.
Claims (10)
1. the manufacture method of a luminescence display structure is characterized in that may further comprise the steps:
A) adopt surperficial nonconducting substrate as substrate;
B) make the stacking parallel array pattern that forms of Seed Layer, electrode layer and fluorescent material layer in conjunction with little graphics processing technology and coating technique at substrate;
C) in pattern sidewalls growth field emmision material cluster;
D) pattern parallel in the pair array applies bias voltage, induces the field emmision material cluster electron emission that is positioned at low-pressure end (negative electrode) sidewall;
E) electron emission can bombard the fluorescent material layer on high-pressure side (anode) surface, realizes luminescence display.
2. the manufacture method of luminescence display structure according to claim 1, it is characterized in that: the nonconducting substrate in described surface can be metal or the semiconductor chip that sheet glass, potsherd, flexible insulation substrate, surface are coated with insulation film, perhaps other insulating material substrate.
3. the manufacture method of luminescence display structure according to claim 1, it is characterized in that: described little graphics processing technology can be photoetching technique, lift-off technology, laser irradiation technology, ion beam processing technology, nano impression, self-assembling technique, or other can obtain the technical method of little shape figure; Described coating technique can be magnetron sputtering, thermal evaporation, electron beam evaporation, chemical vapour deposition (CVD), ald, precipitation method deposition, electrophoretic deposition, Vacuum Arc deposition, or other can make the deposition technique of film.
4. the manufacture method of luminescence display structure according to claim 1, it is characterized in that: described Seed Layer can be zinc, mix the zinc oxide of aluminium (AZO), zinc oxide, copper, gold, silver, electrum, iron and its oxi film, or other can be used for the material of induced material growth; Described electrode layer can be metallic film, semiconductive thin film or Graphene; Described fluorescent material layer can be that fluorescent material or other can be realized luminous material by the electronics bombardment.
5. the manufacture method of luminescence display structure according to claim 4, it is characterized in that: described metallic film can be copper, chromium, aluminium, molybdenum, or the alloy that consists of of various metals material; Described semiconductive thin film can be indium tin oxide (Indium Tin Oxide) film or other semiconductive thin film.
6. the manufacture method of luminescence display structure according to claim 1, it is characterized in that: in the step c), can be thermal oxidation method, hydro thermal method, chemical vapour deposition technique, degeneration at high temperature method, epitaxy in the employed technology of pattern sidewalls growth field emmision material cluster, but also can be the method for other induced material growth.
7. the manufacture method of luminescence display structure according to claim 1, it is characterized in that: in the step d), the field emmision material cluster can be nano wire, nanotube, Graphene, nanometer rods, nanocone, nanometer sheet, or other can realize the material of Field Electron Emission.
8. the manufacture method of luminescence display structure according to claim 1, it is characterized in that: Seed Layer can be that individual layer also can be the 2-5 layer, and metal level can be that individual layer also can be the 2-5 layer, and fluorescent material layer can be that individual layer also can be the 2-5 layer.
9. the manufacture method of luminescence display structure according to claim 4 is characterized in that: can be by regulating the Seed Layer film thickness in 1nm～100 μ m scopes, 0～90 ° of controlling filed emissive material cluster growth direction and substrate surface formation; Can be by regulating the crystallization degree of Seed Layer film, i.e. amorphous, polycrystalline, crystal, controlling filed emissive material cluster growth direction and 0～90 ° of substrate surface formation.
10. the manufacture method of luminescence display structure according to claim 1 is characterized in that: if electrode layer has fluorescent characteristic simultaneously, or fluorescent material layer can conduct electricity, and also can only use electrode layer and need not to make fluorescent material layer again; If fluorescent material layer can conduct electricity, also can only use fluorescent material layer and need not to make again electrode layer.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108258142A (en) * | 2018-01-12 | 2018-07-06 | 吉林大学 | A kind of method that ultrathin metal electrode is prepared based on molecular-layer deposition technology |
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| KR20050077680A (en) * | 2004-01-30 | 2005-08-03 | 한국과학기술연구원 | Synthesis method of zno nanorod and nanowire using vapor evaporation |
| CN101388319A (en) * | 2007-09-14 | 2009-03-18 | 清华大学 | Field emission polarized light source |
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Application publication date: 20130925 |