CN103311220B - A kind of circuit mending structure and method for repairing and mending - Google Patents
A kind of circuit mending structure and method for repairing and mending Download PDFInfo
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- CN103311220B CN103311220B CN201310261423.4A CN201310261423A CN103311220B CN 103311220 B CN103311220 B CN 103311220B CN 201310261423 A CN201310261423 A CN 201310261423A CN 103311220 B CN103311220 B CN 103311220B
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 239000010409 thin film Substances 0.000 claims abstract description 12
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 35
- 238000005516 engineering process Methods 0.000 claims description 6
- 238000001182 laser chemical vapour deposition Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 238000002844 melting Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 5
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052721 tungsten Inorganic materials 0.000 claims description 5
- 239000010937 tungsten Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 4
- 239000007769 metal material Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 230000006378 damage Effects 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/485—Adaptation of interconnections, e.g. engineering charges, repair techniques
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
- H01L21/76894—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
- G02F1/136263—Line defects
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Optics & Photonics (AREA)
- Nonlinear Science (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The embodiment of the invention discloses a kind of circuit mending structure and method for repairing and mending, mutually intersecting the open circuit of place formation for repairing the electric connection line that thin-film transistor array base-plate extends along different directions.Described circuit mending structure comprises to extend from the electric connection line at trip point place towards the same side and to be communicated with patch cord and the protection pattern at trip point two ends.Described patch cord is through another electric connection line crossing with trip point place electric connection line.Described protection pattern setting patch cord and patch cord through electric connection line.
Description
Technical field
The present invention relates to display floater field, particularly relate to a kind of circuit mending structure and circuit mending method of display floater.
Background technology
Existing display floater generally adopts active membrane transistor array to drive.Each pixel all needs to be connected to the operation crisscross scan line and data wire carrying out choosing and inputting display voltage.Because the pixel of existing display floater is nearly millions of, required scan line and data wire are also close to 10,000.But, as long as have several to occur open circuit in so numerous circuits, whole display floater will be caused to become substandard products, greatly have impact on the yields of display floater, increase manufacturing a finished product of display floater.
Therefore, need to provide the circuit mending method and circuit mending structure that can solve the problem.
Summary of the invention
In order to solve the problems of the technologies described above, the invention provides a kind of circuit mending structure, it is intersecting the open circuit of place formation mutually for repairing the electric connection line that thin-film transistor (ThinFilmTransistor, TFT) array base palte extends along different directions.
A kind of circuit mending structure, it is intersecting the open circuit of place formation mutually for repairing the electric connection line that thin-film transistor array base-plate extends along different directions, described thin-film transistor array base-plate comprises the scan line extended along first direction, along the data wire that second direction extends, be positioned at the TFT of scan line and data wire intersection, and the pixel electrode to be connected with TFT, described circuit mending structure comprises to extend from the electric connection line at trip point place towards the same side and to be communicated with patch cord and the amorphous silicon protection pattern at trip point two ends, described patch cord is through another electric connection line crossing with trip point place electric connection line, described amorphous silicon protection pattern setting patch cord and patch cord through electric connection line.
Wherein, other partial cut of the pixel electrode in the partial pixel electrode of other pixels of described patch cord process and respective pixel.
Wherein, described amorphous silicon protection pattern extends on the pixel electrode of the adjacent both sides of covered electric connection line.
Wherein, described amorphous silicon protection pattern only covers another electric connection line crossing with trip point place electric connection line.
Wherein, conductive metallic material to be deposited on substrate by the method for laser chemical vapor deposition and to be formed by described patch cord, the two ends of described patch cord by laser by patch cord and the mutual melting conducting of data wire.
Present invention also offers a kind of circuit mending method, described circuit mending method intersects mutual the open circuit that place formed for repairing scan line and data wire that thin-film transistor array base-plate extends along different directions, described thin-film transistor array base-plate comprises the scan line extended along first direction, the data wire extended along second direction, the pixel electrode that is positioned at scan line and the TFT of data wire intersection and is connected with TFT, and this circuit mending method comprises:
While carrying out amorphous silicon exposure technology, on scan line, the position of range sweep line and data wire intersection one preset value forms an amorphous silicon and protects pattern;
Grow patch cord respectively at the opposite end at data wire breakpoint place and be interconnected;
Cut off patch cord other parts of the pixel electrode part of process and the pixel electrode of respective pixel;
By laser, patch cord end points is on the data line communicated with data wire melting.
Wherein, the partial pixel electrode of described patch cord process is cut off by laser and other pixel electrode part.
Wherein, the material of described patch cord is tungsten.
Wherein, described protection pattern extends on the pixel electrode of the adjacent both sides of covered scan line.
Wherein, described protection pattern only covers scan line.
Circuit mending structure provided by the present invention and method for repairing and mending cause short circuit by presetting protection pattern to make patch cord directly can not be communicated with scan line because laser energy is too high through scan line on scan line.And described protection pattern completes in the lump can not increase fabrication steps when forming the amorphous silicon layer of TFT.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the circuit mending structural representation that first embodiment of the invention provides;
Fig. 2 is the protection patterning schematic diagram of the circuit mending structure of Fig. 1;
The protection patterning schematic diagram of the circuit mending structure that Fig. 3 second embodiment of the invention provides;
Fig. 4 is the flow chart of steps of the circuit mending method that the embodiment of the present invention provides;
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
See also shown in Fig. 1 and Fig. 2, the circuit mending structure 1 that first embodiment of the invention provides is intersecting the open circuit of place formation mutually for repairing the electric connection line that thin-film transistor (ThinFilmTransistor, TFT113) array base palte 11 extends along different directions.Described circuit mending structure 1 comprises to extend from the electric connection line the same side at trip point place and to be communicated with patch cord 10 and the amorphous silicon protection pattern 12 at trip point two ends.Described patch cord 10 is through another electric connection line crossing with trip point place electric connection line.Described amorphous silicon protection pattern 12 be arranged on patch cord 10 and its through electric connection line.In the present embodiment, described electric connection line can be scan line 110 in TFT113 array base palte 11 or data wire 112.
Described TFT113 array base palte 11 comprises the scan line 110 extended along first direction, the data wire 112 extended along second direction, the pixel electrode 114 that is positioned at scan line 110 and the TFT113 of data wire 112 intersection and is connected with TFT113.Described TFT113 comprises the grid 115 be connected with scan line 110, the source electrode 116 be connected with data wire 112, the drain electrode 117 be connected with pixel electrode 114 and is connected the channel layer 118 of source electrode 116 and drain electrode 117.When scan line 110 chooses the pixel at TFT113 place by grid 115, the data-signal that data wire 112 transmits is transferred on pixel electrode 114 by channel layer 118 and shows.In the present embodiment, described scan line 110 intersects vertically with data wire 112.Described trip point appears at data wire 112 place crossing with scan line 110.
The two ends of described patch cord 10 are extended the rear scan line 110 that passes by the relative both sides of trip point on data wire 112 respectively and are interconnected.The partial pixel electrode 114 of other pixels of described patch cord 10 process and other partial cut of the pixel electrode 114 in respective pixel, with the display avoiding display that patch cord 10 transmits to affect other pixels.
Described patch cord 10 passes through the method for laser chemical vapor deposition (LaserChemicalVaporDeposition) by conductive metallic material, and such as tungsten, is deposited on substrate and is formed.The two ends of described patch cord 10 by laser by patch cord 10 and data wire 112 melting conducting mutually.The partial pixel electrode 114 of described patch cord 10 process is by laser and other pixel electrodes 114 partial cut.
The material of described amorphous silicon protection pattern 12 is amorphous silicon, and it can make in the lump and not need to increase extra fabrication steps in the amorphous silicon optical cover process of TFT113.In the present embodiment, described amorphous silicon protection pattern 12 is corresponding respectively along the relative both sides perpendicular to scan line 110 direction to be extended on two pixel electrodes 114 adjacent with scan line 110, thus partly overlaps with described pixel electrode 114.Channel layer 118 material of described TFT113 is also amorphous silicon material.So described amorphous silicon protection pattern 12 can be made in the lump when forming the channel layer 118 of TFT113.Because described amorphous silicon protection pattern 12 can avoid laser to the destruction of scan line 110 when forming patch cord 10, so scan line 110 and data wire 112 can be prevented well to be short-circuited.
As shown in Figure 3; the circuit mending structure 1 that circuit mending structure 2 and first embodiment of the invention that second embodiment of the invention provides provide is substantially identical, and its difference is: two described pixel electrodes 214 that described protection pattern 22 is not adjacent with scan line 210 along the relative both sides perpendicular to scan line 210 direction have any overlapping.
As shown in Figure 4, the circuit mending method that provides of the embodiment of the present invention.Described circuit mending method is intersecting the open circuit of place formation mutually for repairing the electric connection line that thin-film transistor (ThinFilmTransistor, TFT113) array base palte 11 extends along different directions.Described TFT113 substrate comprises the scan line 110 extended along first direction, the data wire 112 extended along second direction, the pixel electrode 114 that is positioned at scan line 110 and the TFT113 of data wire 112 intersection and is connected with TFT113.This circuit mending method comprises:
Step S11, preset amorphous silicon protection pattern 12, see also Fig. 2, while carrying out amorphous silicon exposure technology, on scan line 110, range sweep line 110 forms an amorphous silicon with the position of data wire 112 intersection one preset value and protects pattern 12.Described amorphous silicon protection pattern 12 extends along the direction perpendicular to scan line 110 and covers described scan line 110 completely.In the present embodiment, described amorphous silicon protection pattern 12 extends to two adjacent pixel electrode 114 places of scan line 110 along the direction of vertical scan line 110, and partly overlaps with described adjacent pixel electrodes 114.
See also Fig. 3, be understandable that, in the embodiment that other are alternative, described amorphous silicon protection pattern 12 can't extend to pixel electrode 114 place adjacent with scan line 110.
Step S12, growth patch cord 10, the opposite end at data wire 112 breakpoint place grows patch cord 10 towards the same side respectively by the method for laser chemical vapor deposition (LaserChemicalVaporDeposition) along the direction perpendicular to data wire 112.The patch cord 10 of described breakpoint both sides grows to along the direction of vertical data line 112 respectively protects the position that pattern 12 is corresponding to transfer to grow until connect along the direction of vertical scan line 110 with amorphous silicon.Therefore, described patch cord 10 protects pattern 12 overlapping with amorphous silicon when through scan line 110.The material of described patch cord 10 is conducting metal.In the present embodiment, what growth patch cord 10 adopted is tungsten.
Step S13, cut-off parts pixel electrode 114, described patch cord 10 can respectively through the pixel electrode 114 of the adjacent both sides of scan line 110 in growth course.In order to prevent the pixel electrode 114 of process be subject to the impact of the display that patch cord 10 transmits, the partial pixel electrode 114 of patch cord 10 processes is passed through laser cutting with other parts of pixel electrode 114.
Step S14, is communicated with patch cord 10 and data wire 112, by laser by the end points of patch cord 10 on data wire 112 and data wire 112 melting, allows tungsten and lower data line 112 link together.
Directly can not be communicated with scan line 110 and cause short circuit because laser energy is too high when the circuit mending method that the present embodiment provides by presetting amorphous silicon protection pattern 12 and making patch cord 10 through scan line 110 on scan line 110.And described amorphous silicon protection pattern 12 completes in the lump can not increase fabrication steps when forming the amorphous silicon layer of TFT113.
Above disclosedly be only a kind of preferred embodiment of the present invention, certainly can not limit the interest field of the present invention with this, therefore according to the equivalent variations that the claims in the present invention are done, still belong to the scope that the present invention is contained.
Claims (10)
1. a circuit mending structure, it is intersecting the open circuit of place formation mutually for repairing the electric connection line that thin-film transistor array base-plate (11) extends along different directions, described thin-film transistor array base-plate (11) comprises the scan line (110) extended along first direction, along the data wire (112) that second direction extends, be positioned at the TFT (113) of scan line (110) and data wire (112) intersection, and the pixel electrode (114) to be connected with TFT (113), described circuit mending structure comprises to extend from the electric connection line at trip point place towards the same side and to be communicated with patch cord (10) and amorphous silicon protection pattern (12) at trip point two ends, described patch cord (10) is through another electric connection line crossing with trip point place electric connection line, described amorphous silicon protection pattern (12) be arranged on patch cord (10) and patch cord (10) through electric connection line,
Described amorphous silicon protection pattern (12) is preset on electric connection line when carrying out amorphous silicon exposure technology.
2. circuit mending structure as claimed in claim 1, it is characterized in that, the partial pixel electrode (114) of other pixels of described patch cord (10) process and other partial cut of the pixel electrode (114) in respective pixel.
3. circuit mending structure as claimed in claim 1, is characterized in that, described amorphous silicon protection pattern (12) extends on the pixel electrode (114) of the adjacent both sides of covered electric connection line.
4. circuit mending structure as claimed in claim 1, is characterized in that, described amorphous silicon protection pattern (12) only covers another electric connection line crossing with trip point place electric connection line.
5. circuit mending structure as claimed in claim 1, it is characterized in that, conductive metallic material to be deposited on substrate by the method for laser chemical vapor deposition and to be formed by described patch cord (10), the two ends of described patch cord (10) by laser by patch cord (10) and data wire (112) melting conducting mutually.
6. a circuit mending method, described circuit mending method intersects mutual the open circuit that place formed for repairing scan line (110) and data wire (112) that thin-film transistor array base-plate (11) extends along different directions, described thin-film transistor array base-plate (11) comprises the scan line (110) extended along first direction, along the data wire (112) that second direction extends, be positioned at the TFT (113) of scan line (110) and data wire (112) intersection, and the pixel electrode (114) to be connected with TFT (113), this circuit mending method comprises:
While carrying out amorphous silicon exposure technology, form an amorphous silicon at the upper range sweep line (110) of scan line (110) with the position of data wire (112) intersection one preset value and protect pattern (12);
Grow patch cord (10) respectively at the opposite end at data wire (112) breakpoint place and be interconnected;
Cut off patch cord (10) pixel electrode (114) part of process and other parts of the pixel electrode (114) of respective pixel;
By laser, the end points of patch cord (10) on data wire (112) is communicated with data wire (112) melting.
7. circuit mending method as claimed in claim 6, it is characterized in that, the partial pixel electrode (114) of described patch cord (10) process is by laser and other pixel electrodes (114) partial cut.
8. circuit mending method as claimed in claim 6, it is characterized in that, the material of described patch cord (10) is tungsten.
9. circuit mending method as claimed in claim 6, it is characterized in that, described protection pattern (12) extends on the pixel electrode (114) of covered scan line (110) adjacent both sides.
10. circuit mending method as claimed in claim 6, it is characterized in that, described protection pattern (12) only covers scan line (110).
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310261423.4A CN103311220B (en) | 2013-06-27 | 2013-06-27 | A kind of circuit mending structure and method for repairing and mending |
| US14/111,798 US9559054B2 (en) | 2013-06-27 | 2013-06-30 | Repairing line structure and circuit repairing method using same |
| PCT/CN2013/078544 WO2014205856A1 (en) | 2013-06-27 | 2013-06-30 | Circuit repair structure and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310261423.4A CN103311220B (en) | 2013-06-27 | 2013-06-27 | A kind of circuit mending structure and method for repairing and mending |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103311220A CN103311220A (en) | 2013-09-18 |
| CN103311220B true CN103311220B (en) | 2015-12-23 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310261423.4A Active CN103311220B (en) | 2013-06-27 | 2013-06-27 | A kind of circuit mending structure and method for repairing and mending |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US9559054B2 (en) |
| CN (1) | CN103311220B (en) |
| WO (1) | WO2014205856A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103744201A (en) * | 2013-12-31 | 2014-04-23 | 深圳市华星光电技术有限公司 | Liquid crystal display panel repair method and repair system |
| US9297074B2 (en) | 2013-12-31 | 2016-03-29 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Liquid crystal display panel repairing method and repairing system |
| CN104280967A (en) * | 2014-10-31 | 2015-01-14 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate, display panel and display device |
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| CN103311220A (en) | 2013-09-18 |
| US20160118330A1 (en) | 2016-04-28 |
| WO2014205856A1 (en) | 2014-12-31 |
| US9559054B2 (en) | 2017-01-31 |
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