CN103296880B - Low-power-consumption boost DC-DC converter started at ultralow voltage - Google Patents
Low-power-consumption boost DC-DC converter started at ultralow voltage Download PDFInfo
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- CN103296880B CN103296880B CN201310188331.8A CN201310188331A CN103296880B CN 103296880 B CN103296880 B CN 103296880B CN 201310188331 A CN201310188331 A CN 201310188331A CN 103296880 B CN103296880 B CN 103296880B
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Abstract
The invention discloses a low-power-consumption boost DC-DC converter started at ultra-low voltage, which is characterized in that an internal power supply selection 101, an internal reference and bias 102, a PMOS (P-channel metal oxide semiconductor) power tube 103, an NMOS (N-channel metal oxide semiconductor) power tube 104, an inductive current detection resistor 105, a leading edge blanking unit 106, a cycle-by-cycle overcurrent protection comparator 107, a PWM (pulse width modulation) comparator 108, a control logic and drive 109, an oscillator 110, an ultra-low voltage oscillator 111, a standby signal processing 112, a no-load detection comparator 113, an error amplifier 114, an output voltage feedback divider resistor 115, an output voltage feedback divider resistor 116, a control switch 118 and an enable 117 are fixedly connected and arranged in a control chip 100. The invention is particularly suitable for the boosting application of the mobile phone backup power supply and the mobile power supply.
Description
Technical field
The present invention relates to the low-power consumption boost type dc-dc that a kind of ultralow pressure starts.
Background technology
Boost type dc-dc is widely used in electronic equipment.In recent years along with the rise of smart mobile phone, its supporting portable power source is more and more welcome, and boost type dc-dc is as the chief component of portable power source, in order to reduce the requirement to portable power source its cells, people wish that the input voltage range of the DC-DC boost converter that portable power source configures is more wide better, the cell voltage that can normally use is more low better, and require that DC-DC boost converter operating current, standby current are more low better, be beneficial to the utilance and the prolongs standby time that improve the energy content of battery.But boost type dc-dc common is in the market difficult to meet above requirement simultaneously.
Summary of the invention
For solving above-mentioned existing shortcoming, the low-power consumption boost type dc-dc that main purpose of the present invention is to provide a kind of ultralow pressure of practicality to start, the low-power consumption boost type dc-dc that can start under ultralow input voltage, start under the condition that this DC-DC boost converter can be powered at single battery (1.2V) and normal work, operating current is lower than 100uA, and have automatic standby function, when output does not have load, automatically enter standby, time standby, average current is lower than 1uA, be particularly suitable for mobile phone backup power, the boosting application of portable power source.
For reaching above-described object, the low-power consumption boost type dc-dc that a kind of ultralow pressure of the present invention starts takes following technical scheme:
The low-power consumption boost type dc-dc that a kind of ultralow pressure starts, comprise control chip 100, control chip 100 inside comprises control logic and drives 109, control logic is connected with PMOS power tube 103 with driving 109, be connected with internal electric source between PMOS power tube 103 and internal reference and biased 102 and select 101, control logic is all connected with NMOS power tube 104 with driving 109 and PMOS power tube 103, control logic and drive 109 and NMOS power tube 104 between be connected with lead-edge-blanking unit 106, lead-edge-blanking unit 106 and be connected with Cycle by Cycle overcurrent protection comparator 107 between control logic and driving 109, PWM comparator 108 and oscillator 110, control logic is also connected with upsilonitra-low-voitage oscillator 111 and standby signal process 112 with driving 109, upsilonitra-low-voitage oscillator 111 is detected comparator 113 with standby signal process 112 with zero load and is connected, error amplifier 114 is connected with in turn between unloaded detecting comparator 113 and control switch 118, output voltage feedback divider resistance 115, control switch 118 is also connected with PMOS power tube 103, and control chip 100 is also provided with switch pin SW, enable pin EN, output pin Vout, input voltage vin and GND pin,
Described enable pin EN, for being inputted high/low level by outside and determined whether chip 100 is opened;
Described upsilonitra-low-voitage oscillator 111 is for when input voltage vin is less than 1.2V, and clocking is used for PMOS power tube 103 and NMOS power tube 104, and chip 100 also can be started under ultralow input voltage;
Described internal electric source selects 101 for generation of built-in power supply, powers, and compared the voltage of SW and Vout voltage by internal comparator to each device of chip internal, and select voltage high one as builtin voltage.
Feature of the present invention is also:
Wherein the voltage of control chip 100 SW is before being initiated equal with input voltage vin, and the voltage of Vout voltage ratio SW is low, therefore the internal power supply of control chip is SW, after control chip 100 starts output voltage Vout raise gradually and voltage higher than SW time, internal electric source selects 101 to select output voltage Vout to be power supply.
When wherein input voltage vin is lower than 2V, upsilonitra-low-voitage oscillator 111 clocking is used for PMOS power tube 103 and NMOS power tube 104.
Wherein oscillator 110 clock signal CLK, also exports sawtooth signal, for being superimposed upon inductor current signal.
Adopt the present invention of as above technical scheme, there is following beneficial effect:
The low-power consumption boost type dc-dc that can start under ultralow input voltage, start under the condition that this DC-DC boost converter can be powered at single battery (1.2V) and normal work, operating current is lower than 100uA, and have automatic standby function, when output does not have load, automatically enter standby, time standby, average current is lower than 1uA, is particularly suitable for the boosting application of mobile phone backup power, portable power source.
Accompanying drawing explanation
Fig. 1 is cut-away view of the present invention.
Fig. 2 is the internal circuit diagram of upsilonitra-low-voitage oscillator of the present invention.
Fig. 3 is each node oscillogram of upsilonitra-low-voitage oscillator of the present invention.
Fig. 4 is the waveform schematic diagram of standby signal processing unit of the present invention.
Embodiment
To be described further the present invention by embodiment below, the description of these embodiments is not limit content of the present invention.One skilled in the art will understand that the equivalent replacement that content of the present invention is done, or improve accordingly, still belong within protection scope of the present invention.
As shown in Figure 1, the low-power consumption boost type dc-dc that a kind of ultralow pressure of the present invention starts, wherein control chip 100 has four pins, is respectively switch pin SW, connects input voltage by inductance; By the high/low level of outside input, enable pin EN, for determining whether chip 100 is opened; Output pin Vout, for exporting the output voltage of fixing (such as 5V); GND pin, as the reference ground of whole chip.Control chip 100 inside is fixedly connected with and arranges internal electric source selection 101, internal reference and biased 102, PMOS power tube (high-side) 103, NMOS power tube (low-side) 104, inductive current detecting resistance 105, lead-edge-blanking unit 106, Cycle by Cycle overcurrent protection comparator 107, PWM (pulse-width modulation) comparator 108, control logic and driving 109, oscillator 110, upsilonitra-low-voitage oscillator 111, standby signal process 112, unloaded detecting comparator 113, error amplifier 114, output voltage feedback divider resistance 115, output voltage feedback divider resistance 116, control switch 118 and enable 117.Internal electric source selects 101 for generation of built-in power supply, power to each device of chip internal, it is compared SW voltage and Vout voltage by internal comparator, which voltage compare is high, just select this voltage as internal electric source, therefore before chip does not start, SW voltage equals input voltage vin, and Vout voltage is provided by the body diode of PMOS power tube 103 by SW, therefore Vout voltage ratio SW voltage is low, so now the internal power supply of chip is SW; When after boost DC-DC chip enable, output voltage starts slowly to raise, and finally higher than SW voltage, therefore, chip internal electrical source exchange becomes output voltage Vout to provide.Internal reference and biased 102 is for generation of reference voltage ref1, ref2, ref3 etc., and the bias current that each device is required when normally working, also produce the signal PG that benchmark sets up OK simultaneously, when supply voltage is elevated to a certain degree, internal reference could normally work with biased 102, now PG is overturn by low level is high level, represent chip power enough high, inner each device can be made normally to work, and after PG upset, chip internal major part analog circuit just starts normal work.During NMOS power tube 104 conducting as low-side; SW is grounded by inductive current detecting resistance 105; inductance two ends pressure differential deltap V is close to output voltage Vin; inductive current starts to rise; when inductive current rises to Cycle by Cycle overcurrent protection threshold value or NMOS power tube 104 ON time reaches the duty ratio determined by PWM comparator 108; switch NMOS power tube 104 turns off; as PMOS power tube 103 conducting of high-side; to inductance afterflow; inductive current flows into Vout from Vin, provides energy to output.The real-time current of inductance when inductive current detecting resistance 105 is for detecting 104 conducting of low-sideNMOS power tube, PWM comparator 108 is input to after the various possible interference of lead-edge-blanking 106 filtering, the conducting duty ratio of switch NMOS power tube 104 is decided compared with outputing signal comp with error amplifier 114, thus participate in loop control, in addition in order to ensure the safety of system, CS signal is also sent to Cycle by Cycle overcurrent protection comparator 107, compare with internal reference voltage ref2, once inductive current reaches overcurrent protection threshold value, switch NMOS power tube 104 turns off immediately.Output voltage feedback divider resistance 115 and output voltage feedback divider resistance 116 form feedback network, output voltage is fed back to error amplifier 114, and compared with internal reference voltage ref1, when the output voltage is low, feedback voltage FB is less than ref1, then the output comp voltage of error amplifier 114 raises, NMOS power tube 104 conducting duty ratio increases, the energy that each cycle transmits to output increases, and output voltage slowly raises, and is finally stabilized in set point.In addition, when output loading reduces, comp voltage also can reduce to make the conducting duty ratio of switch NMOS power tube 104 to reduce, when load reduction to a certain extent, illustrate that load (mobile phone or other electronic equipment) charging of boosting is filled with, when then comp is reduced to and is less than internal reference voltage ref3, it is high level that the output signal noload of unloaded detecting comparator 113 is overturn by low level, and be input to standby signal process 112, standby signal process 112 can export standby shutdown signal OFF after of short duration time delay, OFF signal is input to each device, it can by the device Close All except upsilonitra-low-voitage oscillator 111, feedback network is also cut off simultaneously, to reduce power consumption, shut-in time be Toff (about several seconds) during this period of time chip internal only have upsilonitra-low-voitage oscillator 111 and standby signal process 112 in work, the operating current of chip is lower than 1uA, after the Toff time, the upset of OFF signal is low level, the each module of chip internal starts again normal work, output voltage can be set up within 1ms, and again detect output loading, if export still unloaded, then after unlatching 1ms, noload signal overturns again, OFF signal overturns as high level thereupon, internal electric source selects 101 again to cut out Toff, that is when output no-load, chip can open 1ms (as shown in Figure 4) every a few second, average opening time during whole like this zero load only has a few one thousandth, the electric current of system consumption also can be less than 1uA, thus ensure extremely low stand-by power consumption, be particularly conducive to the utilization ratio and service time that improve portable power source.When input voltage vin is very low (lower than 2V), the analog circuit unit of general chip internal, particularly internal reference circuit and Ge Lu bias current cannot normally work, and therefore general chip cannot start.Upsilonitra-low-voitage oscillator 111 is for very low (such as by single-unit 1.5V powered battery in input voltage vin, cell voltage may be low to moderate 1.2V) time, clocking is used for PMOS power tube 103 and NMOS power tube 104, chip also can be started under ultralow input voltage, will start after chip enable to provide energy to output end vo ut, output voltage is made to increase, then the effect of 101 is selected by internal electric source, turn by Vout to inner each module for power supply, when Vout is elevated to a certain degree, inner each analog circuit unit can normally work, the upset of PG signal is high level, now upsilonitra-low-voitage oscillator 111 quits work, oscillator 110 starts as chip provides clock signal accurately to participate in control switch pipe.When chip detects zero load, when entering standby, internal module all quits work, and upsilonitra-low-voitage oscillator is started working again, for standby signal processing unit provides clock, for timing Toff duration.Oscillator 110, except clock signal CLK, also can export a sawtooth signal, for being superimposed upon inductor current signal, as slope compensation, when being greater than 50% with convenient NMOS power tube 104 conducting duty ratio, ensures the stability of system.Whether the signal EN that enable unit is used for inputting according to outside enable pin decides chip and opens, its inside enable signal Enable produced is input to modules, control the operating state of inner all unit, when EN is high level, chip is started working, when EN is low level, chip does not work, and current sinking is zero.Control logic and driver element 109 are for carrying out the break-make of control switch PMOS power tube 103 and NMOS power tube 104 according to each input signal.
As shown in Figures 2 and 3, as long as input voltage vin is higher than the unlatching threshold value (Vth is about 0.7V) of common CMOS process device, just can start working, clocking.It is end to end by five unit 130 repeated, and control logic 150 forms.Wherein repetitive 130 is by resistance 131,132, and electric capacity 133 and nmos switch pipe 134 form, wherein one end of one end contact resistance 132 of resistance 133 connects the drain terminal of the switching tube of the 5th repetitive simultaneously, another termination internal electric source vdd of resistance 131, the other end of resistance 132 connects the top crown of electric capacity 133 and the grid of switching tube 134, the bottom crown ground connection of electric capacity 133, the drain terminal of switching tube 134 connects two resistance intermediate nodes of second unit, the drain terminal of the source connection control logic breaker in middle pipe 156 of switching tube 134, repetitive used successively cascaded series circularizes oscillator, control logic 150 is by inverter 151, 153, with door 152, 155, NAND gate 154, PMOS switch pipe 157 and nmos switch pipe 156 form, wherein the input of inverter 151 connects the node 201 in repetitive 130, the output of 151 connects an input with door 152, the node 204 of another input connection the 4th repetitive of 152, the output of 152 is ultralow pressure clock signal clk 1, the input of inverter 153 connects noload signal, input connects an input of NAND gate 154, another input of 154 connects PG signal, the output of 154 connects an input with door 155, another input of 155 connects Enable signal, the grid of the output connecting valve pipe 157 and 156 of 155, the source electrode of PMOS switch pipe 157 meets internal electric source vdd, the drain electrode of 157 connects the resistance intermediate node 211 of first repetitive, the drain electrode of nmos switch pipe 156 connects the source electrode of the nmos switch pipe 134 of all repetitives, the source ground of 156.When enable signal Enable is high level, chip will be started working, if now input voltage is lower, internal electric source vdd is not high enough, namely when PG is low level or chip when to be in no-load standby closed condition and noload be high level, ring oscillator is started working, and its each main nodes waveform as shown in Figure 3.Ultralow pressure clock signal clk 1 Direct driver PMOS power tube 103 and NMOS power tube 104, switch NMOS power tube 104, with 80% fixing duty ratio conducting, makes output voltage Vout raise gradually, and now, loop is no work also, inoperative.When enable signal is low level, or Vout is elevated to a certain degree, internal electric source is high to modules can be made normally to work, namely PG is high level and system is in when non-standby state and noload are low level, upsilonitra-low-voitage oscillator 111 quits work, clock is provided by oscillator 110, and loop starts the control output voltage that works.
Claims (4)
1. the low-power consumption boost type dc-dc of a ultralow pressure startup, it is characterized in that, comprise control chip (100), control chip (100) inside comprises control logic and driving (109), control logic is connected with PMOS power tube (103) with driving (109), be connected with internal electric source between PMOS power tube (103) and internal reference and biased (102) to select (101), control logic is all connected with NMOS power tube (104) with driving (109) and PMOS power tube (103), control logic and be connected with lead-edge-blanking unit (106) between driving (109) and NMOS power tube (104), lead-edge-blanking unit (106) and be connected with Cycle by Cycle overcurrent protection comparator (107) between control logic and driving (109), PWM comparator (108) and oscillator (110), control logic is also connected with upsilonitra-low-voitage oscillator (111) and standby signal process (112) with driving (109), upsilonitra-low-voitage oscillator (111) is detected comparator (113) with standby signal process (112) with zero load and is connected, error amplifier (114) is connected with in turn between unloaded detecting comparator (113) and control switch (118), output voltage feedback divider resistance (115), control switch (118) is also connected with PMOS power tube (103), and control chip (100) is also provided with switch pin SW, enable pin EN, output pin Vout, input voltage vin and GND pin,
Described enable pin EN, for being inputted high/low level by outside and determined whether chip (100) is opened;
Described upsilonitra-low-voitage oscillator (111) is for when input voltage vin is less than 1.2V, clocking is used for PMOS power tube (103) and NMOS power tube (104), and chip (100) also can be started under ultralow input voltage;
Described internal electric source selects (101) for generation of built-in power supply, powers, and compared SW voltage and Vout voltage by internal comparator to each device of chip internal, and select voltage high one as builtin voltage.
2. the low-power consumption boost type dc-dc of a kind of ultralow pressure startup according to claim 1, it is characterized in that, the voltage of described control chip (100) SW is before being initiated equal with input voltage vin, and the voltage of Vout voltage ratio SW is low, therefore the internal power supply of control chip is SW, after control chip (100) starts output voltage Vout raise gradually and voltage higher than SW time, internal electric source selects (101) to select output voltage Vout to be power supply.
3. the low-power consumption boost type dc-dc of a kind of ultralow pressure startup according to claim 1, it is characterized in that, when described input voltage vin is lower than 2V, upsilonitra-low-voitage oscillator (111) clocking is used for PMOS power tube (103) and NMOS power tube (104).
4. the low-power consumption boost type dc-dc of a kind of ultralow pressure startup according to claim 1, it is characterized in that, described oscillator (110) clock signal CLK, also exports sawtooth signal, for being superimposed upon inductor current signal.
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| CN104079157B (en) * | 2014-06-19 | 2016-08-24 | 南京微盟电子有限公司 | A kind of ultralow pressure start-up circuit of synchronous boost dc-dc |
| US9602088B1 (en) * | 2015-09-11 | 2017-03-21 | Texas Instruments Incorporated | Ultra-low power comparator with sampling control loop adjusting frequency and/or sample aperture window |
| TWI603872B (en) * | 2015-11-13 | 2017-11-01 | 財團法人工業技術研究院 | Power supply device and power supply method for cruise control |
| CN107134922B (en) * | 2017-07-05 | 2023-10-31 | 郑州工业应用技术学院 | Conversion circuit of power supply for instrument |
| US10615626B2 (en) * | 2017-08-08 | 2020-04-07 | Linear Technology Holding Llc | Open circuit-based Rx power limiter for wireless power transfer |
| CN109066842A (en) * | 2018-07-27 | 2018-12-21 | 上海与德通讯技术有限公司 | Terminal device, charge control method and computer readable storage medium |
| CN108717158B (en) * | 2018-08-29 | 2020-06-16 | 电子科技大学 | Negative pressure detection circuit suitable for dead time control |
| CN113271019B (en) * | 2021-06-28 | 2021-12-07 | 湖南宏微电子技术有限公司 | Microcircuit DC-DC converter and conversion method thereof |
| CN113488975B (en) * | 2021-08-12 | 2023-08-25 | 上海晶丰明源半导体股份有限公司 | Output short-circuit protection method, power management chip and switching power supply |
| CN113484602B (en) * | 2021-08-20 | 2024-04-30 | 杭州朔天科技有限公司 | Ultra-low power consumption programmable power supply voltage detection circuit |
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Effective date of registration: 20220523 Address after: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee after: Tuoer Microelectronics Co.,Ltd. Address before: 710071 No. 2 Taibai South Road, Shaanxi, Xi'an Patentee before: XIDIAN University |