CN103280411A - Aluminum gasket forming method - Google Patents
Aluminum gasket forming method Download PDFInfo
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- CN103280411A CN103280411A CN2013101956056A CN201310195605A CN103280411A CN 103280411 A CN103280411 A CN 103280411A CN 2013101956056 A CN2013101956056 A CN 2013101956056A CN 201310195605 A CN201310195605 A CN 201310195605A CN 103280411 A CN103280411 A CN 103280411A
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- aluminium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention discloses an aluminum gasket forming method. The method comprises the following steps of: precipitating an aluminum gasket in at least two steps, wherein the temperature of first precipitation is lower than the temperature of second precipitation. According to the aluminum gasket forming method, a first thin aluminum layer grows at a low temperature during the first precipitation, a second aluminum layer grows at a high temperature, and the growing environmental temperature of the first aluminum layer is low, so that crystal particles in the first aluminum layer are smaller, the surface is flat, and a surface medium layer is controlled effectively; and when the second aluminum layer grows in a high temperature environment, cooling buffering time is provided, the surface temperature of a wafer is lowered, and the surface of a first aluminum layer medium is flat, so that stress is easy to release, the defect of whiskers is reduced, whiskers are etched away easily in a subsequent metal wire pattern forming process, the defects of the aluminum gasket are avoided or reduced, and the yield of a product is increased.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly relate to a kind of aluminium liner formation method.
Background technology
In passivation layer (passivation layer) technology of semiconductor rear section, need the patterned aluminium liner of one deck (Al pad) structure, described aluminium liner is formed on the metal interconnecting layer upper end, as the lead end of test electric connection and encapsulation.
Aluminium gasket construction of the prior art as shown in Figure 1.Wherein: Semiconductor substrate 100 has metal interconnecting layer; Passivation layer 110 is positioned on the described Semiconductor substrate 100, described passivation layer 110 generally is made up of silica, silicon nitride, silicon oxynitride etc., as the barrier layer that prevents metal diffusion in the Semiconductor substrate 100, described passivation layer 110 is etched to go out a passivation layer window 111, and described passivation layer window 111 exposes the metal interconnecting layer in the described passivation layer 110; Aluminium liner 120 is positioned on the described passivation layer 110, and described aluminium liner 120 is connected with metal interconnecting layer in the described passivation layer 110 by described passivation layer window 111.Yet along with the development of semiconductor technology processing procedure, semiconductor technology is from 130nm to 45nm, even progressive change has also taken place for the described passivation layer of back segment and the thickness of aluminium liner to 28nm, described aluminium liner from
Arrive
Even there is product aluminium liner thickness to surpass
Prior art generally adopts PVD (physical vapor liner) step sedimentation to come the deposition of aluminum liner, because consider the step covering power of aluminium liner, its ambient temperature generally can be selected the high temperature about 270 ℃.But the aluminium pad surfaces defective that adopts this method to obtain is obvious, as shown in Figure 2.And, in like this hot environment behind the deposition of aluminum liner, wafer (wafer) is placed in the room temperature environment, because temperature difference reason, the aluminium liner produces bigger stress, cause crystal column surface to produce palpus shape (whisker) defective, in addition, aluminium pad surfaces whisker defective is subjected to the influence of substrate surface situation also bigger.When the size of Whisker defective is enough big, can cause the short circuit of adjacent aluminium liner; And in follow-up metallization pattern etching process procedure, cause etching unclean, and form as shown in Figure 3 residual, influence yield.Fig. 4 is the distributed number figure of aluminium liner of the prior art metallization etching rear surface whisker defects, and as seen from Figure 4, the Whisker defects count is many and be distributed on the whole wafer, has a strong impact on the yield of product (product).Therefore, when the deposition of aluminum liner process, the quantity that reduces the whisker defective is the technological parameter of a key.
Summary of the invention
The objective of the invention is to, a kind of aluminium liner formation method is provided, can avoid or reduce the defective of aluminium liner, thereby improve the yield of product.
For solving the problems of the technologies described above, the invention provides a kind of aluminium liner formation method, comprise and divide at least twice deposition with the aluminium liner that wherein, the temperature of deposition is lower than the temperature of deposition for the second time for the first time.
Further, described aluminium liner formation method comprises:
Semiconductor substrate is provided;
Carry out the deposition first time, at described Semiconductor substrate deposition first aluminium lamination;
Carry out the deposition second time, at described first aluminium lamination deposition, second aluminium lamination.
Further, described first time deposition and the second time being deposited on different reaction chambers carries out.
Further, the thickness of described first aluminium lamination be the aluminium liner thickness 1/8～1/4.
Further, the thickness of described first aluminium lamination
Further, the temperature that deposits the described first time is 100 ℃～220 ℃.
Further, the temperature that deposits the described first time is 200 ℃.
Further, the dc electric power that deposits the described first time is 28 kilowatts～35 kilowatts.
Further, the temperature that deposits the described second time is 250 ℃～300 ℃.
Further, the temperature that deposits the described second time is 270 ℃.
Further, the dc electric power that deposits the described second time is 20 kilowatts～25 kilowatts.
Compared with prior art, aluminium liner formation method provided by the invention has the following advantages:
1, in the aluminium liner formation method provided by the invention, divides at least twice deposition with the aluminium liner, wherein, the temperature of deposition is lower than the temperature of deposition for the second time for the first time, compared with prior art, the aluminium liner is divided at least twice deposition, deposits the first thin aluminium lamination of growing at low temperatures for the first time, second aluminium lamination is at high temperature grown, because the ambient temperature of described first aluminium lamination growth is low, so the described first aluminium lamination crystal grain is less, surfacing, surface media have also obtained effective control; When under the described second aluminium lamination hot environment, growing, because cooling buffer time has been arranged, wafer surface temperature can descend, and the described first aluminium lamination dielectric surface is smooth, thereby discharge stress easily, reduced the whisker defective, make in follow-up metal line pattern forming process etched easily, thereby avoid or reduce the defective of aluminium liner, to improve the yield of product.
2, in the aluminium liner formation method provided by the invention, when described first aluminium lamination of low-temperature epitaxy, strengthened the dc electric power of target, the aluminium ion that sputters out has bigger kinetic energy, thereby has realized good passivation layer step covering power.
Description of drawings
Fig. 1 is aluminium gasket construction schematic diagram of the prior art;
Fig. 2 is the surface sweeping electronic pictures of aluminium liner deposition of the prior art rear surface;
Fig. 3 is the surface sweeping electronic pictures of aluminium liner metallization etching of the prior art rear surface whisker defects;
Fig. 4 is the distributed number figure of aluminium liner metallization etching of the prior art rear surface whisker defects;
Fig. 5 is the flow chart of aluminium liner formation method in one embodiment of the invention;
Fig. 6 is the surface sweeping electronic pictures of the aluminium liner deposition rear surface in one embodiment of the invention;
Fig. 7 is the distributed number figure of the aluminium liner metallization etching rear surface whisker defects in one embodiment of the invention;
Fig. 8 is the surface sweeping electronic pictures of the aluminium liner section in one embodiment of the invention.
Embodiment
Below in conjunction with schematic diagram aluminium liner formation method of the present invention is described in more detail, the preferred embodiments of the present invention have wherein been represented, should be appreciated that those skilled in the art can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
For clear, whole features of practical embodiments are not described.In the following description, be not described in detail known function and structure, the confusion because they can make the present invention owing to unnecessary details.Will be understood that in the exploitation of any practical embodiments, must make a large amount of implementation details to realize developer's specific objective, for example according to relevant system or relevant commercial restriction, change into another embodiment by an embodiment.In addition, will be understood that this development may be complicated and time-consuming, but only be routine work to those skilled in the art.
In the following passage, with way of example the present invention is described more specifically with reference to accompanying drawing.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the purpose of the aid illustration embodiment of the invention lucidly.
Core concept of the present invention is, a kind of aluminium liner formation method is provided, and comprises dividing at least twice deposition with the aluminium liner, and wherein, the temperature of deposition is lower than the temperature of deposition for the second time for the first time, thereby avoids or reduce the defective of aluminium liner, to improve the yield of product.
Further, described aluminium liner formation method comprises:
Step S11 provides Semiconductor substrate;
Step S12 carries out the deposition first time, at described Semiconductor substrate deposition first aluminium lamination;
Step S13 carries out the deposition second time, at described first aluminium lamination deposition, second aluminium lamination.
Below please specify content of the present invention in conjunction with Fig. 5, wherein, Fig. 5 is the flow chart of aluminium liner formation method in one embodiment of the invention, in the present embodiment, deposits described aluminium liner at twice.
At first, carry out step S11, Semiconductor substrate is provided, described Semiconductor substrate has metal interconnecting layer, in addition, can also have a passivation layer on the described Semiconductor substrate, to prevent metal diffusion in the described Semiconductor substrate.
Then, carry out step S12, carry out the deposition first time, at described Semiconductor substrate deposition first aluminium lamination.Needs being carried out the Semiconductor substrate of aluminium liner deposition inserts in the deposition reaction chamber, heater in the reaction chamber heats described Semiconductor substrate, in reaction chamber, feed reacting gas gas, provide dc electric power to target, to form described first aluminium lamination in described Semiconductor substrate.
In step S12, the temperature that deposit the described first time is lower than the temperature that deposit the described second time, and the rising of ambient temperature can increase the step covering power of aluminium liner, but can increase the stress of aluminium liner; Temperature is low excessively, aluminium liner step covering power extreme difference, in the practical application, take all factors into consideration the factor of two aspects, select to help the factor of aluminium liner growth, what the temperature that deposit the described first time was preferable is 100 ℃～220 ℃, be preferably 200 ℃, can make the crystal grain of aluminium in the described aluminium liner that grows out less, surfacing, surface media also is under control, and is etched easily in follow-up metal line pattern forming process.
In the present embodiment, described first time, the dc electric power of deposition was 28 kilowatts～35 kilowatts, and higher electric field energy can strengthen the etching of target, the ion that sputters out has bigger kinetic energy, thereby also can cover passivation layer surface fully equably even can satisfy under lower temperature.
Wherein, the height of described first aluminium lamination is according to the difference of target total height, generally, the thickness of controlling described first aluminium lamination be the aluminium liner thickness 1/8～1/4, the excessive height of described first aluminium lamination can reduce the stress of the height of described second aluminium lamination, but can reduce described aluminium liner step covering power, the thickness of described first aluminium lamination
Be preferably
The blemish of the described aluminium liner of reduction that can be preferable, and can make described aluminium liner have good step covering power.But the thickness of described first aluminium lamination is not limited to be 1/8～1/4 of the thickness of aluminium liner, as long as the thickness of described first aluminium lamination can satisfy the beneficial effect that reduces defective, also within thought range of the present invention.
At last, carry out step S13, carry out the deposition second time, at described first aluminium lamination deposition, second aluminium lamination.Described Semiconductor substrate is inserted in the deposition reaction chamber, heater in the reaction chamber heats described Semiconductor substrate, in reaction chamber, feed reacting gas gas, provide dc electric power to target, to form described second aluminium lamination in described Semiconductor substrate.
In an embodiment of the present invention, owing to deposit described aluminium liner at twice, so the described second aluminium lamination height is the height that described aluminium liner height deducts described first aluminium lamination, if namely the described first aluminium lamination height is 1/4 of total height, so described second aluminium lamination is 3/4 of total height.
In step S13, deposit the described first time with depositing for the second time and can carry out at different reaction chambers, the different reaction chamber (chamber) that is generally same board carries out, and is conducive to improve stability and the efficient of technology.What the temperature that deposit the described second time was preferable is 250 ℃～300 ℃, is preferably 270 ℃, can improve the step covering power of described second aluminium lamination.What in the present embodiment, the dc electric power that deposits the described second time was preferable is 20 kilowatts～25 kilowatts.But temperature and the dc electric power that deposit the described second time are not limited to above-mentioned scope.
Because the aluminium liner is divided at least twice deposition, deposit the first thin aluminium lamination of growing at low temperatures for the first time, second aluminium lamination is at high temperature grown, because the ambient temperature of described first aluminium lamination growth is low, so, the described first aluminium lamination crystal grain is less, surfacing, and surface media has also obtained effective control.Fig. 6 is the surface sweeping electronic pictures of the aluminium liner deposition rear surface in one embodiment of the invention, and as seen from Figure 6, than prior art, the aluminium pad surfaces surface smoothness that adopts present embodiment to obtain obviously improves.
When under the described second aluminium lamination hot environment, growing, because cooling buffer time has been arranged, wafer surface temperature can descend, and the described first aluminium lamination dielectric surface is smooth, thereby discharge stress easily, reduced the whisker defective, make in follow-up metal line pattern forming process etched easily, thereby avoid or reduce the defective of aluminium liner, to improve the yield of product.Adopt the details in a play not acted out on stage, but told through dialogues scanner that the metallization of the aluminium liner in one embodiment of the invention etching rear surface is scanned, Fig. 7 is the distributed number figure of the aluminium liner metallization etching rear surface whisker defects in one embodiment of the invention, wherein, Fig. 3 is the whisker defect distribution of utilizing identical formula to scan with Fig. 7, as seen, the metallization of the aluminium liner in one embodiment of the invention etching rear surface whisker defects obviously reduces.Fig. 8 is the surface sweeping electronic pictures of the aluminium liner section in one embodiment of the invention, adopts the inventive method to grow
The aluminium liner of thickness, the surface sweeping electronic pictures of aluminium liner section shows, utilizes method of the present invention, and the step covering power of described aluminium liner is good, and surface media is under control between two bed boundarys.
The present invention is not limited to above embodiment, aluminium liner formation method can also be divided the aluminium liner three depositions, four depositions or more times deposition as described, as long as the temperature of deposition is lower than the temperature of subsequent deposition for the first time, can also realize less, the surfacing of the described first aluminium lamination crystal grain, and can reduce the whisker defective, also can reach the defective of avoiding or reducing the aluminium liner, the beneficial effect that improves the yield of product, also within thought range of the present invention.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (11)
1. an aluminium liner formation method comprises and divides at least twice deposition with the aluminium liner, and wherein, the temperature of deposition is lower than the temperature of deposition for the second time for the first time.
2. aluminium liner formation method as claimed in claim 1 is characterized in that, comprising:
Semiconductor substrate is provided;
Carry out the deposition first time, at described Semiconductor substrate deposition first aluminium lamination;
Carry out the deposition second time, at described first aluminium lamination deposition, second aluminium lamination.
3. aluminium liner formation method as claimed in claim 2 is characterized in that, described first time deposition and the second time are deposited on different reaction chambers and carry out.
4. as any described aluminium liner formation method among the claim 1-3, it is characterized in that, the thickness of described first aluminium lamination be the aluminium liner thickness 1/8～1/4.
5. aluminium liner formation method as claimed in claim 4 is characterized in that the thickness of described first aluminium lamination
6. as any described aluminium liner formation method among the claim 1-3, it is characterized in that the temperature that deposit the described first time is 100 ℃～220 ℃.
7. aluminium liner formation method as claimed in claim 6 is characterized in that, the temperature that deposit the described first time is 200 ℃.
8. as any described aluminium liner formation method among the claim 1-3, it is characterized in that the dc electric power that deposit the described first time is 28 kilowatts～35 kilowatts.
9. as any described aluminium liner formation method among the claim 1-3, it is characterized in that the temperature that deposit the described second time is 250 ℃～300 ℃.
10. aluminium liner formation method as claimed in claim 9 is characterized in that, the temperature that deposit the described second time is 270 ℃.
11., it is characterized in that the dc electric power that deposit the described second time is 20 kilowatts～25 kilowatts as any described aluminium liner formation method among the claim 1-3.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013101956056A CN103280411A (en) | 2013-05-23 | 2013-05-23 | Aluminum gasket forming method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2013101956056A CN103280411A (en) | 2013-05-23 | 2013-05-23 | Aluminum gasket forming method |
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| CN103280411A true CN103280411A (en) | 2013-09-04 |
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| CN2013101956056A Pending CN103280411A (en) | 2013-05-23 | 2013-05-23 | Aluminum gasket forming method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108389832A (en) * | 2018-02-07 | 2018-08-10 | 上海华虹宏力半导体制造有限公司 | The method of metallic aluminium filling perforation |
| CN111192825A (en) * | 2018-12-12 | 2020-05-22 | 深圳方正微电子有限公司 | Silicon carbide schottky diode and method for manufacturing same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6083832A (en) * | 1997-10-21 | 2000-07-04 | Nec Corporation | Method of manufacturing semiconductor device |
| CN101882588A (en) * | 2009-05-06 | 2010-11-10 | 中芯国际集成电路制造(北京)有限公司 | Method for reducing whisker defects on surface of aluminum lining pad |
| CN103165483A (en) * | 2013-02-20 | 2013-06-19 | 上海华力微电子有限公司 | Method for reducing defects on aluminum gasket surface |
-
2013
- 2013-05-23 CN CN2013101956056A patent/CN103280411A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6083832A (en) * | 1997-10-21 | 2000-07-04 | Nec Corporation | Method of manufacturing semiconductor device |
| CN101882588A (en) * | 2009-05-06 | 2010-11-10 | 中芯国际集成电路制造(北京)有限公司 | Method for reducing whisker defects on surface of aluminum lining pad |
| CN103165483A (en) * | 2013-02-20 | 2013-06-19 | 上海华力微电子有限公司 | Method for reducing defects on aluminum gasket surface |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108389832A (en) * | 2018-02-07 | 2018-08-10 | 上海华虹宏力半导体制造有限公司 | The method of metallic aluminium filling perforation |
| CN108389832B (en) * | 2018-02-07 | 2020-06-09 | 上海华虹宏力半导体制造有限公司 | Method for filling hole with metallic aluminum |
| CN111192825A (en) * | 2018-12-12 | 2020-05-22 | 深圳方正微电子有限公司 | Silicon carbide schottky diode and method for manufacturing same |
| CN111192825B (en) * | 2018-12-12 | 2023-08-04 | 深圳方正微电子有限公司 | Silicon carbide schottky diode and method of manufacturing the same |
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Application publication date: 20130904 |