CN103259436A - Mixing clamping type five-level current transformer and control method thereof - Google Patents

Mixing clamping type five-level current transformer and control method thereof Download PDF

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CN103259436A
CN103259436A CN2013101961656A CN201310196165A CN103259436A CN 103259436 A CN103259436 A CN 103259436A CN 2013101961656 A CN2013101961656 A CN 2013101961656A CN 201310196165 A CN201310196165 A CN 201310196165A CN 103259436 A CN103259436 A CN 103259436A
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branch road
level
clamping
designated
switch pipe
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CN103259436B (en
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张兴
任康乐
王付胜
谢韦伟
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Zhongke Haiao Mount Huangshan Energy Storage Technology Co ltd
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Hefei University of Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/007—Plural converter units in cascade

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  • Inverter Devices (AREA)

Abstract

The invention discloses a mixing clamping type five-level current transformer and a control method of the mixing clamping type five-level current transformer. Six chained type branches of a direct-current bus capacitance branch, two clamping switching tube branches, a clamping capacitance branch, a clamping diode branch and a main switching tube branch are formed by four capacitors, twelve switching tubes and two clamping diodes of a single-phase bridge arm. A harmonic elimination PWM method is adopted to obtain a level section signal and a level signal, a switching state of the switching tubes is directly obtained through the obtained level section signal and the obtained level signal according to a preset switching state, dead zones are added among switching elements which are mutually complemented and conducted, and PWM driving signals of the twelve single-phase switching tubes are obtained. The mixing clamping type five-level current transformer and the control method of the mixing clamping type five-level current transformer have the advantages of outputting in a boosting mode, achieving balance of all capacitor voltage periods once by only needing two carrier periods, lowering switching frequency of a main switching tube, being simple in implement method and the like.

Description

Combination clamping type five level current transformers and control method thereof
Technical field
The present invention relates to a kind of converters, especially a kind of combination clamping type five level current transformers and control method thereof.
Background technology
The output waveform harmonic content is low, device bears advantages such as voltage stress is little because the increase of output level number, many level current transformers have, and these advantages make many level Semiconductor Converting Technology be particularly suitable for high-voltage large-capacity power electronics occasion.At present, multi-level converter mainly can be divided into following three kinds: diode clamp formula, capacitor-clamped formula, H bridge tandem type.Wherein, the many level of diode clamp formula topology because main circuit structure is simple and reliable, energy can two-way flow etc. advantage become the many level topology that is most widely used at present.Yet, there is the dc capacitor voltage equilibrium problem in this kind topology, for three level topologys, can be resolved by certain control algolithm, but existing document points out for five level and above level current transformer in power factor near 1 o'clock, is difficult in to reach the capacitance voltage balance in the full-load range.
Up to the present, have a lot of researchers to propose multiple solution, but they or by cast out a large amount of in long vectors realize the capacitance voltage balance, reduced system control performance; Or by additional as DC power supply, assist chopper circuit and adopt formula structure back-to-back to realize the balance of dc-link capacitance voltage, these schemes have increased the hardware cost of system, have reduced system reliability and efficient.In view of these reasons, present five level and last many level of level diode clamp structure are difficult in the engineering and are applied.Another many level topology is the combination clamping topology, adopt active switch device, diode, electric capacity to cooperate and finish clamp function, the electric capacity parallel connections different by making of chain type can solve the capacitance voltage equilibrium problem, and can not be subjected to the influence of load characteristic.Yet this combination clamping topology has increased hardware complexity and the cost of system owing to introduced devices such as clamp switch pipe and clamping capacitance.Therefore the number of devices that as far as possible reduces this kind topology is significant.
Summary of the invention
The present invention is the weak point that exists in the above-mentioned prior art for avoiding, a kind of combination clamping type five level current transformers and control method thereof are provided, reduce the switching frequency of main switch with the device count that reduces by five level current transformers with the simplification hardware configuration, in the fast automatic balance of realization capacitance voltage.
The present invention be the technical solution problem by the following technical solutions.
Combination clamping type five level current transformers, its design feature are, include three single-phase brachium pontis that structure is identical, and wherein, every phase brachium pontis comprises: 2 dc-link capacitance C 1, C 22 clamping capacitance C 3, C 44 main switch S 1, S 2, S 1 ', S 2 'With 8 clamp switch pipe S C1, S C2, S C1 ', S C2 ', S C3, S C4, S C3 ', S C4 '2 clamping diode D C1And D C2
Wherein, dc-link capacitance C 1And C 2For each phase brachium pontis shares;
Described dc-link capacitance C 1And C 2Series connection constitutes the dc-link capacitance branch road mutually; Described clamp switch pipe S C1, S C2, S C1 'And S C2 'Series connection constitutes the first clamp switch pipe branch road, described clamp switch pipe S mutually C3, S C4, S C3 'And S C4 'Series connection constitutes the second clamp switch pipe branch road mutually; Described clamping capacitance C 3And C 4Series connection constitutes the clamping capacitance branch road mutually; Described clamping diode D C1With clamping diode D C2Series connection constitutes the clamping diode branch road mutually; Described main switch S 1, S 2, S 1 'And S 2 'Series connection constitutes the main switch branch road mutually; Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road, main switch branch road interconnect from front to back successively;
Two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Two end points of the described second clamp switch pipe branch road, clamping capacitance branch road and main switch branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively.
The present invention also provides a kind of control method of combination clamping type five level current transformers, is characterized in, switching tube S in the described main switch branch road 1With S 1 ', S 2With S 2 'Complementary conducting, namely the two drives the signal complementation; S in the described first clamp switch pipe branch road and the second clamp switch pipe branch road CxWith S Cx '(x=1,2,3,4) complementary conducting, and S C1With S C2, S C3With S C4Driving signal unanimity;
Step 1: at first with every phase modulating wave m=U mSinwt/U DcWith 4 have same frequency f c, identical peak-to-peak value 0.5 and spatially closely link to each other successively and be symmetrically distributed in zero with reference to the triangular carrier of positive and negative both sides relatively, obtain level wayside signaling and level signal; U wherein mSinwt is brachium pontis side desired output voltage, U DcIt is first DC bus-bar voltage;
Step 2: the level wayside signaling and the level signal that are obtained by step 1, directly obtain the on off state of main switching tube according to default on off state table, wherein in each level interval, the redundant mode of same level is every a carrier cycle f cSwitch once; Add the dead band according to default switching tube state principle between complementary actuating switch device, the PWM that namely obtains single-phase 12 switching tubes drives signal.
In described step 1, with four triangular carriers from top to bottom number consecutively be 1,2,3,4; When sinusoidal modulation wave and triangular carrier 1 intersects, if the amplitude of modulating wave greater than triangular carrier 1, outputs level signals is designated as 2, otherwise is designated as 1, this moment the level wayside signaling be designated as (+2U～+ U); When sinusoidal modulation wave and triangular carrier 2 intersects, if the amplitude of modulating wave greater than triangular carrier 2, outputs level signals is designated as 1, otherwise, be designated as 0, this moment, the level wayside signaling was designated as (+U～0); When sinusoidal modulation wave and triangular carrier 3 intersects, if the amplitude of modulating wave greater than triangular carrier 3, outputs level signals is designated as 0, otherwise, be designated as-1, this moment the level wayside signaling be designated as (0～-U); When sinusoidal modulation wave and triangular carrier 4 intersects, if the amplitude of modulating wave greater than triangular carrier 4, outputs level signals is designated as-1, otherwise, be designated as-2, this moment the level wayside signaling be designated as (U～-2U).
Compared with the prior art, beneficial effect of the present invention is embodied in:
The invention discloses a kind of novel combination clamping type five level current transformers, can realize the output of five level, single-phase brachium pontis comprises 4 capacitors altogether, comprising 2 dc-link capacitances and 2 clamping capacitances; 12 switching tubes; 2 clamping diodes.This topology not only used device is lacked than similar topology, and dc-link capacitance voltage can autobalance, has solved conventional diode clamped five-level current transformer capacitance voltage and has been difficult to control problem, can also realize the output of boosting simultaneously.In addition, at carrying topology, the invention discloses a kind of modulation strategy that is simple and easy to realize, in whole modulation degree scope, only need two carrier cycles just can realize all capacitance voltage cycle balances once, reduced the switching frequency of main switch simultaneously, effectively raise the efficient of system.
1) capacitance voltage automatic balance function, be to reach by the different electric capacity parallel connection of making of chain structure, this method does not need complicated control method, is not subjected to the influence of load characteristic, can both realize the capacitance voltage autobalance under any load situation in universe modulation degree scope.2) all electric capacity are shared identical voltage in the topology, and all switching tubes have identical voltage stress with diode, have played good clamp effect.3) output boost function, can obtain under same dc voltage is the output voltage of conventional inverter twice, has effectively improved the inverter direct-flow side voltage utilization.4) the used device of topology of the present invention is less in similar topology.5) described modulation strategy, simple, easy Digital Implementation when realizing the fast automatic balance of capacitance voltage, has reduced the switching frequency of main switch.
Combination clamping type five level current transformers of the present invention and control method thereof, only have need two carrier cycles just can realize all capacitance voltage cycle balances once, reduced main switch switching frequency, improved the efficient of system and realized advantages such as simple.
Description of drawings
Fig. 1 is the topological circuit figure (single armed circuit) of combination clamping type five level current transformers of the present invention.
Fig. 2 is the schematic diagram that obtains outputs level signals according to harmonic elimination ripple PWM method of the present invention.
Fig. 3 be of the present invention (+2U ~+U) the interval switch mode of level is selected schematic diagram.
Fig. 4 is that module diagram takes place five level current transformer PWM of the present invention.
Simulation result when Fig. 5 is single-phase five-electrical level inverter modulation degree m=0.8 of the present invention.
Simulation result when Fig. 6 is single-phase five-electrical level inverter modulation degree m=0.3 of the present invention.
Below pass through embodiment, and the invention will be further described by reference to the accompanying drawings.
Embodiment
Referring to Fig. 1, combination clamping type five level current transformers include three single-phase brachium pontis that structure is identical, and wherein, every phase brachium pontis comprises: 2 dc-link capacitance C 1, C 22 clamping capacitance C 3, C 44 main switch S 1, S 2, S 1 ', S 2 'With 8 clamp switch pipe S C1, S C2, S C1 ', S C2 ', S C3, S C4, S C3 ', S C4 '2 clamping diode D C1And D C2
Wherein, dc-link capacitance C 1And C 2For each phase brachium pontis shares;
Described dc-link capacitance C 1And C 2Series connection constitutes the dc-link capacitance branch road mutually; Described clamp switch pipe S C1, S C2, S C1 'And S C2 'Series connection constitutes the first clamp switch pipe branch road, described clamp switch pipe S mutually C3, S C4, S C3 'And S C4 'Series connection constitutes the second clamp switch pipe branch road mutually; Described clamping capacitance C 3And C 4Series connection constitutes the clamping capacitance branch road mutually; Described clamping diode D C1With clamping diode D C2Series connection constitutes the clamping diode branch road mutually; Described main switch S 1, S 2, S 1 'And S 2 'Series connection constitutes the main switch branch road mutually; Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road, main switch branch road interconnect from front to back successively;
Two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Two end points of the described second clamp switch pipe branch road, clamping capacitance branch road and main switch branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively;
Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road and main switch branch road are the chain type branch road of mutual series connection, have 6 chain type branch roads, connection parallel with one another between described 6 chain type branch roads, an end points of each branch road in 5 branch roads except the clamping diode branch road is connected with the DC side positive bus-bar and another end points is connected with the DC side negative busbar.As shown in Figure 1, two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Two end points of the described second clamp switch pipe branch road, clamping capacitance branch road and main switch branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively.On 12 switching tubes, i.e. described 4 main switch S 1, S 2, S 1 ', S 2 'With 8 clamp switch pipe S C1, S C2, S C1 ', S C2 ', S C3, S C4, S C3 'And S C4 'In each switching tube on all reverse parallel connection a diode is arranged.
All electric capacity are shared identical voltage, and all switching tubes have identical voltage stress with diode; 3 direct combinations of single-phase bridge arm circuit can be obtained the three-phase topological structure, wherein dc-link capacitance C 1, C 2For each brachium pontis shares, other components and parts in each phase brachium pontis are identical with single-phase brachium pontis.
Wherein, 2 dc-link capacitance C 1, C 2Series connection constitutes a dc-link capacitance branch road, and connected mode is C 1Negative pole and C 2Positive pole be connected, each junction constitutes a tie point, this dc-link capacitance branch road amounts to 3 tie points.As shown in Figure 1,3 tie points of dc-link capacitance branch road number consecutively 1-1,1-2 and 1-3, wherein capacitor C from top to down in order 1Positive pole and capacitor C 2Negative pole respectively as initial tie point 1-1 and Termintion connection point 1-3, be connected respectively to the positive and negative bus of first DC side.Among the present invention, among the numbering 1-1, "-" preceding numeral is the branch road sequence number, and the numeral after "-" is the numbering of this tie point.As Fig. 1, the sequence number of dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road and main switch branch road is followed successively by 1～6.
12 clamp switch pipes constitute two-way clamp switch pipe branch road.Wherein, clamp switch pipe S C1～S C2 'In the collector electrode of a switching tube of emitter and back of the switching tube in front be connected, series connection forms the first clamp switch pipe branch road, each junction forms a tie point, always has 5 tie points.As shown in Figure 1,5 tie points of first clamp switch pipe branch road number consecutively from top to bottom are 2-1～2-5, first switching tube S C1Collector electrode and last switching tube S C2 'Emitter be connected respectively on the positive and negative bus of first direct current.The tie point (being 2-1,2-3 and 2-5) that is numbered odd number in the first clamp switch pipe branch road links to each other by the numbering ascending order successively with 3 tie points (being 1-1,1-2 and 1-3) in the dc-link capacitance branch road.In like manner, clamp switch pipe S C3～S C4 'In the collector electrode of a switching tube of emitter and back of the switching tube in front be connected, series connection forms the second clamp switch pipe branch road, each junction forms a tie point, always has 5 tie points.As shown in Figure 1,5 tie points of second clamp switch pipe branch road number consecutively from top to bottom are 3-1～3-5, first switching tube S C3Collector electrode and last switching tube S C4 'Emitter be connected respectively on the positive and negative bus of second direct current, wherein, corresponding tie point (being 2-2 and 2-4) links to each other successively by the numbering ascending order in the tie point (being 3-2 and 3-4) that is numbered even number in the second clamp switch pipe branch road and the first clamp switch pipe branch road.
2 is clamping capacitance C 3～C 4Series connection constitutes a clamping capacitance branch road, and connected mode is C 3Negative pole and C 4Positive pole be connected, each junction constitutes a tie point, this clamping capacitance branch road amounts to 3 tie points.As shown in Figure 1,3 of the clamping capacitance branch road tie points number consecutively 4-1～4-3 in order.Wherein, capacitor C 3Positive pole and capacitor C 4Negative pole respectively as initial tie point 4-1 and Termintion connection point 4-3, be connected respectively on the positive and negative bus of second DC side, the tie point (being 3-1,3-3 and 3-5) that is numbered odd number in 3 tie points in the clamping capacitance branch road (being 4-1,4-2 and 4-3) and the second clamp switch pipe branch road links to each other successively by the numbering ascending order.
4 main switch S 1, S 2, S 1 ', S 2 'The collector electrode of a switching tube of emitter and back of the switching tube in middle front is connected, and series connection forms the main switch branch road, and each junction forms a tie point, always has 5 tie points.As shown in Figure 1,5 of the main switch branch road tie points from top to bottom number consecutively be 6-1～6-5.First switching tube S 1Collector electrode and last switching tube S 2 'Emitter be connected respectively on the positive and negative bus of second direct current, namely tie point 6-1 is connected with the positive and negative bus of second direct current respectively with 6-5.The 3rd tie point 6-3 is as single-phase output connection A in the main switch branch road.
2 clamping diode D C1～D C2Constitute 1 clamping diode branch road, its connected mode is: D C1Anode and D C2Negative electrode be connected, each junction forms a tie point, always has 3 tie points.As shown in Figure 1,3 of the clamping diode branch road tie point number consecutivelies are 5-1～5-3.
D C1Negative electrode and D C2Anode be designated as initial tie point 5-1 and Termintion connection point 5-3,5-1,5-3 respectively with the main switch branch road in the 2nd tie point 6-2 link to each other with the 4th tie point 6-4, be numbered in the clamping diode branch road and be numbered 2 tie point 4-2 in 2 tie point 5-2 and the clamping capacitance branch road and link to each other, tie point 4-2 is connected with the tie point 3-3 of the second clamp switch pipe branch road.
Combination clamping type five level current transformers of the present invention, five level of output are by the corresponding on off state combination results of power switch pipe in the topology.
As shown in Figure 2, because S CxWith S Cx '(x=1,2,3,4) connect later on and certain electric capacity is connected in parallel, so the two drives the necessary complementation of signal.S among the level NPC simultaneously xWith S X 'The driving signal of (x=1,2) also is complementary.Structure shown in Figure 2 can be divided into two parts, prime is clamp and booster circuit, comprises dc-link capacitance branch road, 2 clamp switch pipes and connecting line thereof, along with the variation of clamp switch pipe, have clamp mode ABCDEF in 6 kinds, wherein corresponding clamp switch pipe S during clamp mode F C1, S C2, S C3, S C4Be 0101 state, because do not have capacitor-clamped effect this moment, do not consider.Remain 5 kinds of capacitor-clamped mode ABCDE, respectively corresponding C1=C4, C1=C3, C2=C4, C1+C2=C3+C4, five kinds of electric capacity parallel forms of C2=C3.Back level is diode clamp formula (NPC) three level structures, can export 1,0 ,-1 three kind of level.2 parts cooperate altogether exportable+2U ,+1U, 0 ,-1U ,-five kinds of level of 2U, 15 kinds of operation modes, wherein brachium pontis mid point output U altogether AoFor+2U and-have only a kind of operating state during 2U, for+U and-4 kinds of redundant states are respectively arranged during U, be that 5 kinds of redundant states were arranged in 0 o'clock.Brachium pontis output level U Ao, the relation between clamp mode, electric capacity parallel form and the on off state (only marked the on off state of one of them switching tube of complementary switch in the table, 1 expression switching tube conducting, 0 expression switching tube turn-offs, U represents 1 times of output level) as shown in table 1.
15 kinds of all working mode all have the bidirectional current passage described in the following table 1, and therefore, the influence that topology is not subjected to load characteristic of carrying can be used for meritorious idle various occasions.And all switching tubes, diode all are clamped at a capacitance voltage under every kind of mode, as long as guarantee all capacitance voltage balances, have namely realized the clamp function of all devices.
Table 1 output level U Ao, the relation between clamp mode, electric capacity parallel form and the on off state
Figure BDA0000321996721
The realization of capacitance voltage equilibrium function and boost function:
As shown in Figure 3, need only at a capacitance voltage in equilibration period, except two kinds of combinations of BCD, AED, certain 3 alternately occur in five clamp mode of ABCDE, just can guarantee that four capacitance voltages equate in this cycle.Such as three kinds of patterns of ABC, C under the A clamp mode 1=C 4, C under the B clamp mode 1=C 3, C under the C clamp mode 2=C 4, three kinds of mode alternately occur, and just make C 1=C 2=C 3=C 4
Another function of many level current transformers of the present invention is to realize boosting output.As when the clamp mode A, C 1And C 4Parallel connection is reference point with DC side mid point o, the positive and negative busbar of this moment back level NPC three level, midpoint potential all lifting a level, the highest exportable level is 2U; And when clamp mode E, C 1And C 4Parallel connection, positive and negative busbar, the midpoint potential of the back level NPC three level level that all descended, minimum exportable-the 2U level.Be V to whole dc voltage namely DcInverter, exportable maximum level is+-V Dc, be the twice of conventional inverter.
A kind of control method according to described combination clamping type five level current transformers, switching tube S in the described main switch branch road 1With S 1 ', S 2With S 2 'Complementary conducting, namely the two drives the signal complementation; S in the described first clamp switch pipe branch road and the second clamp switch pipe branch road CxWith S Cx '(x=1,2,3,4) complementary conducting, and S C1With S C2, S C3With S C4Driving signal unanimity; This control method comprises following 2 steps:
Step 1: at first with every phase modulating wave m=U mSinwt/U DcWith 4 have same frequency f c, identical peak-to-peak value 0.5 and spatially closely link to each other successively and be symmetrically distributed in zero with reference to the triangular carrier of positive and negative both sides relatively, obtain level wayside signaling and level signal; U wherein mSinwt is brachium pontis side desired output voltage, U DcIt is first DC bus-bar voltage;
Step 2: the level wayside signaling and the level signal that are obtained by step 1, directly obtain the on off state of main switching tube according to default on off state table, wherein in each level interval, the redundant mode of same level is every a carrier cycle f cSwitch once; Add the dead band according to default switching tube state principle between complementary actuating switch device, the PWM that namely obtains single-phase 12 switching tubes drives signal;
In described step 1, with four triangular carriers from top to bottom number consecutively be 1,2,3,4; When sinusoidal modulation wave and triangular carrier 1 intersects, if the amplitude of modulating wave greater than triangular carrier 1, outputs level signals is designated as 2, otherwise is designated as 1, this moment the level wayside signaling be designated as (+2U～+ U); When sinusoidal modulation wave and triangular carrier 2 intersects, if the amplitude of modulating wave greater than triangular carrier 2, outputs level signals is designated as 1, otherwise, be designated as 0, this moment, the level wayside signaling was designated as (+U～0); When sinusoidal modulation wave and triangular carrier 3 intersects, if the amplitude of modulating wave greater than triangular carrier 3, outputs level signals is designated as 0, otherwise, be designated as-1, this moment the level wayside signaling be designated as (0～-U); When sinusoidal modulation wave and triangular carrier 4 intersects, if the amplitude of modulating wave greater than triangular carrier 4, outputs level signals is designated as-1, otherwise, be designated as-2, this moment the level wayside signaling be designated as (U～-2U);
At first on off state must satisfy following principle: switching tube S in the described main switch branch road 1With S 1 ', S 2With S 2 'Complementary conducting, namely the two drives the signal complementation; S in the described clamp switch pipe 1 and 2 CxWith S Cx '(x=1,2,3,4) complementary conducting, and S C1With S C2, S C3With S C4Driving signal unanimity.
Specific implementation may further comprise the steps:
Step 1 as shown in Figure 3, adopts harmonic elimination ripple PWM method, with every phase modulating wave m=U mSinwt/U DcCompare with 4 triangular carriers, wherein U mSinwt is brachium pontis side desired output voltage, U DcBe described DC bus-bar voltage, described 4 triangular carriers have same frequency f cWith identical peak-to-peak value 0.5, they spatially are closely to link to each other and whole carrier wave set pair claims to be distributed in the positive and negative both sides of zero reference, with four triangular carriers from top to bottom number consecutively be 1,2,3,4(such as Fig. 2).When sinusoidal modulation wave and triangular carrier 1 intersects, if the amplitude of modulating wave greater than triangular carrier 1, outputs level signals is designated as 2, otherwise, be designated as 1, this moment the level wayside signaling be designated as (+2U～+ U); When sinusoidal modulation wave and triangular carrier 2 intersects, if the amplitude of modulating wave greater than triangular carrier 2, outputs level signals is designated as 1, otherwise, be designated as 0, this moment, the level wayside signaling was designated as (+U～0); When sinusoidal modulation wave and triangular carrier 3 intersects, if the amplitude of modulating wave greater than triangular carrier 3, outputs level signals is designated as 0, otherwise, be designated as-1, this moment the level wayside signaling be designated as (0～-U); When sinusoidal modulation wave and triangular carrier 4 intersects, if the amplitude of modulating wave greater than triangular carrier 4, outputs level signals is designated as-1, otherwise, be designated as-2, this moment the level wayside signaling be designated as (U～-2U).
Step 2, obtain level wayside signaling and level signal by step 1 after, by the on off state table shown in the table 2, directly inquiry obtains S C1, S C3, S 1With S 2On off state, wherein in each level interval, the redundant mode of same level (A, B) is every a carrier cycle f cSwitch once, such as, (+2U～+ U) in the interval, when level signal 1 took place, two redundant mode A, B were used alternatingly, as shown in Figure 4.Wherein on off state 1 expression switching device conducting, 0 expression switching device turn-offs; Further the principle that satisfies according to the on off state needs is added the dead band simultaneously between complementary actuating switch device, and the PWM that namely gets single-phase 12 switching tubes drives signal.
Table 2 on off state table
Figure BDA0000321996722
Be that module diagram takes place five level current transformer PWM as Fig. 4, module takes place and comprises comparing unit, switch mode selected cell in PWM, modulating wave and triangular wave input to comparing unit and produce level signal, and this level signal inputs to switch mode selected cell, thereby determine on off state; Determine S according on off state and driving signal list C1, S C3, S 1With S 2On off state, simultaneously between complementary actuating switch device, add the dead band, the PWM that namely gets single-phase 12 switching tubes drives signal.
The present invention is directed to the unmanageable difficult problem of the conventional diode clamped five-level current transformer dc-link capacitance balance of voltage, angle from the combination clamping topology, disclose a kind of novel five level current transformer topologys with capacitance voltage balance and output boost function, the used device of this topology is less.At five level current transformers of carry topology, disclose a kind of modulation strategy simultaneously, when realizing the fast automatic balance of capacitance voltage, reduced the switching frequency of main switch.
Above content is to further specifying that the present invention does in conjunction with specific embodiment; can not assert that concrete enforcement of the present invention is confined to these explanations; for technical staff under the present invention; make some alternative or obvious distortion that are equal to without departing from the inventive concept of the premise; and performance or purposes are identical, then should be considered as belonging to the protection range that the present invention is determined by claims of submitting to.
Open loop simulation result when Fig. 5 is single-phase five-electrical level inverter modulation degree m=0.8 of the present invention.Condition of work is as follows: the input DC bus-bar voltage is 400V, i.e. each level 200V; Dc-link capacitance and clamping capacitance appearance value are 2mF, and the L filter is adopted in output, and filter inductance is 5mH; Load resistance is 20 Ω, and switching frequency is 5KHz.By Fig. 5 (a) as seen, the output phase voltage is 5 level, and maximum level is 400V, is the twice of DC side bus total voltage; The current waveform degree of distortion is lower.By Fig. 5 (b) as seen, dc-link capacitance C 1, C 2With clamping capacitance C 3, C 4Capacitance voltage substantially all maintains about a level 200V, and ripple is less than 5V.
Open loop simulation result when Fig. 6 is the single-phase five-electrical level inverter modulation degree of the present invention m=0.3, export phase voltage this moment is 3 level, and all capacitance voltages all maintain near the 200V, and ripple is less than 0.5V.Therefore, topology provided by the present invention and modulation strategy all can effectively solve five level capacitance voltage equilibrium problems in complete modulation degree scope.
Though the present invention is illustrated hereinbefore according to preferred embodiment, this does not represent that scope of the present invention is confined to above-mentioned structure, as long as the structure that is covered by this invention claim is all within protection range.Those skilled in the art can be developed the equivalent substitution structure that at an easy rate after reading above-mentioned explanation, in following equalization variation and the modification of being done of the spirit that does not break away from the present invention and scope, all should be covered by within the protection range of the present invention.

Claims (3)

1. combination clamping type five level current transformers is characterized in that, include three single-phase brachium pontis that structure is identical, and wherein, every phase brachium pontis comprises: 2 dc-link capacitance C 1, C 22 clamping capacitance C 3, C 44 main switch S 1, S 2, S 1 ', S 2 'With 8 clamp switch pipe S C1, S C2, S C1 ', S C2 ', S C3, S C4, S C3 ', S C4 '2 clamping diode D C1And D C2
Wherein, dc-link capacitance C 1And C 2For each phase brachium pontis shares.
Described dc-link capacitance C 1And C 2Series connection constitutes the dc-link capacitance branch road mutually; Described clamp switch pipe S C1, S C2, S C1 'And S C2 'Series connection constitutes the first clamp switch pipe branch road, described clamp switch pipe S mutually C3, S C4, S C3 'And S C4 'Series connection constitutes the second clamp switch pipe branch road mutually; Described clamping capacitance C 3And C 4Series connection constitutes the clamping capacitance branch road mutually; Described clamping diode D C1With clamping diode D C2Series connection constitutes the clamping diode branch road mutually; Described main switch S 1, S 2, S 1 'And S 2 'Series connection constitutes the main switch branch road mutually; Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road, main switch branch road interconnect from front to back successively.
Two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Two end points of the described second clamp switch pipe branch road, clamping capacitance branch road and main switch branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively.
2. the control method of combination clamping type five level current transformers is characterized in that, switching tube S in the described main switch branch road 1With S 1 ', S 2With S 2 'Complementary conducting, namely the two drives the signal complementation; S in the described first clamp switch pipe branch road and the second clamp switch pipe branch road CxWith S Cx '(x=1,2,3,4) complementary conducting, and S C1With S C2, S C3With S C4Driving signal unanimity;
Step 1: at first with every phase modulating wave m=U mSinwt/U DcWith 4 have same frequency f c, identical peak-to-peak value 0.5 and spatially closely link to each other successively and be symmetrically distributed in zero with reference to the triangular carrier of positive and negative both sides relatively, obtain level wayside signaling and level signal; U wherein mSinwt is brachium pontis side desired output voltage, U DcIt is first DC bus-bar voltage.
Step 2: the level wayside signaling and the level signal that are obtained by step 1, directly obtain the on off state of main switching tube according to default on off state table, wherein in each level interval, the redundant mode of same level is every a carrier cycle f cSwitch once; Add the dead band according to default switching tube state principle between complementary actuating switch device, the PWM that namely obtains single-phase 12 switching tubes drives signal.
3. control method according to claim 1 is characterized in that, in described step 1, with four triangular carriers from top to bottom number consecutively be 1,2,3,4; When sinusoidal modulation wave and triangular carrier 1 intersects, if the amplitude of modulating wave greater than triangular carrier 1, outputs level signals is designated as 2, otherwise is designated as 1, this moment the level wayside signaling be designated as (+2U～+ U); When sinusoidal modulation wave and triangular carrier 2 intersects, if the amplitude of modulating wave greater than triangular carrier 2, outputs level signals is designated as 1, otherwise, be designated as 0, this moment, the level wayside signaling was designated as (+U～0); When sinusoidal modulation wave and triangular carrier 3 intersects, if the amplitude of modulating wave greater than triangular carrier 3, outputs level signals is designated as 0, otherwise, be designated as-1, this moment the level wayside signaling be designated as (0～-U); When sinusoidal modulation wave and triangular carrier 4 intersects, if the amplitude of modulating wave greater than triangular carrier 4, outputs level signals is designated as-1, otherwise, be designated as-2, this moment the level wayside signaling be designated as (U～-2U).
CN201310196165.6A 2013-05-21 2013-05-21 Combination clamping type Five-level converter and control method thereof Active CN103259436B (en)

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CN112886842A (en) * 2021-02-25 2021-06-01 燕山大学 Boost converter and control method thereof
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9484830B2 (en) 2014-05-23 2016-11-01 Delta Electronics (Shanghai) Co., Ltd. Five-level rectifier
CN111869072A (en) * 2018-08-01 2020-10-30 华为技术有限公司 Control circuit of voltage conversion circuit
CN111869072B (en) * 2018-08-01 2021-10-01 华为技术有限公司 Control circuit of voltage conversion circuit
CN112886842A (en) * 2021-02-25 2021-06-01 燕山大学 Boost converter and control method thereof
CN113726206A (en) * 2021-07-26 2021-11-30 西安交通大学 Five-level power electronic converter and method
CN113726206B (en) * 2021-07-26 2023-08-22 西安交通大学 Five-level power electronic converter and method

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