CN103248343B - 用于校正时钟占空比的边沿选择技术 - Google Patents
用于校正时钟占空比的边沿选择技术 Download PDFInfo
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- CN103248343B CN103248343B CN201210500690.8A CN201210500690A CN103248343B CN 103248343 B CN103248343 B CN 103248343B CN 201210500690 A CN201210500690 A CN 201210500690A CN 103248343 B CN103248343 B CN 103248343B
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- 238000000034 method Methods 0.000 title abstract description 16
- 230000001960 triggered effect Effects 0.000 claims abstract description 63
- 230000009466 transformation Effects 0.000 claims abstract description 17
- 230000004044 response Effects 0.000 claims abstract description 8
- 238000001514 detection method Methods 0.000 claims abstract description 5
- 230000000630 rising effect Effects 0.000 claims description 47
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000007689 inspection Methods 0.000 claims 4
- 238000005070 sampling Methods 0.000 abstract description 9
- 102100040844 Dual specificity protein kinase CLK2 Human genes 0.000 description 49
- 101000749291 Homo sapiens Dual specificity protein kinase CLK2 Proteins 0.000 description 49
- 102100040862 Dual specificity protein kinase CLK1 Human genes 0.000 description 33
- 101000749294 Homo sapiens Dual specificity protein kinase CLK1 Proteins 0.000 description 33
- 238000010586 diagram Methods 0.000 description 25
- 101100328957 Caenorhabditis elegans clk-1 gene Proteins 0.000 description 16
- 230000008859 change Effects 0.000 description 8
- 230000007704 transition Effects 0.000 description 8
- 230000000295 complement effect Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000003786 synthesis reaction Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 101100113692 Caenorhabditis elegans clk-2 gene Proteins 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000007688 edging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
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Abstract
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Claims (12)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201261597501P | 2012-02-10 | 2012-02-10 | |
US61/597,501 | 2012-02-10 | ||
US13/534,241 | 2012-06-27 | ||
US13/534,241 US20130207702A1 (en) | 2012-02-10 | 2012-06-27 | Edge selection techniques for correcting clock duty cycle |
Publications (2)
Publication Number | Publication Date |
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CN103248343A CN103248343A (zh) | 2013-08-14 |
CN103248343B true CN103248343B (zh) | 2016-03-30 |
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CN201210500690.8A Expired - Fee Related CN103248343B (zh) | 2012-02-10 | 2012-11-29 | 用于校正时钟占空比的边沿选择技术 |
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Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN107565951B (zh) * | 2017-08-23 | 2020-08-07 | 深圳市芯华国创半导体股份有限公司 | 多状态信号生成电路 |
WO2020077557A1 (zh) * | 2018-10-17 | 2020-04-23 | 华为技术有限公司 | 一种占空比校准电路、电子设备及方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6111442A (en) * | 1998-03-09 | 2000-08-29 | International Business Machines Corporation | Phase-locked loop circuit with dynamic backup |
US6262602B1 (en) * | 1999-03-18 | 2001-07-17 | Agilent Technologies, Inc. | Incident-edge detecting probe |
CN1689291A (zh) * | 2001-07-20 | 2005-10-26 | 皇家菲利浦电子有限公司 | 用于识别信号边沿的方法和装置 |
CN1698269A (zh) * | 2003-01-23 | 2005-11-16 | 日本电信电话株式会社 | 波形整形电路 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6909311B2 (en) * | 2002-04-03 | 2005-06-21 | Analog Devices, Inc. | Methods and apparatus for synthesizing a clock signal |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6111442A (en) * | 1998-03-09 | 2000-08-29 | International Business Machines Corporation | Phase-locked loop circuit with dynamic backup |
US6262602B1 (en) * | 1999-03-18 | 2001-07-17 | Agilent Technologies, Inc. | Incident-edge detecting probe |
CN1689291A (zh) * | 2001-07-20 | 2005-10-26 | 皇家菲利浦电子有限公司 | 用于识别信号边沿的方法和装置 |
CN1698269A (zh) * | 2003-01-23 | 2005-11-16 | 日本电信电话株式会社 | 波形整形电路 |
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CN103248343A (zh) | 2013-08-14 |
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Effective date of registration: 20171116 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171116 Address after: American New York Patentee after: Core USA second LLC Address before: New York grams of Armand Patentee before: International Business Machines Corp. |
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