CN103219318A - High-temperature-resistant MIM capacitor for microwave internal matching transistor and manufacturing method thereof - Google Patents
High-temperature-resistant MIM capacitor for microwave internal matching transistor and manufacturing method thereof Download PDFInfo
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Abstract
The invention discloses a high-temperature-resistant MIM capacitor for a microwave internal matching transistor and a manufacturing method of the high-temperature-resistant MIM capacitor and relates to the technical field of integrated circuits and manufacturing methods of the integrated circuits. The high-temperature-resistant MIM capacitor comprises a substrate, a metal lower electrode, an insulating medium layer and a metal upper electrode, wherein the metal lower electrode is fixed on the upper surface of the substrate, the insulating medium layer wraps outside the metal lower electrode, a metal lower electrode extracting hole which penetrates through the insulating medium layer is formed in the insulating medium layer, a lower electrode extracting electrode which is fixedly connected with the metal lower electrode is arranged in the metal lower electrode extracting hole, and the metal upper electrode is fixed on the upper surface of the insulating medium layer. The manufacturing method of the high-temperature-resistant MIM capacitor for the microwave internal matching transistor can avoid that the insulating medium layer is influenced by stress. The high-temperature-resistant MIM capacitor for the microwave internal matching transistor has the advantages of being good in microwave characteristics and high-temperature operating characteristics, and easy to process.
Description
Technical field
The present invention relates to the manufacture method technical field of the interior matched crystal pipe manufacturer of microwave and integrated circuit and integrated circuit, relate in particular to a kind of electric capacity and manufacture method thereof of metal-insulator-metal type.
Background technology
The microwave high power transistor is because the operating frequency height, die area is big, input, the output impedance of tube core are lower, parasitic parameter is serious to transistorized performance impact, if the microwave system that directly applies to characteristic impedance and be 50 ohm connects, because impedance does not seriously match, and can cause transistor can't realize high-power output, makes transistorized performance to give full play to.For this reason, the interior matching network of employing comes input, the output impedance to tube core to promote (conversion) and reduces the influence of parasitic parameter, is to realize that microwave power transistor is high-power, a kind of effective way of high-gain output.The interior matching transistor of hot operation (200 ℃-300 ℃) requires its interior matching capacitance that adopts also can at high temperature reliable and stable work.
After avoiding adding interior matching network, cause bigger lossy microwave, to requiring the higher interior matching transistor of frequency performance often to adopt MOM(metal-oxide layer-metal) electric capacity, for improving the quality of oxide layer, generally be on silicon chip, to carry out high-temperature thermal oxidation, on oxide layer, form a metal electrode of electric capacity then, this electrode is owing to also will support whole capacitor, so generally will form 100 microns proof gold layers that the left and right sides is thick, the silicon that removes the oxide layer another side subsequently forms another metal electrode of MOM electric capacity again up to silicon dioxide layer at this face.As can be seen, the method is not only big with the gold amount, and the corrosion requirement to oxidation and silicon chip is also relatively stricter on the technology, otherwise can influence the rate of finished products of MOM electric capacity.
Continuous progress along with semiconductor technology, matching capacitance has adopted MIM(metal-insulating barrier-metal in some) structure, MOM electric capacity reality also is a branch of MIM electric capacity, the insulating barrier of MIM electric capacity generally adopts dielectric deposition processes to form, because the existence of existing metal level, the temperature of deposit medium generally can be very not high, thereby the compactness of dielectric layer is affected, and can bring disadvantageous consequence to the performance of MIM electric capacity yet.Simultaneously, the cutting of traditional MIM electric capacity is on dielectric layer, dielectric layer can produce bigger defect stress through the effect of diamant or emery wheel saw blade, through high temperature processes such as follow-up sinterings, this stress can discharge, cause defectives such as insulating medium layer crackle, to the long-term stable operation formation threat of MIM electric capacity, internally long-term stability, the reliably working of matching transistor are also unfavorable.Along with the development of the microwave power device of high temperature work such as SiC, the requirement of the interior matching capacitance of high temperature resistant work is also improved constantly.
Summary of the invention
Technical problem to be solved by this invention provides effective MIM electric capacity of matched crystal and manufacture method thereof in a kind of resistant to elevated temperatures microwave, described manufacture method can avoid insulating medium layer to be subjected to stress influence, described MIM electric capacity has excellent microwave characteristic and resistance to elevated temperatures, and is easy to processing.
For solving the problems of the technologies described above, the technical solution used in the present invention is: the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave, it is characterized in that comprising substrate, the metal bottom electrode, insulating medium layer and electrode of metal, described metal bottom electrode is fixed on the upper surface of described substrate, the outside of described metal bottom electrode is enclosed with insulating medium layer, described insulating medium layer is through The high temperature anneal and which is provided with the metal bottom electrode fairlead that runs through insulating medium layer, be provided with the bottom electrode extraction electrode of fixedlying connected with described metal bottom electrode in described metal bottom electrode fairlead, described electrode of metal is fixed on the upper surface of described insulating medium layer.
Preferably: the thickness of described insulating medium layer is not less than 3000
, the thickness of described electrode of metal and metal bottom electrode extraction electrode is 1 μ m-10 μ m.
Preferably: described MIM electric capacity also comprises the metal layer that is fixed on described substrate lower surface.
Preferably: the manufacturing materials of described substrate is sapphire or carborundum.
The manufacture method of the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave is characterized in that may further comprise the steps:
(1) photoetching for the first time: the upper surface at substrate uses the figure that makes the metal bottom electrode by lithography;
(2) evaporation of metal: substrate is heated to 60 ℃-80 ℃, on substrate, evaporates 1000
-3000
Nickel;
(3) peel off unnecessary metal: the metal on photoresist is together got rid of with photoresist, only stayed the metal at metal bottom electrode place;
(4) insulating medium layer of deposit MIM electric capacity: adopt PECVD having substrate surface deposit one deck insulating medium layer of metal bottom electrode;
(5) fine and close annealing in process: above-mentioned wafer is heated to 800 ℃-850 ℃, it is carried out annealing in process;
(6) photoetching for the second time: form the fairlead of metal bottom electrode, non-fairlead is partly made with photoresist as the protection mask;
(7) the corrosion insulating medium layer forms the fairlead of metal bottom electrode;
(8) remove photoresist for the second time: the photoresist that will erode away the wafer surface of metal bottom electrode fairlead is removed clean;
(9) metal sputtering: upper surface splash-proofing sputtering metal titanium-Jin or Titanium tungsten-Jin at the wafer that passes through above-mentioned processing form Seed Layer;
(10) photoetching for the third time: the figure that forms electrode of metal and bottom electrode extraction electrode on the Seed Layer surface;
(11) electrogilding: electrode of metal and bottom electrode extraction electrode are electroplated thickening, and thickness 1 μ m-10 μ m removes photoresist;
(12) remove and corrode Seed Layer beyond clean electrode of metal and the bottom electrode extraction electrode, form electrode of metal and bottom electrode extraction electrode;
(13) the 4th photoetching: the insulating medium layer on the scribing road is exposed in photoetching, for subsequent corrosion is prepared;
(14) insulating medium layer on the corrosion scribing road: the corrosion of the insulating medium layer on the scribing road is clean;
Remove photoresist (15) the 4th times: the photoresist of the MIM electric capacity wafer surface after will corroding is removed clean;
(16) scribing: will be in the MIM electric capacity on the wafer and be divided into discrete one by one MIM electric capacity.
Preferably: before carrying out the photoetching first time, need backing material is cleaned up.
Preferably: after carrying out removing photoresist the 4th time, need carry out the back face metalization operation at the bottom surface of substrate.
Adopt the beneficial effect that technique scheme produced to be: the present invention is on layout design, increased once with the clean photoetching process of the corrosion of the insulating medium layer on the scribing road of MIM electric capacity cut place, avoiding cutting electric capacity carries out on insulating medium layer, but carry out, thereby avoided the capacitive insulation dielectric layer to be subjected to stress influence at carborundum or sapphire surface.
On manufacturing process, increased the insulating medium layer densification technique, avoided the too loose deficiency of dielectric layer, simultaneously owing to the support of having adopted carborundum or sapphire as electric capacity, rather than as MOM electric capacity, use of the support of the proof gold of 100 micron thickness as electric capacity, avoided proof gold is consumed and electroplate excessively the drawback that back coating gold exists stress to cause whole wafer to be curled, reduced and mated MOM electric capacity in the microwave pure gold consumption, about about 100 microns proof gold layer can omit, the substitute is the metallic nickel that adopts on carborundum or the sapphire, about 3000
, saved the consumption of precious metal significantly, also avoided regular maintenance to electroplate liquid, avoided the deficiency of frequent preparation electroplate liquid.
Pass through the introducing of high temperature densification technique in addition, the ability and stability of electric capacity hot operation have been improved, the long-time stability of interior matching capacitance under the general work condition have also been improved, to overall performance electrical performance and the reliability and stable favourable that promotes coupling high power transistor in the microwave.The present invention helps the following process of capacitance sheet, has both guaranteed that matching capacitance has the excellent microwave characteristic of MOM electric capacity in the MIM microwave, makes this electric capacity have the such easy machining characteristics of mos capacitance again.So its microwave property and stability and reliability will be higher than traditional MIM electric capacity, lifting to the transistorized stability of mesh power, reliability and overall rate of finished products in the microwave of at present basic armrest machine frame, sintering, bonding all can have facilitation, has improved rate of finished products.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.
Fig. 1 is the structural representation after the photoetching for the first time;
Fig. 2 is the structural representation after peeling off unnecessary metal and removing photoresist;
Fig. 3 is the structural representation behind the insulating medium layer of deposit MIM electric capacity;
Fig. 4 is the structural representation after the fine and close annealing in process;
Fig. 5 is the structural representation after the photoetching for the second time;
Fig. 6 be photoetching for the second time after the etching insulating layer medium and remove photoresist after structural representation;
Fig. 7 is the structural representation after metal sputtering forms Seed Layer;
Fig. 8 is the structural representation after the photoetching for the third time;
Fig. 9 is the structural representation behind the electrogilding;
Figure 10 is the structural representation after removal and the corrosion part Seed Layer;
Figure 11 is the 4th structural representation after the photoetching;
Figure 12 erodes the insulating dielectric layer at place, scribing road and removes the structural representation behind the photoresist the 4th time;
Figure 13 is the structural representation after being metallized in the back side of wafer;
Figure 14 is the structural representation of first kind of MIM electric capacity forming after the scribing;
Figure 15 is the structural representation of second kind of MIM electric capacity forming after the scribing;
Wherein: 1, substrate 2, metal bottom electrode 3, electrode of metal 4, bottom electrode extraction electrode 5, electrode of metal 6, metal layer 7, the photoresist 8 behind the photoetching development, fairlead 10, Seed Layer 11, the photoresist behind the photoresist 12 behind the photoetching development, the 4th photoetching development for the third time of the photoresist 9 behind the photoetching development, metal bottom electrode for the second time for the first time.
Embodiment
As shown in figure 14, the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave comprises substrate 1, metal bottom electrode 2, insulating medium layer 3 and electrode of metal 5.Described metal bottom electrode 2 is fixed on the upper surface of described substrate 1, the outside of described metal bottom electrode 2 is enclosed with insulating medium layer 3, described insulating medium layer 3 is through The high temperature anneal and which is provided with the metal bottom electrode fairlead 9 that runs through insulating medium layer, be provided with the bottom electrode extraction electrode 4 of fixedlying connected with described metal bottom electrode 2 in described metal bottom electrode fairlead 9, described electrode of metal 5 is fixed on the upper surface of described insulating medium layer 3.
As shown in figure 15, the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave, be with electric capacity difference shown in Figure 14: the back side at substrate is provided with metal layer.
The manufacture method of the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave may further comprise the steps:
1, at first backing material that the present invention adopts to be cleaned up, backing material requires not produce tangible alloy or chemical reaction and self with the metal lower electrode material that is adopted about 850 ℃ also will keep stable, be unlikely to have harmful substance to discharge, substrate is SiC or the higher material of sapphire equistability, and purpose is to guarantee that photoresist and metal subsequently and this backing material keep good adhesion.
2, photoetching for the first time: purpose is the figure that makes MIM metal bottom electrode by lithography, owing to will carry out evaporation of metal subsequently, so the litho pattern that requires this photoetching to form preferably falls T-shape trapezoidal or shown in Figure 1.
3, evaporation of metal: good for guaranteeing the adhesion of metal and substrate surface, can adopt during evaporation of metal substrate is heated to 60-80 ℃, if also have sticking problem, can before evaporated metal nickel, evaporate 10-15 earlier
Titanium, and then the evaporation 1000-3000
Nickel.
4, peel off unnecessary metal: the metal on photoresist is together got rid of with photoresist, only stayed the metal at MIM metal bottom electrode place, as shown in Figure 2.
5, the insulating dielectric layer of deposit MIM electric capacity: adopting PECVD is that the plasma enhanced chemical vapor deposition method has substrate surface deposit one deck insulating medium layer of metal bottom electrode, as shown in Figure 3, its thickness is relevant with the size requirements of capacitance, but for guaranteeing the rate of finished products of MIM electric capacity, generally this layer medium is not less than 3000
Simultaneously for avoiding of the influence of defective such as particle to capacitor quality, preferably adopt two-layer dielectric deposit, also can adopt the compound inslation dielectric layer of two or more different insulating medium layer deposit such as silicon dioxide and silicon nitride and silicon dioxide, its purpose also is for improving the integrality of insulating medium layer.
6, fine and close annealing in process: the temperature when forming dielectric owing to PECVD is lower, can there be some holes or protium in the insulating medium layer, as shown in Figure 3, its steady operation to MIM electric capacity is unfavorable, so the present invention has increased the fine and close annealing process of the high temperature of insulating medium layer, because the present invention has adopted carborundum or Sapphire Substrate, tangible alloy or chemical reaction can not take place with already present metal bottom electrode in it in the time of 850 ℃, guaranteed the stability of MIM capacitor lower electrode metal, dielectric layer after the densification as shown in Figure 4, the hole of insulating medium layer disappears, and structure is fine and close more.
7, photoetching for the second time: purpose is the fairlead that forms MIM metal bottom electrode, with non-extension with photoresist as protecting mask, as shown in Figure 5.
8, corrosion insulating medium layer: the fairlead that forms the metal bottom electrode.
9, for the second time remove photoresist: the photoresist of wafer surface that will erode away the fairlead of metal bottom electrode is removed clean, as shown in Figure 6.
10, metal sputtering: at wafer surface large tracts of land splash-proofing sputtering metal titanium-Jin or Titanium tungsten-Jin through above-mentioned processing; The purpose of titanium or titanium tungsten layer is that the nickel dam with insulating medium layer and metal bottom electrode forms good adhesiveness, and the existence of metal is to be to realize that the MIM metal electrode electroplates the Seed Layer that thickening forms, as shown in Figure 7.
11, photoetching for the third time: form MIM electrode of metal and bottom electrode extraction electrode figure on the Seed Layer surface, as shown in Figure 8.
12, electrogilding: MIM electrode of metal and bottom electrode extraction electrode are electroplated thickening, and thickness generally is controlled at 1-10 μ m, as shown in Figure 9.
13, remove photoresist and corroding metal top electrode and bottom electrode extraction electrode beyond Seed Layer: the electrode of metal and the bottom electrode extraction electrode that form MIM electric capacity, as shown in figure 10, below electrode of metal and the actual in addition Seed Layer in bottom electrode extraction electrode place, because its electrogilding with thickening is integrated, so do not mark Seed Layer again in this figure and the schematic diagram subsequently, the interior coupling lead-in wire of interior in the future coupling device can carry out the bonding of metal lead wire according to the design needs on this two places metal.
14, the 4th photoetching: purpose is the insulating medium layer that exposes on the scribing road, for subsequent corrosion is prepared, as shown in figure 11.
15, the insulating medium layer on the corrosion scribing road: the corrosion of the insulating medium layer on the scribing road is clean.Purpose is to avoid the insulating medium layer on the scribing road to be subjected to stress rupture when mechanical scribing, and under high temperature subsequently, the stress expansion forms crackle, and stretches to MIM electric capacity, and is unfavorable to the stability and the reliability of electric capacity.
16, remove photoresist the 4th time: the photoresist of the MIM electric capacity wafer surface after will corroding is removed clean, as shown in figure 12.
17, back face metalization: purpose is to make electric capacity realize good being connected with base, if adopt the gluing technology that connects, then back side metallization technology can omit.
18, scribing: will be formed on the MIM electric capacity on the wafer and be divided into discrete one by one MIM electric capacity, and, be equipped with follow-up interior mesh power transistor and shelve use as Figure 14 or shown in Figure 15.
Traditional MIM electric capacity generally is to carry out on silicon or gallium arsenide substrate, because alloy reaction takes place in metal and silicon or GaAs material easily, so the formation temperature of capacitive insulation dielectric layer generally can not surpass 350 ℃, cause insulating medium layer too loose, stable unfavorable to MIM electric capacity.The present invention adopts SiC or sapphire as substrate, because SiC and sapphire stability, the temperature of itself and metal generation significant reaction generally is greater than 900 ℃, so can guarantee the stability of MIM electric capacity metal electrode of the present invention, behind the deposition insulating layer medium, also can adopt 800-850 ℃ high temperature that insulating medium layer is carried out fine and close annealing in process, avoid the existence of insulating medium layer inside aperture phenomenon, be that insulating medium layer is too loose, avoided metal and insulating medium layer to adhere to not firm phenomenon to a certain extent, thereby improved the stability and the reliability of MIM electric capacity of the present invention, also helped the lifting of the microwave property of this electric capacity.Because the raising of insulating medium layer compactness has also been avoided causing occurring bad phenomenon such as capacitance short-circuit because of follow-up sintering, lead-in wire bonding apply the destruction of ultrasonic power equal pressure to the porous medium layer to capacitive surface.Improved total rate of finished products of mesh power device tubulature in the microwave.
For avoiding the destruction of scribing to insulating medium layer, after capacitance sheet technology is finished, the present invention has increased once the photoetching process to the dielectric layer in scribing road, purpose is that the insulating medium layer on the scribing road was corroded before scribing totally, thereby the damage of having avoided the scribing cutter on dielectric layer, to stay, also just avoid this damage Stress Release in high temperature processes such as follow-up sintering, to occur, caused dielectric layer the phenomenon of crackle to occur, improved the stability and the rate of finished products of interior matching capacitance.
The present invention has also reduced the interior matching capacitance of microwave to pure gold consumption, and about about 100 microns proof gold layer can omit, and the substitute is the metallic nickel that adopts on carborundum or the sapphire, about 3000
, saved the consumption of precious metal significantly, also avoided regular maintenance to electroplate liquid, avoided the deficiency of frequent preparation electroplate liquid.
The compactness of capacitive insulation medium of the present invention has been owing to passed through higher Temperature Treatment, and it is better than general employing PECVD and forms the compactness that directly forms the insulating medium layer of MIM electric capacity behind the insulating medium layer.So its microwave property and stability and reliability will be higher than traditional MIM electric capacity, all facilitation can be arranged to the lifting of the transistorized stability of mesh power, reliability and overall rate of finished products in the microwave of at present basic armrest machine frame, sintering, bonding.
Claims (7)
1. the effective MIM electric capacity of matched crystal in the resistant to elevated temperatures microwave, it is characterized in that comprising substrate (1), metal bottom electrode (2), insulating medium layer (3) and electrode of metal (5), described metal bottom electrode (2) is fixed on the upper surface of described substrate (1), the outside of described metal bottom electrode (2) is enclosed with insulating medium layer (3), described insulating medium layer (3) is through The high temperature anneal and which is provided with the metal bottom electrode fairlead (9) that runs through insulating medium layer, be provided with the bottom electrode extraction electrode (4) of fixedlying connected with described metal bottom electrode (2) in described metal bottom electrode fairlead (9), described electrode of metal (5) is fixed on the upper surface of described insulating medium layer (3).
2. the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave according to claim 1 is characterized in that the thickness of described insulating medium layer (3) is not less than 3000
, the thickness of described electrode of metal (5) and metal bottom electrode extraction electrode (4) is 1 μ m-10 μ m.
3. the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave according to claim 1 is characterized in that described MIM electric capacity also comprises the metal layer (6) that is fixed on described substrate lower surface.
4. the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave according to claim 1, the manufacturing materials that it is characterized in that described substrate (1) is sapphire or carborundum.
5. the manufacture method of the effective MIM electric capacity of matched crystal in the resistant to elevated temperatures microwave is characterized in that may further comprise the steps:
(1) photoetching for the first time: the upper surface at substrate uses the figure that makes the metal bottom electrode by lithography;
(2) evaporation of metal: substrate is heated to 60 ℃-80 ℃, on substrate, evaporates 1000
-3000
Nickel;
(3) peel off unnecessary metal: the metal on photoresist is together got rid of with photoresist, only stayed the metal at metal bottom electrode place;
(4) insulating medium layer of deposit MIM electric capacity: adopt PECVD having substrate surface deposit one deck insulating medium layer of metal bottom electrode;
(5) fine and close annealing in process: above-mentioned wafer is heated to 800 ℃-850 ℃, it is carried out annealing in process;
(6) photoetching for the second time: form the fairlead of metal bottom electrode, non-fairlead is partly made with photoresist as the protection mask;
(7) the corrosion insulating medium layer forms the fairlead (9) of metal bottom electrode;
(8) remove photoresist for the second time: the photoresist that will erode away the wafer surface of metal bottom electrode fairlead is removed clean;
(9) metal sputtering: upper surface splash-proofing sputtering metal titanium-Jin or Titanium tungsten-Jin at the wafer that passes through above-mentioned processing form Seed Layer (10);
(10) photoetching for the third time: the figure that forms electrode of metal and bottom electrode extraction electrode on the Seed Layer surface;
(11) electrogilding: electrode of metal and bottom electrode extraction electrode are electroplated thickening, and thickness 1 μ m-10 μ m removes photoresist;
(12) remove and corrode Seed Layer beyond clean electrode of metal and the bottom electrode extraction electrode, form electrode of metal and bottom electrode extraction electrode;
(13) the 4th photoetching: the insulating medium layer on the scribing road is exposed in photoetching, for subsequent corrosion is prepared;
(14) insulating medium layer on the corrosion scribing road: the corrosion of the insulating medium layer on the scribing road is clean;
Remove photoresist (15) the 4th times: the photoresist of the MIM electric capacity wafer surface after will corroding is removed clean;
(16) scribing: will be in the MIM electric capacity on the wafer and be divided into discrete one by one MIM electric capacity.
6. the manufacture method of the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave according to claim 5 is characterized in that needing backing material is cleaned up before carrying out the photoetching first time.
7. the manufacture method of the effective MIM electric capacity of matched crystal in a kind of resistant to elevated temperatures microwave according to claim 5 is characterized in that need carrying out the back face metalization operation at the bottom surface of substrate after carrying out removing photoresist the 4th time.
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CN103545172A (en) * | 2013-10-11 | 2014-01-29 | 中国电子科技集团公司第十三研究所 | Method of preventing medium cracks at cuts of microwave internally-matched capacitors |
CN103904137A (en) * | 2014-03-21 | 2014-07-02 | 中国电子科技集团公司第十三研究所 | Mos capacitor and manufacturing method thereof |
CN105070707A (en) * | 2015-07-16 | 2015-11-18 | 江苏中电振华晶体技术有限公司 | MIM capacitor and manufacturing method thereof |
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CN103904137A (en) * | 2014-03-21 | 2014-07-02 | 中国电子科技集团公司第十三研究所 | Mos capacitor and manufacturing method thereof |
CN104037062B (en) * | 2014-06-11 | 2016-10-05 | 中国电子科技集团公司第十三研究所 | The manufacture method of mos capacitance |
CN105070707A (en) * | 2015-07-16 | 2015-11-18 | 江苏中电振华晶体技术有限公司 | MIM capacitor and manufacturing method thereof |
CN105070707B (en) * | 2015-07-16 | 2018-01-02 | 江苏中电振华晶体技术有限公司 | A kind of MIM capacitor and its manufacture method |
CN105280727A (en) * | 2015-11-06 | 2016-01-27 | 中国电子科技集团公司第十三研究所 | Microwave internal matching power transistor matching capacitor and manufacturing method thereof |
CN111816644A (en) * | 2019-04-10 | 2020-10-23 | 力成科技股份有限公司 | Antenna integrated packaging structure and manufacturing method thereof |
CN111816644B (en) * | 2019-04-10 | 2023-08-29 | 力成科技股份有限公司 | Antenna integrated packaging structure and manufacturing method thereof |
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