CN103218966A - Data transmission method and device for internal interface of display panel - Google Patents

Data transmission method and device for internal interface of display panel Download PDF

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CN103218966A
CN103218966A CN2013101133186A CN201310113318A CN103218966A CN 103218966 A CN103218966 A CN 103218966A CN 2013101133186 A CN2013101133186 A CN 2013101133186A CN 201310113318 A CN201310113318 A CN 201310113318A CN 103218966 A CN103218966 A CN 103218966A
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byte
video packets
followed successively
packet
video
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CN103218966B (en
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王鑫
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Analogix Semiconductor Beijing Inc
Analogix International LLC
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Analogix Semiconductor Beijing Inc
Analogix International LLC
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Abstract

The invention discloses a data transmission method and device for an internal interface of a display panel. The data transmission method for the internal interface of the display panel comprises the following steps that a transmitting end of the internal interface of the display panel maps display data on a TCON (Timing Controller) side into a data packet on a data channel of the internal interface of the display panel; the transmitting end encodes the data packet; the transmitting end transmits the encoded data packet to a receiving end of the internal interface of the display panel by adopting fixed rate through the data channel; the receiving end acquires clock information according to the fixed rate corresponding to the data packet; the receiving end decodes the data packet according to the clock information; and the receiving end transmits the decoded data packet to an SD (Source Driver). According to the data transmission method and device disclosed by the invention, the problem of higher electromagnetic interference of the display panel in the prior art is solved and the effects of reducing the electromagnetic interference and improving the anti-interference property are further achieved.

Description

The data transmission method of display panel internal interface and device
Technical field
The present invention relates to the display panel field, in particular to a kind of data transmission method and device of display panel internal interface.
Background technology
Make the field at display panel at present, the widespread use of end-to-end interface mode, still, the inventor finds in the present various end-to-end interface, has serious electromagnetic interference (EMI) (Electro-Magnetic Interference is called for short EMI) problem.
At the electromagnetic interference (EMI) problem of higher of display panel in the related art, effective solution is not proposed as yet at present.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of data transmission method and device of display panel internal interface, to solve the electromagnetic interference (EMI) problem of higher of display panel in the prior art.
To achieve these goals, according to an aspect of the present invention, a kind of data transmission method of display panel internal interface is provided, has comprised: the transmitting terminal of display panel internal interface is mapped as the video data of TCON side packet on the data channel of display panel internal interface; Transmitting terminal is encoded to packet; Packet after transmitting terminal is encoded via data channel, the transmission of employing fixed rate is to the receiving end of display panel internal interface; Receiving end obtains clock information according to the fixed rate of packet correspondence; Receiving end is decoded to packet according to clock information; And receiving end with decoded data packet transmission to SD.
Further, before transmitting terminal is encoded to packet, the data transmission method of display panel internal interface also comprises: transmitting terminal carries out scrambling to packet, wherein, transmitting terminal is encoded to packet and is comprised that the packet after transmitting terminal is to scrambling encodes, after receiving end is decoded to packet, the data transmission method of display panel internal interface also comprises: receiving end carries out descrambling to packet, wherein, receiving end comprises that to SD data packet transmission after receiving end is with descrambling is to SD with decoded data packet transmission.
Further, packet is carried out scrambling comprises by linear feedback shift register LFSR polynomial expression packet is carried out scrambling that wherein, the LFSR polynomial expression is:
G(x)=X 16+X 5+X 4+X 3+1。
Further, packet comprises first space code, controlling packet, video packets, second space code and idle bit successively, and wherein, first space code is different space codes with second space code.
Further, packet is carried out scrambling and coding comprises: only controlling packet, video packets and idle bit are carried out scrambling and coding.
Further, idle bit comprises whole zero bytes before scrambling and the coding, and controlling packet comprises the static state in the data transmission procedure or dynamically arranges order.
Further, when having two pairs of differential signals between TCON and SD, the display panel internal interface has two data channels, video data is mapped as packet comprises on the data channel of display panel internal interface: video data is shone upon packet on two data channels respectively, wherein, controlling packet on two data channels in the packet is identical, and when having a pair of differential signal between TCON and SD, the display panel internal interface only has a data channel.
Further, the packet that video data is mapped as on the data channel comprises: video data is carried out 6bpc pattern or 8bpc mode map.
Further, when the display panel internal interface has a data channel and video data when carrying out the 8bpc mode map, the 0th to the 7th of the X byte of video packets is followed successively by Ri[0], Ri[1] to Ri[7], the 0th to the 7th of the X+1 byte of video packets is followed successively by Gi[0], Gi[1] to Gi[7], the 0th to the 7th of the X+2 byte of video packets is followed successively by Bi[0], Bi[1] to Bi[7], wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i is nonnegative integer, n=1~7.
Further, when the display panel internal interface has two data channels and video data when carrying out the 8bpc mode map, if the number of pixels in each cutting video line is an even number, then the 0th of the X byte of first video packets the to the 7th is followed successively by Ri[0], Ri[1] to Ri[7], the 0th to the 7th of the X+1 byte of first video packets is followed successively by Gi[0], Gi[1] to Gi[7], the 0th to the 7th of the X+2 byte of first video packets is followed successively by Bi[0], Bi[1] to Bi[7], wherein, first video packets is the video packets in the packet on data channel in two data channels, the 0th to the 7th of the X byte of second video packets is followed successively by R (i+1) [0], R (i+1) [1] is to R (i+1) [7], the 0th to the 7th of the X+1 byte of second video packets is followed successively by G (i+1) [0], G (i+1) [1] is to G (i+1) [7], the 0th to the 7th of the X+2 byte of second video packets is followed successively by B (i+1) [0], B (i+1) [1] is to B (i+1) [7], wherein, second video packets is the video packets in the packet on another data channel in two data channels, when if number of pixels is odd number, first video packets when first video packets is even number with number of pixels is identical, the X byte of second video packets, everybody of X+1 byte and X+2 byte is 0, wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i is a nonnegative integer, n=1~7.
Further, when the display panel internal interface has a data channel and video data when carrying out the 6bpc mode map, if the number of pixels in each cutting video line is 4N, then the 0th of the X byte of video packets the to the 7th is followed successively by Gi[0], Gi[1], Ri[0], Ri[1] to Ri[5], the 0th to the 7th of the X+1 byte of video packets is followed successively by Gi[2], Gi[3], Bi[0], Bi[1] to Bi[5], the 0th to the 7th of the X+2 byte of video packets is followed successively by Gi[4], Gi[5], R (i+1) [0], R (i+1) [1] is to R (i+1) [5], the 0th to the 7th of the X+3 byte of video packets is followed successively by G (i+1) [0], G (i+1) [1], B (i+1) [0], B (i+1) [1] is to B (i+1) [5], the 0th to the 7th of the X+4 byte of video packets is followed successively by G (i+1) [2], G (i+1) [3] is to G (i+1) [5], G (i+2) [0], G (i+2) [1] is to G (i+2) [3], the 0th to the 7th of the X+5 byte of video packets is followed successively by G (i+2) [4], G (i+2) [5], R (i+2) [0], R (i+2) [1] is to R (i+2) [5], the 0th to the 7th of the X+6 byte of video packets is followed successively by G (i+3) [0], G (i+3) [1], B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th to the 7th of the X+7 byte of video packets is followed successively by G (i+3) [2], G (i+3) [3], R (i+3) [0], R (i+3) [1] is to R (i+3) [5], and the 0th to the 7th of the X+8 byte of video packets is followed successively by G (i+3) [4], G (i+3) [5], B (i+3) [0], B (i+3) [1] is to B (i+3) [5];
If number of pixels is 4N+1, then the X byte of video packets, X byte and the X+1 byte of video packets was identical respectively when the X+1 byte was 4N with number of pixels, the 0th and the 1st of the X+2 byte of video packets is followed successively by Gi[4] and Gi[5], the 2nd to the 7th of the X+2 byte of video packets is 0; If number of pixels is 4N+2, then the X byte of video packets, the X byte, X+1 byte to the X+3 byte of video packets was identical respectively when X+1 byte to the X+3 byte was 4N with number of pixels, the 0th to the 3rd of the X+4 byte of video packets is followed successively by G (i+1) [2], G (i+1) [3] to G (i+1) [5], and the 4th to the 7th of the X+4 byte of video packets is 0; If number of pixels is 4N+3, the X byte of video packets then, the X byte of video packets when X+1 byte to the X+5 byte and number of pixels are 4N, X+1 byte to the X+5 byte is identical respectively, the 2nd to the 7th of the X+6 byte of video packets is followed successively by B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th and the 1st of the X+6 byte of video packets is 0, wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i, N is nonnegative integer, n=1~5.
Further, when the display panel internal interface has two data channels and video data when carrying out the 6bpc mode map, if the number of pixels in each cutting video line is 8N, then the 0th of the X byte of first video packets the to the 7th is followed successively by Gi[0], Gi[1], Ri[0], Ri[1] to Ri[5], the 0th to the 7th of the X+1 byte of first video packets is followed successively by Gi[2], Gi[3], Bi[0], Bi[1] to Bi[5], the 0th to the 7th of the X+2 byte of first video packets is followed successively by Gi[4], Gi[5], R (i+2) [0], R (i+2) [1] is to R (i+2) [5], the 0th to the 7th of the X+3 byte of first video packets is followed successively by G (i+2) [0], G (i+2) [1], B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th to the 7th of the X+4 byte of first video packets is followed successively by G (i+2) [2], G (i+2) [3] is to G (i+2) [5], G (i+4) [0], G (i+4) [1] is to G (i+4) [3], the 0th to the 7th of the X+5 byte of first video packets is followed successively by G (i+4) [4], G (i+4) [5], R (i+4) [0], R (i+4) [1] is to R (i+4) [5], the 0th to the 7th of the X+6 byte of first video packets is followed successively by G (i+6) [0], G (i+6) [1], B (i+4) [0], B (i+4) [1] is to B (i+4) [5], the 0th to the 7th of the X+7 byte of first video packets is followed successively by G (i+6) [2], G (i+6) [3], R (i+6) [0], R (i+6) [1] is to R (i+6) [5], the 0th to the 7th of the X+8 byte of first video packets is followed successively by G (i+6) [4], G (i+6) [5], B (i+6) [0], B (i+6) [1] is to B (i+6) [5], wherein, first video packets is the video packets in the packet on data channel in two data channels, the 0th to the 7th of the X byte of second video packets is followed successively by G (i+1) [0], G (i+1) [1], R (i+1) [0], R (i+1) [1] is to R (i+1) [5], the 0th to the 7th of the X+1 byte of second video packets is followed successively by G (i+1) [2], G (i+1) [3], B (i+1) [0], B (i+1) [1] is to B (i+1) [5], the 0th to the 7th of the X+2 byte of second video packets is followed successively by G (i+1) [4], G (i+1) [5], R (i+3) [0], R (i+3) [1] is to R (i+3) [5], the 0th to the 7th of the X+3 byte of second video packets is followed successively by G (i+3) [0], G (i+3) [1], B (i+3) [0], B (i+3) [1] is to B (i+3) [5], the 0th to the 7th of the X+4 byte of second video packets is followed successively by G (i+3) [2], G (i+3) [3] is to G (i+3) [5], G (i+5) [0], G (i+5) [1] is to G (i+5) [3], the 0th to the 7th of the X+5 byte of second video packets is followed successively by G (i+5) [4], G (i+5) [5], R (i+5) [0], R (i+5) [1] is to R (i+5) [5], the 0th to the 7th of the X+6 byte of second video packets is followed successively by G (i+7) [0], G (i+7) [1], B (i+5) [0], B (i+5) [1] is to B (i+5) [5], the 0th to the 7th of the X+7 byte of second video packets is followed successively by G (i+7) [2], G (i+7) [3], R (i+7) [0], R (i+7) [1] is to R (i+7) [5], the 0th to the 7th of the X+8 byte of second video packets is followed successively by G (i+7) [4], G (i+7) [5], B (i+7) [0], B (i+7) [1] is to B (i+7) [5], wherein, second video packets is the video packets in the packet on another data channel in two data channels; If number of pixels is 8N+1, then the X byte of first video packets, X byte and the X+1 byte of first video packets was identical respectively when the X+1 byte was 8N with number of pixels, the 0th and the 1st of the X+2 byte of first video packets is followed successively by Gi[4] and Gi[5], everybody of X byte, X+1 byte and X+2 byte that the 2nd to the 7th of the X+2 byte of first video packets is 0, the second video packets is 0; If number of pixels is 8N+2, first video packets when then first video packets is 8N+1 with number of pixels is identical, the X byte of second video packets, X byte and the X+1 byte of second video packets was identical respectively when the X+1 byte was 8N with number of pixels, the 0th and the 1st of the X+2 byte of second video packets is followed successively by G (i+1) [4] and G (i+1) [5], and the 2nd to the 7th of the X+2 byte of second video packets is 0; If number of pixels is 8N+3, the X byte of first video packets then, the X byte of first video packets when X+1 byte to the X+3 byte and number of pixels are 8N, X+1 byte to the X+3 byte is identical respectively, the 0th to the 3rd of the X+4 byte of first video packets is followed successively by G (i+2) [2] to G (i+2) [5], the 3rd to the 7th of the X+4 byte of first video packets is 0, the X byte of second video packets and X+1 byte were identical respectively when the X byte of second video packets was 8N with the X+1 byte with number of pixels, the 0th and the 1st of the X+2 byte of second video packets is followed successively by G (i+1) [4] and G (i+1) [5], the 2nd to the 7th of the X+2 byte of second video packets, the X+3 and the X+4 byte of second video packets are 0; If number of pixels is 8N+4, first video packets when then first video packets is 8N+3 with number of pixels is identical, the X byte of second video packets, the X byte, X+1 byte to the X+3 byte of second video packets was identical respectively when X+1 byte to the X+3 byte was 8N with number of pixels, the 0th to the 3rd of the X+4 byte of second video packets is followed successively by G (i+3) [2] to G (i+3) [5], and the 3rd to the 7th of the X+4 byte of second video packets is 0; If number of pixels is 8N+5, the X byte of first video packets then, the X byte of first video packets when X+1 byte to the X+5 byte and number of pixels are 8N, X+1 byte to the X+5 byte is identical respectively, the 0th and the 1st of the X+6 byte of first video packets is 0, the 2nd to the 7th of the X+6 byte of first video packets is followed successively by B (i+4) [0] to B (i+4) [5], the X byte of second video packets, the X byte of second video packets when X+1 byte to the X+3 byte and number of pixels are 8N, X+1 byte to the X+3 byte is identical respectively, the 0th to the 3rd of the X+4 byte of second video packets is followed successively by G (i+3) [2] to G (i+3) [5], the 3rd to the 7th of the X+4 byte of second video packets, the X+5 byte and the X+6 byte of second video packets are 0; If number of pixels is 8N+6, first video packets when then first video packets is 8N+5 with number of pixels is identical, the X byte of second video packets, the X byte, X+1 byte to the X+5 byte of second video packets was identical respectively when X+1 byte to the X+5 byte was 8N with number of pixels, the 2nd to the 7th of X+6 byte that the 0th and the 1st of the X+6 byte of second video packets is 0, the second video packets is followed successively by B (i+5) [0] to B (i+5) [5]; If number of pixels is 8N+7, first video packets when then first video packets is 8N with number of pixels is identical, the X byte of second video packets, the X byte of second video packets when X+1 byte to the X+5 byte and number of pixels are 8N, X+1 byte to the X+5 byte is identical respectively, the 2nd to the 7th of the X+6 byte of second video packets is followed successively by B (i+5) [0], B (i+5) [1] is to B (i+5) [5], the 0th and the 1st of the X+6 byte of second video packets, the X+7 byte and the X+8 byte of second video packets are 0, wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i, N is nonnegative integer, n=1~5.
To achieve these goals, according to a further aspect in the invention, a kind of data transmission device of display panel internal interface is provided, and the data transmission device of display panel internal interface is used to carry out the data transmission method of any display panel internal interface that foregoing of the present invention provides.
To achieve these goals, according to a further aspect in the invention, provide a kind of data transmission device of display panel internal interface, having comprised: mapping block is used for packet on the data channel that video data with the TCON side is mapped as the display panel internal interface; Coding module is used for packet is encoded; Sending module is used for via data channel, adopts the packet after fixed rate sends coding; Receiver module is used to receive the transport module data packets for transmission, and obtains clock information according to the fixed rate of packet correspondence; Decoder module is used for according to clock information packet being decoded; And transport module, be used for decoded data packet transmission to SD.
Further, the data transmission device of display panel internal interface also comprises: scrambling module, be used for before coding module is encoded to packet, packet being carried out scrambling, wherein, coding module also is used for the packet after the scrambling is encoded, descrambling module is used for after decoder module is decoded to packet packet being carried out descrambling, wherein, transport module also is used for the data packet transmission behind the descrambling to SD.
By the present invention, the transmitting terminal that adopts the display panel internal interface is mapped as the video data of TCON side packet on the data channel of display panel internal interface; Transmitting terminal is encoded to packet; Packet after transmitting terminal is encoded via data channel, the transmission of employing fixed rate is to the receiving end of display panel internal interface; Receiving end obtains clock information according to the fixed rate of packet correspondence; Receiving end is decoded to packet according to clock information; And receiving end with decoded data packet transmission to SD.By clock information being embedded in the mode of signaling channel, make receiving end to obtain clock information according to the fixed rate of packet correspondence, increased the anti-interference of communication, solve the electromagnetic interference (EMI) problem of higher of display panel in the prior art, and then reached the effect that reduces electromagnetic interference (EMI), improves anti-interference.
Description of drawings
The accompanying drawing that constitutes the application's a part is used to provide further understanding of the present invention, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the process flow diagram according to the data transmission method of the display panel internal interface of the embodiment of the invention;
Fig. 2 is the pixel mapping figure that video data is carried out single channel 8bpc mode map according to the data transmission method of the embodiment of the invention;
Fig. 3 a and Fig. 3 b and Fig. 4 a and Fig. 4 b are the pixel mapping figure that video data is carried out double-channel 8bpc mode map according to the data transmission method of the embodiment of the invention;
Fig. 5 a to Fig. 5 d is the pixel mapping figure that video data is carried out single channel 6bpc mode map according to the data transmission method of the embodiment of the invention;
Fig. 6 a to Fig. 6 m is the pixel mapping figure that video data is carried out double-channel 6bpc mode map according to the data transmission method of the embodiment of the invention; And
Fig. 7 is the synoptic diagram according to the data transmission device of the display panel internal interface of the embodiment of the invention.
Embodiment
Need to prove that under the situation of not conflicting, embodiment and the feature among the embodiment among the application can make up mutually.Describe the present invention below with reference to the accompanying drawings and in conjunction with the embodiments in detail.
The embodiment of the invention provides a kind of data transmission method of display panel internal interface, below the data transmission method of the display panel internal interface that the embodiment of the invention provided is specifically introduced:
Fig. 1 is the data transmission method according to the display panel internal interface of the embodiment of the invention, and as shown in Figure 1, this data transmission method comprises that following step S101 is to step S106:
S101: the transmitting terminal of display panel internal interface is mapped as the video data of TCON side packet on the data channel of display panel internal interface, TCON is meant the time schedule controller in the display panel, that is to say the time schedule controller that the display panel internal interface is connected, data channel is the transmitting terminal of display panel internal interface sends a passage from data to receiving end.
S102: transmitting terminal is encoded to packet, preferably, before transmitting terminal is encoded to packet, earlier packet is carried out scrambling, then the packet after the scrambling is encoded.
S103: the packet after transmitting terminal is encoded via data channel, the transmission of employing fixed rate is to the receiving end of display panel internal interface, that is, transmitting terminal will communicate used clock information and be embedded in the data channel.
S104: receiving end obtains clock information according to the fixed rate of packet correspondence, that is, the fixed rate when sending packet according to transmitting terminal obtains clock information.
S105: receiving end is decoded to packet according to clock information, and preferably, receiving end carried out descrambling to packet earlier before according to clock information packet being decoded.
S106: to SD, accordingly, the data packet transmission of receiving end after with descrambling is to SD with decoded data packet transmission for receiving end, and SD is the drive circuit chip (Source Driver is called for short SD) that the display panel internal interface is connected.
The data transmission method of the display panel internal interface of the embodiment of the invention, employing is embedded in clock information the mode of signaling channel, make receiving end to obtain clock information according to the fixed rate of packet correspondence, increased the anti-interference of communication, solve the electromagnetic interference (EMI) problem of higher of display panel in the prior art, and then reached the effect that reduces electromagnetic interference (EMI), improves anti-interference.Wherein, earlier packet is carried out sending after the scrambling, correspondingly, carry out transferring to again behind the descrambling mode of SD, can reduce electromagnetic interference (EMI) further by receiving end by transmitting terminal.
In the embodiment of the invention, packet comprises first space code, controlling packet, video packets, second space code and idle bit successively, wherein, first space code is different space codes with second space code, space code is the proprietary space code (below be called the K sign indicating number) between controlling packet and the video packets, so that distinguish mutually with idle bit, idle bit comprises whole zero bytes before scrambling and the coding, and controlling packet comprises the static state in the data transmission procedure or dynamically arranges order.Packet is being carried out in scrambling and the cataloged procedure, only to controlling packet, video packets and idle bit carry out scrambling and coding, the K sign indicating number is not carried out scrambling and coding, by the K sign indicating number controlling packet in the packet and video packets are cut, realized that receiving end is when receiving packet, can easily controlling packet and video packets be distinguished, ignore in scrambling and the cataloged procedure is that the purpose of K sign indicating number is, because the K sign indicating number is a specific coding, it is characterized in that including continuous 61 or continuous 60, certainly can not occur in the data of this feature behind coding of the present invention, therefore receiving terminal can be discerned the K sign indicating number easily, and with the sign of K sign indicating number as byte-aligned, promptly receiving end find behind the K sign indicating number can byte the interval, be partitioned into the byte of decoding for finally decoding.
Wherein, the concrete mode of packet being carried out scrambling and descrambling is: undertaken by linear feedback shift register (Linear Feedback Shift Register is called for short LFSR) polynomial expression, the LFSR polynomial expression is G(x)=X 16+ X 5+ X 4+ X 3+ 1, the data of every byte are all carried out scrambling/descrambling with the opposite direction of the most-significant byte of LFSR:
Figure GDA00003005171700071
Shown in the following verilog code of LFSR model:
Figure GDA00003005171700081
Further, when having two pairs of differential signals between TCON and SD, accordingly, the display panel internal interface has two data channels, video data is mapped as packet comprises on the data channel of display panel internal interface:
Video data is mapped as two packets on the data channel respectively, and wherein, the controlling packet on two data channels in the packet is identical, and when having a pair of differential signal between TCON and SD, the display panel internal interface only has a data channel.Wherein, the packet that video data is mapped as on the data channel mainly is: video data is carried out 6bpc pattern or 8bpc mode map, and bpc is meant every colour bits (bit per color).
Below the number of data channels difference that has with regard to the display panel internal interface, the pattern difference that video data is shone upon employing specifies the video pixel of each byte in the video packets:
Situation one: when the display panel internal interface has a data channel and video data when carrying out the 8bpc mode map, as shown in Figure 2, the 0th to the 7th of the X byte of video packets is followed successively by Ri[0], Ri[1] to Ri[7], the 0th to the 7th of the X+1 byte of video packets is followed successively by Gi[0], Gi[1] to Gi[7], the 0th to the 7th of the X+2 byte of video packets is followed successively by Bi[0], Bi[1] to Bi[7], wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i is nonnegative integer, n=1~7.
Situation two: when the display panel internal interface has two data channels and video data when carrying out the 8bpc mode map:
As show shown in 3a and the table 3b, if the number of pixels in each cutting video line is an even number, then the 0th of the X byte of first video packets the to the 7th is followed successively by Ri[0], Ri[1] to Ri[7], the 0th to the 7th of the X+1 byte of first video packets is followed successively by Gi[0], Gi[1] to Gi[7], the 0th to the 7th of the X+2 byte of first video packets is followed successively by Bi[0], Bi[1] to Bi[7], wherein, first video packets is the video packets in the packet on data channel in two data channels, the 0th to the 7th of the X byte of second video packets is followed successively by R (i+1) [0], R (i+1) [1] is to R (i+1) [7], the 0th to the 7th of the X+1 byte of second video packets is followed successively by G (i+1) [0], G (i+1) [1] is to G (i+1) [7], the 0th to the 7th of the X+2 byte of second video packets is followed successively by B (i+1) [0], B (i+1) [1] is to B (i+1) [7], wherein, second video packets is the video packets in the packet on another data channel in two data channels;
Shown in Fig. 4 a and Fig. 4 b, when if number of pixels is odd number, first video packets when first video packets is even number with number of pixels is identical, everybody of X byte, X+1 byte and the X+2 byte of second video packets is 0, wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i are nonnegative integer, n=1~7.
Situation three: when the display panel internal interface has a data channel and video data when carrying out the 6bpc mode map:
Shown in Fig. 5 a, if the number of pixels in each cutting video line is 4N, then the 0th of the X byte of video packets the to the 7th is followed successively by Gi[0], Gi[1], Ri[0], Ri[1] to Ri[5], the 0th to the 7th of the X+1 byte of video packets is followed successively by Gi[2], Gi[3], Bi[0], Bi[1] to Bi[5], the 0th to the 7th of the X+2 byte of video packets is followed successively by Gi[4], Gi[5], R (i+1) [0], R (i+1) [1] is to R (i+1) [5], the 0th to the 7th of the X+3 byte of video packets is followed successively by G (i+1) [0], G (i+1) [1], B (i+1) [0], B (i+1) [1] is to B (i+1) [5], the 0th to the 7th of the X+4 byte of video packets is followed successively by G (i+1) [2], G (i+1) [3] is to G (i+1) [5], G (i+2) [0], G (i+2) [1] is to G (i+2) [3], the 0th to the 7th of the X+5 byte of video packets is followed successively by G (i+2) [4], G (i+2) [5], R (i+2) [0], R (i+2) [1] is to R (i+2) [5], the 0th to the 7th of the X+6 byte of video packets is followed successively by G (i+3) [0], G (i+3) [1], B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th to the 7th of the X+7 byte of video packets is followed successively by G (i+3) [2], G (i+3) [3], R (i+3) [0], R (i+3) [1] is to R (i+3) [5], and the 0th to the 7th of the X+8 byte of video packets is followed successively by G (i+3) [4], G (i+3) [5], B (i+3) [0], B (i+3) [1] is to B (i+3) [5];
Shown in Fig. 5 b, if number of pixels is 4N+1, then the X byte of video packets, X byte and the X+1 byte of video packets was identical respectively when the X+1 byte was 4N with number of pixels, the 0th and the 1st of the X+2 byte of video packets is followed successively by Gi[4] and Gi[5], the 2nd to the 7th of the X+2 byte of video packets is 0;
Shown in Fig. 5 c, if number of pixels is 4N+2, then the X byte of video packets, the X byte, X+1 byte to the X+3 byte of video packets was identical respectively when X+1 byte to the X+3 byte was 4N with number of pixels, the 0th to the 3rd of the X+4 byte of video packets is followed successively by G (i+1) [2], G (i+1) [3] to G (i+1) [5], and the 4th to the 7th of the X+4 byte of video packets is 0;
Shown in Fig. 5 d, if number of pixels is 4N+3, the X byte of video packets then, the X byte of video packets when X+1 byte to the X+5 byte and number of pixels are 4N, X+1 byte to the X+5 byte is identical respectively, the 2nd to the 7th of the X+6 byte of video packets is followed successively by B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th and the 1st of the X+6 byte of video packets is 0, wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i, N is nonnegative integer, n=1~5.
Situation four: when the display panel internal interface has two data channels and video data when carrying out the 6bpc mode map:
Shown in Fig. 6 a and 6b, if the number of pixels in each cutting video line is 8N, then the 0th of the X byte of first video packets the to the 7th is followed successively by Gi[0], Gi[1], Ri[0], Ri[1] to Ri[5], the 0th to the 7th of the X+1 byte of first video packets is followed successively by Gi[2], Gi[3], Bi[0], Bi[1] to Bi[5], the 0th to the 7th of the X+2 byte of first video packets is followed successively by Gi[4], Gi[5], R (i+2) [0], R (i+2) [1] is to R (i+2) [5], the 0th to the 7th of the X+3 byte of first video packets is followed successively by G (i+2) [0], G (i+2) [1], B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th to the 7th of the X+4 byte of first video packets is followed successively by G (i+2) [2], G (i+2) [3] is to G (i+2) [5], G (i+4) [0], G (i+4) [1] is to G (i+4) [3], the 0th to the 7th of the X+5 byte of first video packets is followed successively by G (i+4) [4], G (i+4) [5], R (i+4) [0], R (i+4) [1] is to R (i+4) [5], the 0th to the 7th of the X+6 byte of first video packets is followed successively by G (i+6) [0], G (i+6) [1], B (i+4) [0], B (i+4) [1] is to B (i+4) [5], the 0th to the 7th of the X+7 byte of first video packets is followed successively by G (i+6) [2], G (i+6) [3], R (i+6) [0], R (i+6) [1] is to R (i+6) [5], the 0th to the 7th of the X+8 byte of first video packets is followed successively by G (i+6) [4], G (i+6) [5], B (i+6) [0], B (i+6) [1] is to B (i+6) [5], wherein, first video packets is the video packets in the packet on data channel in two data channels, the 0th to the 7th of the X byte of second video packets is followed successively by G (i+1) [0], G (i+1) [1], R (i+1) [0], R (i+1) [1] is to R (i+1) [5], the 0th to the 7th of the X+1 byte of second video packets is followed successively by G (i+1) [2], G (i+1) [3], B (i+1) [0], B (i+1) [1] is to B (i+1) [5], the 0th to the 7th of the X+2 byte of second video packets is followed successively by G (i+1) [4], G (i+1) [5], R (i+3) [0], R (i+3) [1] is to R (i+3) [5], the 0th to the 7th of the X+3 byte of second video packets is followed successively by G (i+3) [0], G (i+3) [1], B (i+3) [0], B (i+3) [1] is to B (i+3) [5], the 0th to the 7th of the X+4 byte of second video packets is followed successively by G (i+3) [2], G (i+3) [3] is to G (i+3) [5], G (i+5) [0], G (i+5) [1] is to G (i+5) [3], the 0th to the 7th of the X+5 byte of second video packets is followed successively by G (i+5) [4], G (i+5) [5], R (i+5) [0], R (i+5) [1] is to R (i+5) [5], the 0th to the 7th of the X+6 byte of second video packets is followed successively by G (i+7) [0], G (i+7) [1], B (i+5) [0], B (i+5) [1] is to B (i+5) [5], the 0th to the 7th of the X+7 byte of second video packets is followed successively by G (i+7) [2], G (i+7) [3], R (i+7) [0], R (i+7) [1] is to R (i+7) [5], the 0th to the 7th of the X+8 byte of second video packets is followed successively by G (i+7) [4], G (i+7) [5], B (i+7) [0], B (i+7) [1] is to B (i+7) [5], wherein, second video packets is the video packets in the packet on another data channel in two data channels;
Shown in Fig. 6 c and 6d, if number of pixels is 8N+1, then the X byte of first video packets, X byte and the X+1 byte of first video packets was identical respectively when the X+1 byte was 8N with number of pixels, the 0th and the 1st of the X+2 byte of first video packets is followed successively by Gi[4] and Gi[5], everybody of X byte, X+1 byte and X+2 byte that the 2nd to the 7th of the X+2 byte of first video packets is 0, the second video packets is 0;
Shown in Fig. 6 c and 6e, if number of pixels is 8N+2, first video packets when then first video packets is 8N+1 with number of pixels is identical, the X byte of second video packets, X byte and the X+1 byte of second video packets was identical respectively when the X+1 byte was 8N with number of pixels, the 0th and the 1st of the X+2 byte of second video packets is followed successively by G (i+1) [4] and G (i+1) [5], and the 2nd to the 7th of the X+2 byte of second video packets is 0;
Shown in Fig. 6 f and 6g, if number of pixels is 8N+3, the X byte of first video packets then, the X byte of first video packets when X+1 byte to the X+3 byte and number of pixels are 8N, X+1 byte to the X+3 byte is identical respectively, the 0th to the 3rd of the X+4 byte of first video packets is followed successively by G (i+2) [2] to G (i+2) [5], the 3rd to the 7th of the X+4 byte of first video packets is 0, the X byte of second video packets and X+1 byte were identical respectively when the X byte of second video packets was 8N with the X+1 byte with number of pixels, the 0th and the 1st of the X+2 byte of second video packets is followed successively by G (i+1) [4] and G (i+1) [5], the 2nd to the 7th of the X+2 byte of second video packets, the X+3 and the X+4 byte of second video packets are 0;
Shown in Fig. 6 f and 6h, if number of pixels is 8N+4, first video packets when then first video packets is 8N+3 with number of pixels is identical, the X byte of second video packets, the X byte, X+1 byte to the X+3 byte of second video packets was identical respectively when X+1 byte to the X+3 byte was 8N with number of pixels, the 0th to the 3rd of the X+4 byte of second video packets is followed successively by G (i+3) [2] to G (i+3) [5], and the 3rd to the 7th of the X+4 byte of second video packets is 0;
Shown in Fig. 6 i and 6j, if number of pixels is 8N+5, the X byte of first video packets then, the X byte of first video packets when X+1 byte to the X+5 byte and number of pixels are 8N, X+1 byte to the X+5 byte is identical respectively, the 0th and the 1st of the X+6 byte of first video packets is 0, the 2nd to the 7th of the X+6 byte of first video packets is followed successively by B (i+4) [0] to B (i+4) [5], the X byte of second video packets, the X byte of second video packets when X+1 byte to the X+3 byte and number of pixels are 8N, X+1 byte to the X+3 byte is identical respectively, the 0th to the 3rd of the X+4 byte of second video packets is followed successively by G (i+3) [2] to G (i+3) [5], the 3rd to the 7th of the X+4 byte of second video packets, the X+5 byte and the X+6 byte of second video packets are 0;
Shown in Fig. 6 i and 6k, if number of pixels is 8N+6, first video packets when then first video packets is 8N+5 with number of pixels is identical, the X byte of second video packets, the X byte, X+1 byte to the X+5 byte of second video packets was identical respectively when X+1 byte to the X+5 byte was 8N with number of pixels, the 2nd to the 7th of X+6 byte that the 0th and the 1st of the X+6 byte of second video packets is 0, the second video packets is followed successively by B (i+5) [0] to B (i+5) [5];
Shown in Fig. 6 l and 6m, if number of pixels is 8N+7, first video packets when then first video packets is 8N with number of pixels is identical, the X byte of second video packets, the X byte of second video packets when X+1 byte to the X+5 byte and number of pixels are 8N, X+1 byte to the X+5 byte is identical respectively, the 2nd to the 7th of the X+6 byte of second video packets is followed successively by B (i+5) [0], B (i+5) [1] is to B (i+5) [5], the 0th and the 1st of the X+6 byte of second video packets, the X+7 byte and the X+8 byte of second video packets are 0
Wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i, N are nonnegative integer, n=1~5.
The embodiment of the invention also provides a kind of data transmission device of display panel internal interface, below the data transmission device of the display panel internal interface that the embodiment of the invention provided is specifically introduced:
Fig. 2 is that as shown in Figure 2, the data transmission device that this embodiment provided comprises according to the synoptic diagram of the data transmission device of the display panel internal interface of the embodiment of the invention:
Mapping block 10, be used for packet on the data channel that video data with the TCON side is mapped as the display panel internal interface, TCON is meant the time schedule controller in the display panel, that is to say the time schedule controller that the display panel internal interface is connected, data channel is the transmitting terminal of display panel internal interface sends a passage from data to receiving end.
Coding module 20 is used for packet is encoded, and preferably, before 20 pairs of packets of coding module are encoded, earlier by scrambling module packet is carried out scrambling, is encoded by the packet of coding module after to scrambling then.
Sending module 30 is used for via data channel, adopts the packet after fixed rate sends coding, that is, sending module 30 will communicate used clock information and be embedded in the data channel.
Receiver module 40 is used to receive the transport module data packets for transmission, and obtains clock information according to the fixed rate of packet correspondence, that is, the fixed rate when sending packet according to sending module 30 obtains clock information.
Decoder module 50 is used for according to clock information packet being decoded, and preferably, before decoder module 50 is decoded to packet according to clock information, by descrambling module packet is carried out descrambling earlier.
Transport module 60 is used for decoded data packet transmission to SD, and accordingly, to SD, SD is the drive circuit chip (Source Driver is called for short SD) that the display panel internal interface is connected to output module 60 with the data packet transmission behind the descrambling.
The data transmission device of the display panel internal interface of the embodiment of the invention, employing is embedded in clock information the mode of data channel, make receiving end to obtain clock information according to the fixed rate of packet correspondence, strengthened Electro Magnetic Compatibility, solve the electromagnetic interference (EMI) problem of higher of display panel in the prior art, and then reached the effect that reduces electromagnetic interference (EMI), improves anti-interference.Wherein, earlier packet is carried out scrambling by scrambling module after, send by sending module again, correspondingly, carry out descrambling by descrambling module after, transfer to the mode of SD again by transport module, can reduce electromagnetic interference (EMI) further.
As can be seen from the above description, the present invention has realized reducing the effect of electromagnetic interference (EMI), raising anti-interference.
Need to prove, can in computer system, carry out in the step shown in the process flow diagram of accompanying drawing such as a set of computer-executable instructions, and, though there is shown logical order in flow process, but in some cases, can carry out step shown or that describe with the order that is different from herein.
Obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with the general calculation device, they can concentrate on the single calculation element, perhaps be distributed on the network that a plurality of calculation element forms, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in the memory storage and carry out by calculation element, perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (14)

1. the data transmission method of a display panel internal interface is characterized in that, comprising:
The transmitting terminal of display panel internal interface is mapped as the video data of TCON side packet on the data channel of described display panel internal interface;
Described transmitting terminal is encoded to described packet;
Packet after described transmitting terminal is encoded via described data channel, the transmission of employing fixed rate is to the receiving end of described display panel internal interface;
Described receiving end obtains clock information according to the described fixed rate of described packet correspondence;
Described receiving end is decoded to described packet according to described clock information; And
Described receiving end with decoded data packet transmission to SD.
2. method according to claim 1 is characterized in that,
Before described transmitting terminal was encoded to described packet, described method also comprises: described transmitting terminal carried out scrambling to described packet, and wherein, described transmitting terminal is encoded to described packet and comprised that the packet after described transmitting terminal is to scrambling encodes,
After described receiving end is decoded to described packet, described method also comprises: described receiving end carries out descrambling to described packet, wherein, described receiving end comprises that to SD data packet transmission after described receiving end is with descrambling is to described SD with decoded data packet transmission.
3. method according to claim 2 is characterized in that, described packet is carried out scrambling comprise by linear feedback shift register LFSR polynomial expression described packet is carried out scrambling that wherein, the LFSR polynomial expression is:
G(x)=X 16+X 5+X 4+X 3+1。
4. according to claim 2 or 3 described methods, it is characterized in that described packet comprises first space code, controlling packet, video packets, second space code and idle bit successively, wherein, described first space code is different space codes with described second space code.
5. method according to claim 4 is characterized in that, described packet is carried out scrambling and coding comprises: only described controlling packet, described video packets and described idle bit are carried out scrambling and coding.
6. method according to claim 4 is characterized in that, described idle bit comprises whole zero bytes before scrambling and the coding, and described controlling packet comprises the static state in the data transmission procedure or dynamically arranges order.
7. method according to claim 4 is characterized in that,
When having two pairs of differential signals between described TCON and described SD, described display panel internal interface has two data channels, described video data is mapped as packet comprises on the data channel of described display panel internal interface: described video data is shone upon packet on described two data channels respectively, wherein, controlling packet on described two data channels in the packet is identical
When having a pair of differential signal between described TCON and described SD, described display panel internal interface only has a data channel.
8. method according to claim 7 is characterized in that, the packet that described video data is mapped as on the data channel comprises: described video data is carried out 6bpc pattern or 8bpc mode map.
9. method according to claim 8, it is characterized in that, when described display panel internal interface has a data channel and described video data when carrying out the 8bpc mode map, the 0th to the 7th of the X byte of described video packets is followed successively by Ri[0], Ri[1] to Ri[7], the 0th to the 7th of the X+1 byte of described video packets is followed successively by Gi[0], Gi[1] to Gi[7], the 0th to the 7th of the X+2 byte of described video packets is followed successively by Bi[0], Bi[1] to Bi[7], wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i is nonnegative integer, n=1~7.
10. method according to claim 8 is characterized in that, when described display panel internal interface has two data channels and described video data when carrying out the 8bpc mode map,
If the number of pixels in each cutting video line is an even number,
Then the 0th of the X byte of first video packets the to the 7th is followed successively by Ri[0], Ri[1] to Ri[7], the 0th to the 7th of the X+1 byte of described first video packets is followed successively by Gi[0], Gi[1] to Gi[7], the 0th to the 7th of the X+2 byte of described first video packets is followed successively by Bi[0], Bi[1] to Bi[7], wherein, described first video packets is the video packets in the packet on data channel in described two data channels
The 0th to the 7th of the X byte of second video packets is followed successively by R (i+1) [0], R (i+1) [1] is to R (i+1) [7], the 0th to the 7th of the X+1 byte of described second video packets is followed successively by G (i+1) [0], G (i+1) [1] is to G (i+1) [7], the 0th to the 7th of the X+2 byte of described second video packets is followed successively by B (i+1) [0], B (i+1) [1] is to B (i+1) [7], wherein, described second video packets is the video packets in the packet on another data channel in described two data channels
If described number of pixels is when being odd number, described first video packets when described first video packets is even number with described number of pixels is identical, and everybody of X byte, X+1 byte and the X+2 byte of described second video packets is 0,
Wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i are nonnegative integer, n=1~7.
11. method according to claim 8 is characterized in that, when described display panel internal interface has a data channel and described video data when carrying out the 6bpc mode map,
If the number of pixels in each cutting video line is 4N, then the 0th of the X byte of described video packets the to the 7th is followed successively by Gi[0], Gi[1], Ri[0], Ri[1] to Ri[5], the 0th to the 7th of the X+1 byte of described video packets is followed successively by Gi[2], Gi[3], Bi[0], Bi[1] to Bi[5], the 0th to the 7th of the X+2 byte of described video packets is followed successively by Gi[4], Gi[5], R (i+1) [0], R (i+1) [1] is to R (i+1) [5], the 0th to the 7th of the X+3 byte of described video packets is followed successively by G (i+1) [0], G (i+1) [1], B (i+1) [0], B (i+1) [1] is to B (i+1) [5], the 0th to the 7th of the X+4 byte of described video packets is followed successively by G (i+1) [2], G (i+1) [3] is to G (i+1) [5], G (i+2) [0], G (i+2) [1] is to G (i+2) [3], the 0th to the 7th of the X+5 byte of described video packets is followed successively by G (i+2) [4], G (i+2) [5], R (i+2) [0], R (i+2) [1] is to R (i+2) [5], the 0th to the 7th of the X+6 byte of described video packets is followed successively by G (i+3) [0], G (i+3) [1], B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th to the 7th of the X+7 byte of described video packets is followed successively by G (i+3) [2], G (i+3) [3], R (i+3) [0], R (i+3) [1] is to R (i+3) [5], and the 0th to the 7th of the X+8 byte of described video packets is followed successively by G (i+3) [4], G (i+3) [5], B (i+3) [0], B (i+3) [1] is to B (i+3) [5];
If described number of pixels is 4N+1, then the X byte of described video packets, X byte and the X+1 byte of described video packets was identical respectively when the X+1 byte was 4N with described number of pixels, the 0th and the 1st of the X+2 byte of described video packets is followed successively by Gi[4] and Gi[5], the 2nd to the 7th of the X+2 byte of described video packets is 0;
If described number of pixels is 4N+2, then the X byte of described video packets, the X byte, X+1 byte to the X+3 byte of described video packets was identical respectively when X+1 byte to the X+3 byte was 4N with described number of pixels, the 0th to the 3rd of the X+4 byte of described video packets is followed successively by G (i+1) [2], G (i+1) [3] to G (i+1) [5], and the 4th to the 7th of the X+4 byte of described video packets is 0;
If described number of pixels is 4N+3, then the X byte of described video packets, the X byte, X+1 byte to the X+5 byte of described video packets was identical respectively when X+1 byte to the X+5 byte was 4N with described number of pixels, the 2nd to the 7th of the X+6 byte of described video packets is followed successively by B (i+2) [0], B (i+2) [1] to B (i+2) [5], the 0th and the 1st of the X+6 byte of described video packets is 0
Wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i, N are nonnegative integer, n=1~5.
12. method according to claim 8 is characterized in that, when described display panel internal interface has two data channels and described video data when carrying out the 6bpc mode map,
If the number of pixels in each cutting video line is 8N, then
The 0th to the 7th of the X byte of first video packets is followed successively by Gi[0], Gi[1], Ri[0], Ri[1] to Ri[5], the 0th to the 7th of the X+1 byte of described first video packets is followed successively by Gi[2], Gi[3], Bi[0], Bi[1] to Bi[5], the 0th to the 7th of the X+2 byte of described first video packets is followed successively by Gi[4], Gi[5], R (i+2) [0], R (i+2) [1] is to R (i+2) [5], the 0th to the 7th of the X+3 byte of described first video packets is followed successively by G (i+2) [0], G (i+2) [1], B (i+2) [0], B (i+2) [1] is to B (i+2) [5], the 0th to the 7th of the X+4 byte of described first video packets is followed successively by G (i+2) [2], G (i+2) [3] is to G (i+2) [5], G (i+4) [0], G (i+4) [1] is to G (i+4) [3], the 0th to the 7th of the X+5 byte of described first video packets is followed successively by G (i+4) [4], G (i+4) [5], R (i+4) [0], R (i+4) [1] is to R (i+4) [5], the 0th to the 7th of the X+6 byte of described first video packets is followed successively by G (i+6) [0], G (i+6) [1], B (i+4) [0], B (i+4) [1] is to B (i+4) [5], the 0th to the 7th of the X+7 byte of described first video packets is followed successively by G (i+6) [2], G (i+6) [3], R (i+6) [0], R (i+6) [1] is to R (i+6) [5], the 0th to the 7th of the X+8 byte of described first video packets is followed successively by G (i+6) [4], G (i+6) [5], B (i+6) [0], B (i+6) [1] is to B (i+6) [5], wherein, described first video packets is the video packets in the packet on data channel in described two data channels
The 0th to the 7th of the X byte of second video packets is followed successively by G (i+1) [0], G (i+1) [1], R (i+1) [0], R (i+1) [1] is to R (i+1) [5], the 0th to the 7th of the X+1 byte of described second video packets is followed successively by G (i+1) [2], G (i+1) [3], B (i+1) [0], B (i+1) [1] is to B (i+1) [5], the 0th to the 7th of the X+2 byte of described second video packets is followed successively by G (i+1) [4], G (i+1) [5], R (i+3) [0], R (i+3) [1] is to R (i+3) [5], the 0th to the 7th of the X+3 byte of described second video packets is followed successively by G (i+3) [0], G (i+3) [1], B (i+3) [0], B (i+3) [1] is to B (i+3) [5], the 0th to the 7th of the X+4 byte of described second video packets is followed successively by G (i+3) [2], G (i+3) [3] is to G (i+3) [5], G (i+5) [0], G (i+5) [1] is to G (i+5) [3], the 0th to the 7th of the X+5 byte of described second video packets is followed successively by G (i+5) [4], G (i+5) [5], R (i+5) [0], R (i+5) [1] is to R (i+5) [5], the 0th to the 7th of the X+6 byte of described second video packets is followed successively by G (i+7) [0], G (i+7) [1], B (i+5) [0], B (i+5) [1] is to B (i+5) [5], the 0th to the 7th of the X+7 byte of described second video packets is followed successively by G (i+7) [2], G (i+7) [3], R (i+7) [0], R (i+7) [1] is to R (i+7) [5], the 0th to the 7th of the X+8 byte of described second video packets is followed successively by G (i+7) [4], G (i+7) [5], B (i+7) [0], B (i+7) [1] is to B (i+7) [5], wherein, described second video packets is the video packets in the packet on another data channel in described two data channels;
If described number of pixels is 8N+1, the X byte of then described first video packets, X byte and the X+1 byte of described first video packets was identical respectively when the X+1 byte was 8N with described number of pixels, the 0th and the 1st of the X+2 byte of described first video packets is followed successively by Gi[4] and Gi[5], the 2nd to the 7th of the X+2 byte of described first video packets is 0, and everybody of X byte, X+1 byte and the X+2 byte of described second video packets is 0;
If described number of pixels is 8N+2, described first video packets when then described first video packets is 8N+1 with described number of pixels is identical, the X byte of described second video packets, X byte and the X+1 byte of described second video packets was identical respectively when the X+1 byte was 8N with described number of pixels, the 0th and the 1st of the X+2 byte of described second video packets is followed successively by G (i+1) [4] and G (i+1) [5], and the 2nd to the 7th of the X+2 byte of described second video packets is 0;
If described number of pixels is 8N+3, the X byte of then described first video packets, the X byte of described first video packets when X+1 byte to the X+3 byte and described number of pixels are 8N, X+1 byte to the X+3 byte is identical respectively, the 0th to the 3rd of the X+4 byte of described first video packets is followed successively by G (i+2) [2] to G (i+2) [5], the 3rd to the 7th of the X+4 byte of described first video packets is 0, the X byte of described second video packets and X+1 byte were identical respectively when the X byte of described second video packets was 8N with the X+1 byte with described number of pixels, the 0th and the 1st of the X+2 byte of described second video packets is followed successively by G (i+1) [4] and G (i+1) [5], the 2nd to the 7th of the X+2 byte of described second video packets, the X+3 and the X+4 byte of described second video packets are 0;
If described number of pixels is 8N+4, described first video packets when then described first video packets is 8N+3 with described number of pixels is identical, the X byte of described second video packets, the X byte, X+1 byte to the X+3 byte of described second video packets was identical respectively when X+1 byte to the X+3 byte was 8N with described number of pixels, the 0th to the 3rd of the X+4 byte of described second video packets is followed successively by G (i+3) [2] to G (i+3) [5], and the 3rd to the 7th of the X+4 byte of described second video packets is 0;
If described number of pixels is 8N+5, the X byte of then described first video packets, the X byte of described first video packets when X+1 byte to the X+5 byte and described number of pixels are 8N, X+1 byte to the X+5 byte is identical respectively, the 0th and the 1st of the X+6 byte of described first video packets is 0, the 2nd to the 7th of the X+6 byte of described first video packets is followed successively by B (i+4) [0] to B (i+4) [5], the X byte of described second video packets, the X byte of described second video packets when X+1 byte to the X+3 byte and described number of pixels are 8N, X+1 byte to the X+3 byte is identical respectively, the 0th to the 3rd of the X+4 byte of described second video packets is followed successively by G (i+3) [2] to G (i+3) [5], the 3rd to the 7th of the X+4 byte of described second video packets, the X+5 byte and the X+6 byte of described second video packets are 0;
If described number of pixels is 8N+6, described first video packets when then described first video packets is 8N+5 with described number of pixels is identical, the X byte of described second video packets, the X byte, X+1 byte to the X+5 byte of described second video packets was identical respectively when X+1 byte to the X+5 byte was 8N with described number of pixels, the 0th and the 1st of the X+6 byte of described second video packets is 0, and the 2nd to the 7th of the X+6 byte of described second video packets is followed successively by B (i+5) [0] to B (i+5) [5];
If described number of pixels is 8N+7, described first video packets when then described first video packets is 8N with described number of pixels is identical, the X byte of described second video packets, the X byte of described second video packets when X+1 byte to the X+5 byte and described number of pixels are 8N, X+1 byte to the X+5 byte is identical respectively, the 2nd to the 7th of the X+6 byte of described second video packets is followed successively by B (i+5) [0], B (i+5) [1] is to B (i+5) [5], the 0th and the 1st of the X+6 byte of described second video packets, the X+7 byte and the X+8 byte of described second video packets are 0
Wherein, Ri[n] be the quantized value of red component in the single pixel, Gi[n] be the quantized value of green component in the single pixel, Bi[n] be the quantized value of single pixel Smalt component, X, i, N are nonnegative integer, n=1~5.
13. the data transmission device of a display panel internal interface is characterized in that, comprising:
Mapping block is used for packet on the data channel that video data with the TCON side is mapped as described display panel internal interface;
Coding module is used for described packet is encoded;
Sending module is used for via described data channel, adopts the packet after fixed rate sends coding;
Receiver module is used to receive described transport module data packets for transmission, and obtains clock information according to the described fixed rate of described packet correspondence;
Decoder module is used for according to described clock information described packet being decoded; And
Transport module is used for decoded data packet transmission to SD.
14. device according to claim 13 is characterized in that, described device also comprises:
Scrambling module is used for before described coding module is encoded to described packet described packet being carried out scrambling, and wherein, described coding module also is used for the packet after the scrambling is encoded,
Descrambling module is used for after described decoder module is decoded to described packet described packet being carried out descrambling, and wherein, described transport module also is used for the data packet transmission behind the descrambling to described SD.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105139812A (en) * 2014-05-27 2015-12-09 奇景光电股份有限公司 Data transmitting and receiving method and data transmission system
CN108696288A (en) * 2017-06-09 2018-10-23 京东方科技集团股份有限公司 Method for transmitting signals, transmission unit, receiving unit and display device
WO2018223915A1 (en) * 2017-06-09 2018-12-13 京东方科技集团股份有限公司 Data transmission method, data transmission circuit, display apparatus and storage medium
WO2022095104A1 (en) * 2020-11-05 2022-05-12 Tcl华星光电技术有限公司 Display panel and driving method
TWI782652B (en) * 2021-08-04 2022-11-01 新唐科技股份有限公司 Format setting system and addressable light-emitting device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004177743A (en) * 2002-11-28 2004-06-24 Toshiba Corp Image display device
CN1892747A (en) * 2005-07-08 2007-01-10 株式会社东芝 Image data processing apparatus and image data processing method
CN101669365A (en) * 2007-11-30 2010-03-10 哉英电子股份有限公司 Video signal transmission device, video signal reception device, and video signal transmission system
KR20100073739A (en) * 2008-12-23 2010-07-01 엘지디스플레이 주식회사 Liquid crystal display
CN102523414A (en) * 2011-12-30 2012-06-27 曙光信息产业股份有限公司 Encoding and decoding method based on LVDS (low-voltage differential signaling) interface and device utilizing method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004177743A (en) * 2002-11-28 2004-06-24 Toshiba Corp Image display device
CN1892747A (en) * 2005-07-08 2007-01-10 株式会社东芝 Image data processing apparatus and image data processing method
CN101669365A (en) * 2007-11-30 2010-03-10 哉英电子股份有限公司 Video signal transmission device, video signal reception device, and video signal transmission system
KR20100073739A (en) * 2008-12-23 2010-07-01 엘지디스플레이 주식회사 Liquid crystal display
CN102523414A (en) * 2011-12-30 2012-06-27 曙光信息产业股份有限公司 Encoding and decoding method based on LVDS (low-voltage differential signaling) interface and device utilizing method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105139812A (en) * 2014-05-27 2015-12-09 奇景光电股份有限公司 Data transmitting and receiving method and data transmission system
CN105139812B (en) * 2014-05-27 2018-01-30 奇景光电股份有限公司 Data transmit and method of reseptance and data transmission system
CN108696288A (en) * 2017-06-09 2018-10-23 京东方科技集团股份有限公司 Method for transmitting signals, transmission unit, receiving unit and display device
WO2018223915A1 (en) * 2017-06-09 2018-12-13 京东方科技集团股份有限公司 Data transmission method, data transmission circuit, display apparatus and storage medium
US11107433B2 (en) 2017-06-09 2021-08-31 Beijing Boe Display Technology Co., Ltd. Data transmission method, data transmission circuit, display device and storage medium
WO2022095104A1 (en) * 2020-11-05 2022-05-12 Tcl华星光电技术有限公司 Display panel and driving method
US11705053B2 (en) 2020-11-05 2023-07-18 Tcl China Star Optoelectronics Technology Co., Ltd. Display panel and driving method thereof
TWI782652B (en) * 2021-08-04 2022-11-01 新唐科技股份有限公司 Format setting system and addressable light-emitting device

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