CN103098157B - The manufacture method of laminated semiconductor ceramic capacitor and laminated semiconductor ceramic capacitor - Google Patents
The manufacture method of laminated semiconductor ceramic capacitor and laminated semiconductor ceramic capacitor Download PDFInfo
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- CN103098157B CN103098157B CN201180041685.9A CN201180041685A CN103098157B CN 103098157 B CN103098157 B CN 103098157B CN 201180041685 A CN201180041685 A CN 201180041685A CN 103098157 B CN103098157 B CN 103098157B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 78
- 238000000034 method Methods 0.000 title claims abstract description 71
- 239000003985 ceramic capacitor Substances 0.000 title claims abstract description 60
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 40
- 238000001354 calcination Methods 0.000 claims abstract description 38
- 239000000843 powder Substances 0.000 claims abstract description 37
- 230000008569 process Effects 0.000 claims abstract description 36
- 150000001875 compounds Chemical class 0.000 claims abstract description 30
- 239000000919 ceramic Substances 0.000 claims abstract description 29
- 238000012545 processing Methods 0.000 claims abstract description 20
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 10
- 238000000227 grinding Methods 0.000 claims abstract description 5
- 238000002844 melting Methods 0.000 claims description 8
- 230000008018 melting Effects 0.000 claims description 8
- 238000002156 mixing Methods 0.000 claims description 6
- 239000013078 crystal Substances 0.000 abstract description 46
- 230000002745 absorbent Effects 0.000 abstract description 11
- 239000002250 absorbent Substances 0.000 abstract description 11
- 229910002367 SrTiO Inorganic materials 0.000 abstract description 8
- 239000003990 capacitor Substances 0.000 description 24
- 230000004888 barrier function Effects 0.000 description 18
- 239000002245 particle Substances 0.000 description 12
- 238000005259 measurement Methods 0.000 description 9
- 239000002002 slurry Substances 0.000 description 8
- 239000006104 solid solution Substances 0.000 description 8
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 6
- 229910002077 partially stabilized zirconia Inorganic materials 0.000 description 5
- 230000009466 transformation Effects 0.000 description 5
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical group [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 238000005524 ceramic coating Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000006731 degradation reaction Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000002270 dispersing agent Substances 0.000 description 4
- 238000001035 drying Methods 0.000 description 4
- 238000001704 evaporation Methods 0.000 description 4
- 230000008020 evaporation Effects 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 229910052772 Samarium Inorganic materials 0.000 description 2
- 229910010413 TiO 2 Inorganic materials 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000005324 grain boundary diffusion Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910052746 lanthanum Inorganic materials 0.000 description 2
- 229910052748 manganese Inorganic materials 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000010422 painting Methods 0.000 description 2
- XNGIFLGASWRNHJ-UHFFFAOYSA-N phthalic acid Chemical compound OC(=O)C1=CC=CC=C1C(O)=O XNGIFLGASWRNHJ-UHFFFAOYSA-N 0.000 description 2
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 2
- 238000007493 shaping process Methods 0.000 description 2
- 238000010345 tape casting Methods 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- 238000005303 weighing Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052779 Neodymium Inorganic materials 0.000 description 1
- 229910018054 Ni-Cu Inorganic materials 0.000 description 1
- 229910018487 Ni—Cr Inorganic materials 0.000 description 1
- 229910018481 Ni—Cu Inorganic materials 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- -1 acids ammonium salt Chemical class 0.000 description 1
- 230000004523 agglutinating effect Effects 0.000 description 1
- 229910052783 alkali metal Inorganic materials 0.000 description 1
- 150000001340 alkali metals Chemical class 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000000975 co-precipitation Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000013530 defoamer Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- 238000001027 hydrothermal synthesis Methods 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 239000003607 modifier Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 229910052700 potassium Inorganic materials 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 238000005204 segregation Methods 0.000 description 1
- 229910052708 sodium Inorganic materials 0.000 description 1
- 238000010532 solid phase synthesis reaction Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- 238000010023 transfer printing Methods 0.000 description 1
- 150000003657 tungsten Chemical class 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
- H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
- H01G4/1218—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates
- H01G4/1227—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates based on alkaline earth titanates
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- C01G—COMPOUNDS CONTAINING METALS NOT COVERED BY SUBCLASSES C01D OR C01F
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- C01G23/003—Titanates
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- C01G23/006—Alkaline earth titanates
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- C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
- C04B35/01—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
- C04B35/46—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on titanium oxides or titanates
- C04B35/462—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on titanium oxides or titanates based on titanates
- C04B35/465—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on titanium oxides or titanates based on titanates based on alkaline earth metal titanates
- C04B35/47—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on titanium oxides or titanates based on titanates based on alkaline earth metal titanates based on strontium titanates
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- C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
- C04B35/622—Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
- C04B35/626—Preparing or treating the powders individually or as batches ; preparing or treating macroscopic reinforcing agents for ceramic products, e.g. fibres; mechanical aspects section B
- C04B35/63—Preparing or treating the powders individually or as batches ; preparing or treating macroscopic reinforcing agents for ceramic products, e.g. fibres; mechanical aspects section B using additives specially adapted for forming the products, e.g.. binder binders
- C04B35/638—Removal thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
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- C04B2235/60—Aspects relating to the preparation, properties or mechanical treatment of green bodies or pre-forms
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Abstract
SrTiO
3be that the manufacture method of the laminated semiconductor ceramic capacitor of crystal boundary insulated type has: preburning powder production process, weigh after the Sr compound of ormal weight, Ti compound and donor compound carry out co-grinding, carry out preheating to make preburning powder; Heat treated powder production process, mixes acceptor's compound with preburning powder, heat-treats to make heat treated powder; Duplexer formation process, implements processing and forming to described heat treated powder and makes ceramic green sheet, after this by interior electrode layer and ceramic green sheet is alternately stacked forms duplexer; And calcination process, under reducing atmosphere, a calcination processing is carried out to described duplexer, under air atmosphere, has carried out secondary clacining process thereafter, wherein, under the temperature atmosphere of 450 DEG C ~ 580 DEG C, carried out described secondary clacining process.Thus, even if electrostatic capacitance is the low electric capacity of about 1nF, the SrTiO that the absorbent properties of ESD are good can also be realized
3it is the laminated semiconductor ceramic capacitor of crystal boundary insulated type.
Description
Technical field
The present invention relates to manufacture method and the stacked semiconductor pottery of laminated semiconductor ceramic capacitor, in more detail, relate to and use SrTiO
3be the manufacture method of the laminated semiconductor ceramic capacitor of crystal boundary insulated type and the laminated semiconductor ceramic capacitor that uses this manufacture method and made.
Background technology
Along with the development of electronic device technology in recent years, mobile phone, notebook computer etc. portable electronic device and be mounted in automobile etc. vehicle-mounted electronic device universal while, require the miniaturization of electronic equipment, multifunction.
On the other hand, in order to realize miniaturization, the multifunction of electronic equipment, use the semiconductor element of various IC, LSI etc. in large quantities, and the anti-noise endurance of the electronic equipment that accompanies therewith reduces.
Therefore, from the past, to power line configuration film capacitor, laminated ceramic capacitor and the laminated semiconductor ceramic capacitor etc. of semiconductor element, as by-pass capacitor, thus, the anti-noise endurance of electronic equipment can be guaranteed.
Especially, in auto navigation and vehicle sound, vehicle-mounted ECU etc., connect at outside connecting terminals the capacitor that electrostatic capacitance is about 1nF, thus, can absorbing high-frequency noise widely.
But these capacitor shows the performance outstanding to the absorption of high-frequency noise, but capacitor self does not have the function absorbing high voltage pulse and electrostatic.
Therefore, when such high voltage pulse or electrostatic invade in electronic equipment, likely cause the misoperation of electronic equipment or the damage of semiconductor element.Particularly, when electrostatic capacitance is the low capacity of about 1nF, likely cause the withstand voltage damage becoming extremely low (such as, about 2kV ~ 4kV), capacitor itself of ESD (ElectroStaticDischarge: static discharge).
Therefore, in the past, following situation is widely used: as shown in Figure 3, while configuring by-pass capacitor 104, is such as connected Zener diode 105 in parallel with this by-pass capacitor 104 to the power line 103 be connected with semiconductor element 102 by outside terminal 101.While Zener diode 105 undertakes protection by-pass capacitor 104, the effect of protection semiconductor element 102, while guaranteeing that ESD is withstand voltage thus, also protects semiconductor element 102.
But as mentioned above, when being provided with Zener diode 105 in parallel to by-pass capacitor 104, not only the increase of parts number of packages causes cost high, and must guarantee installation space, and existence can cause larger-scale unit.
On the other hand, SrTiO
3being that the laminated semiconductor ceramic capacitor of crystal boundary insulated type is known has resistance-variable characteristic, because the current flowing large when applying the voltage of more than constant voltage, so receive publicity as ESD countermeasure product.
Therefore, this laminated semiconductor ceramic capacitor, not only has the patience for ESD; if the protection to semiconductor element 102 also can be undertaken; then alternative former capacitor and Zener diode, as shown in Figure 4, only supplied by 1 laminated semiconductor ceramic capacitor 106.And thus, while the reduction and cost degradation of parts number of packages, the standardization of design also becomes easy, can provide the capacitor with surcharge.
And, in patent documentation 1, the manufacture method comprising the laminated semiconductor ceramic capacitor of the subsidiary resistance-variable function of following steps is proposed, that is: preburning powder production process, the mode becoming the scope of 1.000 < m≤1.020 with the mixing mol ratio m of Sr position and Ti position weighs the ceramic origin raw material containing donor compound, after co-grinding, carry out preheating to make preburning powder; Heat treated powder production process, weigh acceptor's compound to make relative Ti element 100 moles, acceptor's compound is less than 0.5 mole (but not comprising 0 mole), is mixed by this acceptor's compound, heat-treat making heat treated powder with described preburning powder; Duplexer formation process, implements processing and forming to described heat treated powder and makes ceramic green sheet, after this by interior electrode layer and ceramic green sheet alternately stacked formation duplexer; And calcination process, under reducing atmosphere, after a calcination processing has been carried out to described duplexer, under weakly reducing atmosphere, under air atmosphere or under oxidizing atmosphere, carry out secondary clacining process.
In this patent documentation 1, with the calcining heat lower than calcined temperature (1300 ~ 1450 DEG C) (such as, 1100 ~ 1300 DEG C) carry out a calcination processing, and with the secondary clacining process that after this calcining heat of 600 ~ 900 DEG C carries out, thus obtain insulating properties and ESD is withstand voltage good and can the SrTiO of thin layer miniaturization
3it is the laminated semiconductor ceramic capacitor of the subsidiary resistance-variable function of crystal boundary insulated type.
Prior art document
Patent documentation
Patent documentation 1: No. 2008/004389, International Publication (claim 8, paragraph number (0072) ~ (0082))
Summary of the invention
The technical problem that invention will solve
But, the laminated semiconductor ceramic capacitor of the subsidiary resistance-variable function of patent documentation 1, although ESD withstand voltage be more than 30kV, there is absorbent properties also insufficient such problem to ESD.
The present invention completes in view of such situation, provides static capacity to be the SrTiO that the low electric capacity of about 1nF also can obtain the good laminated semiconductor ceramic capacitor of the absorbent properties of ESD even if its objective is
3be the manufacture method of the laminated semiconductor ceramic capacitor of crystal boundary insulated type and the laminated semiconductor ceramic capacitor that uses this manufacture method and obtain.
In order to solve the means of problem
Present inventor is to achieve these goals to SrTiO
3be that the laminated semiconductor ceramic capacitor of crystal boundary insulated type has carried out studying with keen determination, obtain following opinion: the secondary clacining (reoxidizing process) after the calcining once that the low temperature of 450 ~ 580 DEG C carry out at calcination process, thus can crest voltage be suppressed, can obtain thus for the good laminated semiconductor ceramic capacitor of the absorbent properties of ESD.
The present invention completes based on these opinion, the manufacture method of the laminated semiconductor ceramic capacitor that the present invention relates to has: preburning powder production process, weigh ormal weight Sr compound, Ti compound and donor compound, after co-grinding, carry out preheating to make preburning powder; Heat treated powder production process, mixes acceptor's compound with described preburning powder, heat-treats to make heat treated powder; Duplexer formation process, implements shaping processing and fabricating ceramic green sheet to described heat treated powder, after this by interior electrode layer and ceramic green sheet is alternately stacked forms duplexer; And calcination process, under reducing atmosphere, after a calcination processing has been carried out to described duplexer, secondary clacining process is carried out under air atmosphere, the feature of the manufacture method of described laminated semiconductor ceramic capacitor is, carries out described secondary clacining process under the temperature atmosphere of 450 DEG C ~ 580 DEG C.
In addition, in the manufacture method of laminated semiconductor ceramic capacitor of the present invention, preferably high than the calcining heat of a described calcination processing at the calcined temperature of described preheating.
In addition, in the manufacture method of laminated semiconductor ceramic capacitor of the present invention, in described preburning powder production process, preferred following situation: weigh described Sr compound and Ti compound with the scope making the mixing mol ratio m of Sr position and Ti position become 0.990≤m≤1.010.
In addition, in the manufacture method of laminated semiconductor ceramic capacitor of the present invention, in described heat treated powder production process, preferably with relative Ti element 100 moles, acceptor's compound is that the mode of less than 0.5 mole (but not comprising 0 mole) weighs acceptor's compound.
In addition, in the manufacture method of laminated semiconductor ceramic capacitor of the present invention, preferably to add low melting point oxide in the scope of relative Ti element 100 moles below 0.1 mole.
In addition, the laminated semiconductor ceramic capacitor that the present invention relates to is characterized by and uses above-mentioned manufacture method to make.
The effect of invention
According to the manufacture method of laminated semiconductor ceramic capacitor of the present invention, because carry out secondary clacining process under the temperature atmosphere of 450 DEG C ~ 580 DEG C, so, carry out reoxidizing process with low temperature, crest voltage can be suppressed thus, even if the low electric capacity of electrostatic capacitance turns to about 1nF, also can obtain for the good laminated semiconductor ceramic capacitor of the absorbent properties of ESD.
In addition, according to laminated semiconductor ceramic capacitor of the present invention, use above-mentioned manufacture method and being produced because it, even if even if so the low electric capacity of electrostatic capacitance turn to about 1nF also can obtain for ESD absorbent properties well with and used capacitor to compare ESD patience also in no way inferior with the situation of Zener diode.Therefore, the function of capacitor and Zener diode can be born with 1 element, and the reduction of energy achievement unit pieces number and cost degradation, and then the standardization of design also becomes easily, can realize the laminated semiconductor ceramic capacitor that added value is high.
Accompanying drawing explanation
Fig. 1 is the profile of an execution mode of the laminated semiconductor ceramic capacitor schematically shown made by manufacture method of the present invention.
Fig. 2 is the electrical circuit diagram of the voltage waveform measurement mechanism of the ESD employed in embodiment.
Fig. 3 is electrical circuit diagram when being connected in parallel Zener diode on the by-pass capacitor that power line configures.
Fig. 4 is the electrical circuit diagram when power line is connected to laminated semiconductor ceramic capacitor.
Embodiment
Secondly, embodiments of the present invention are described in detail.
Fig. 1 is the profile of the execution mode that the laminated semiconductor ceramic capacitor that the present invention relates to schematically is shown.
This laminated semiconductor ceramic capacitor has hardware body 1 and is formed in outer electrode 3a, the 3b at both ends of this hardware body 1.
Hardware body 1 is by by alternately laminated for multiple semiconductor ceramic coating 1a ~ 1g and multiple interior electrode layer 2a ~ 2g and carry out calcining the stacked sintered body obtained and form, interior electrode layer 2a, 2c, 2e are while the end face of a side of hardware body 1 exposes, be electrically connected with the outer electrode 3a of a side, interior electrode layer 2b, 2d, 2f, while the end face of the opposing party of hardware body 1 exposes, are electrically connected with the outer electrode 3b of the opposing party.
The principal component of above-mentioned semiconductor ceramic coating 1a ~ 1g is by SrTiO
3based material is formed, and donor element is in crystal particles while solid solution, and recipient element exists in grain boundary layer, and crystal particles forms electrostatic capacitance by grain boundary layer each other.And these semiconductor ceramic coatings 1a ~ 1g series connection or be connected in parallel between the opposite face of interior electrode layer 2a, 2c, 2e and interior electrode layer 2b, 2d, 2f, thus the electric capacity of wishing can be obtained as a whole.
Further, above-mentioned laminated semiconductor ceramic capacitor, as aftermentioned, carry out the secondary clacining after the once calcining of calcination process, thus, can make the tremendous lifting of the absorbent properties of ESD under the lower-temperature atmosphere of 450 ~ 580 DEG C.
That is, in the laminated semiconductor ceramic capacitor of crystal boundary insulated type, calcination process is divided into 2 stages of a calcination processing and secondary clacining process to carry out usually.One time calcination processing is carried out under reducing atmosphere, and thus, pottery is by semiconductor transformation.Then, secondary clacining process is carried out under air atmosphere, is reoxidized by the pottery of semiconductor transformation.That is, in this secondary clacining process, oxygen forms insulating barrier (crystal boundary insulating barrier) to crystal grain boundary diffusion at crystal grain boundary, forms Schottky barrier at crystal grain boundary.
, by carrying out this secondary clacining process under lower-temperature atmosphere, at the schottky barrier height step-down that crystal grain boundary is formed, its result can make varistor voltage decline.When such varistor voltage declines, because the resistance of laminated semiconductor ceramic capacitor during electric discharge declines, crest voltage (utilizing this laminated semiconductor ceramic capacitor to the maximum voltage applied after voltage suppresses) can be suppressed, thus, the absorbent properties of ESD can be made to improve tremendously.
And because need to be less than 580 DEG C in calcining heat to carry out secondary clacining process.On the other hand, when the calcining heat of secondary clacining process is reduced to discontented 450 DEG C, the oxidation of crystal grain boundary can not be carried out fully, there is the crystal boundary insulating barrier forming expectation and become difficult and possibility that is that cause electrostatic capacitance excessively to increase.
Therefore, the calcining heat of secondary clacining process needs the scope being set in 450 ~ 580 DEG C.
Further, by being set as that the calcining heat of 450 ~ 580 DEG C carries out such secondary clacining process, the absorbent properties of produced laminated semiconductor ceramic capacitor for ESD can be improved tremendously.Thus, though with and used capacitor to compare with the situation of Zener diode, also can improve ESD tolerance in no way inferiorly.That is, good ESD tolerance can be obtained with 1 element at laminated semiconductor ceramic capacitor, and capacitor for voltage protection is vitiable from merit while, also can protect connected semiconductor element.
And then, because like this, laminated semiconductor ceramic capacitor can undertake the function of capacitor and Zener diode with 1 element, can the reduction of achievement unit pieces number and cost degradation, and then the standardization of design also becomes easy, can realize the laminated semiconductor ceramic capacitor that added value is high.
In addition, in the present embodiment, the mixing mol ratio m of Sr position and Ti position, is preferably prepared in the mode that 0.990≤m≤1.010 are such.
That is, by make Sr superfluous than stoichiometric composition contain, the Sr grain growth of not separated out at crystal grain boundary in crystal particles solid solution can be suppressed, the crystal particles of particulate can be obtained thus.And by the micronize of crystal particles, become at crystal grain boundary oxygen and easily deliver to, promote the formation of Schottky barrier, good insulation resistance can be guaranteed.
But when mixing mol ratio m more than 1.010, will do not increased by the precipitation to crystal grain boundary of the Sr of crystal particles solid solution, the thickness that there is crystal boundary insulating barrier is exceedingly thickening and the possibility that causes electrostatic capacitance exceedingly to decline.
On the other hand, when making that Ti is superfluous than Chemical Measurement composition to be contained, crystal particles slightly becomes coarsening, although insulation resistance becomes the tendency that declines, but can guarantee between goods, also do not produce deviation and the insulation resistance that sufficient durability can be guaranteed, and it is withstand voltage to maintain ESD well.
But, mix mol ratio m discontented 0.990 time, the average diameter exceedingly coarsening of crystal particles, insulating properties declines significantly, and ESD is withstand voltage also reduces.
Therefore, the mode preferably becoming 0.990≤m≤1.010 such to mix mol ratio m is prepared.
Making ceramic semiconductors to carry out calcination processing in reducing atmosphere, in crystal particles, making donor element solid solution, but its content is not specially limited.But, donor element is discontented with 0.2 mole when relative Ti element 100 moles, there is the possibility causing electrostatic capacitance excessive descent.On the other hand, donor element is more than 1.2 moles when relative Ti element 100 moles, there is the possibility of the allowable temperature narrowed width of calcining heat.
Therefore, relative Ti element 100 moles and donor element be 0.2 ~ 1.2 mole containing mole, preferably 0.4 ~ 1.0 mole.
Further, as such donor element, be not specially limited, such as, can La, Nd, Sm, Dy, Nb and Ta etc. be used.
In addition, make to there is recipient element as described above in crystal boundary insulating barrier, thus crystal boundary insulating barrier forms the energy level (crystal boundary energy level) that electrical resistance ground activates, promote the formation of Schottky barrier, the laminated semiconductor ceramic capacitor that insulation resistance improves, has good insulating properties can be obtained thus.But, relative Ti element 100 moles recipient element containing mole more than 0.5 mole time, causing the resistance to drops of ESD, is not preferable case.
Therefore, relative Ti element 100 moles of preferred recipient elements is less than 0.5 mole (but not comprising 0 mole) containing mole.
Further, as such recipient element, be not defined especially, can Mn, Co, Ni, Cr etc. be used, especially preferably use Mn.
In addition, in above-mentioned semiconductive ceramic 1, relative Ti element 100 moles preferably adds the low melting point oxide of the scope of less than 0.1 mole, by adding such low melting point oxide, can promote the segregation to crystal grain boundary of above-mentioned recipient element while improving agglutinating property.
In addition, why the mole that contains of low melting point oxide is set to above-mentioned scope, is because relative Ti element 100 moles, when should contain mole more than 0.1 mole, electrostatic capacitance excessive descent will be caused, and there is the possibility of the electrical characteristic that can not obtain expectation.
In addition, as low melting point oxide, be not particularly limited, can use containing SiO
2, B or alkali metal (K, Li, Na etc.) glass ceramics, copper one tungsten salt etc., but preferably use SiO
2.
Then, an execution mode of the manufacture method of above-mentioned laminated semiconductor ceramic capacitor is described.
First, as ceramic origin raw material, prepare respectively and weigh the SrCO of ormal weight
3deng Sr compound, the donor compound of donor element containing La, Sm etc. and such as specific area 10m
2the TiO of/more than g (average grain diameter: about below 0.1um)
2deng the Ti compound of particulate.
Then, ormal weight is added (such as in this weighing thing, 1 ~ 3 weight portion) dispersant, drop into ball mill together with the abrasive media of PSZ (PartiallyStabiLizedZirconia: local stability zirconia) ball etc. and pure water, in this ball mill, abundant wet mixed makes slurry.
Then, after making this slurry evaporation drying, under air atmosphere, with set point of temperature (such as, 1250 DEG C ~ 1400 DEG C), implement 2 hours preheatings, make the preburning powder of donor element solid solution.
Then, further with relative Ti element 100 moles, the recipient element of Mn or Co etc. be less than 0.5 mole containing mole mode weighs acceptor's compound, as required, the SiO with relative Ti element 100 moles
2the mode becoming 0 ~ 0.1 mole containing mole Deng low melting point oxide weighs.Then, described preburning powder and pure water added to these acceptor's compounds and low melting point oxide and adds dispersant as required, again dropping into ball mill together with described abrasive media, abundant wet mixed in this ball mill.And after this, make it evaporation drying, under air atmosphere, with set point of temperature (such as, 500 ~ 700 DEG C), carry out 5 hours heat treatments, make heat treated powder.
Secondly, add organic solvent or organic binder bond, defoamer, the surface modifier etc. of toluene, ethanol etc. at this heat treated powder aptly, fully carry out wet mixed, obtain ceramic slurry thus.
Secondly, use the shaping operation method of scraping blade method, knife coating, mould Tu Fa etc. to implement processing and forming to ceramic slurry, the mode becoming specific thickness (such as, about 3 ~ 4um) with the thickness after calcining makes ceramic green sheet (greensheet).
Then, use internal electrode, on ceramic green sheet, implements to employ the transfer printing etc. of screen painting method, woodburytype or Vacuum Coating method, sputtering method etc. with conductive paste, at the conducting film of described ceramic green sheet surface formation predetermined pattern.
In addition, as the conductive material contained by internal electrode conductive paste, do not limit especially, but preferably use the basic material with the good conductivity of Ni or Cu etc.
Then, by form conducting film ceramic green sheet in the prescribed direction stacked multiple, and stacked be not formed with the ceramic green sheet of the skin of conducting film after, crimp, and be cut to given size to make duplexer.
And afterwards, afterwards under air atmosphere, carry out the de-adhesive treatment of 2 hours with the temperature of 300 ~ 500 DEG C.Then, H is used
2gas and N
2gas is according to flow-rate ratio (such as, the H becoming regulation
2/ N
2=0.025/100 ~ 1/100) mode is set to the calciner of reducing atmosphere, in this calciner, carries out the once calcining of 2 hours, by duplexer semiconductor transformation with the temperature of 1200 ~ 1250 DEG C.
By making like this to be set to than calcining heat (1200 ~ 1250 DEG C) height a calcination processing at the calcined temperature (1250 ~ 1400 DEG C) of preheating, in a calcination processing, promote that the grain of crystal particles grows hardly, crystal particles coarsening can be suppressed.
Further, after like this semiconductor transformation being carried out to duplexer, under air atmosphere, the secondary clacining of 1 hours is carried out with the low temperature of 450 ~ 580 DEG C, implement to reoxidize process to semiconductive ceramic, thus, the hardware body 1 be made up of the stacked sintered body having buried internal electrode 2 underground can be made.Process is reoxidized by this, oxygen is dispersed to crystal grain boundary, and form crystal boundary insulating barrier, but in order to carry out reoxidizing process at the low temperature of 450 ~ 580 DEG C, the lower thickness of crystal boundary insulating barrier can be made, therefore, it is possible to make schottky barrier height also step-down, varistor voltage is made to reduce and then crest voltage is reduced.
Then, hardware body 1 both ends coating outer electrode conductive paste, carries out roasting (bake) process, forms outer electrode 3a, 3b, can make thus and obtain laminated semiconductor ceramic capacitor.
In addition, as the formation method of outer electrode 3a, 3b, also can by formation such as printing, vacuum evaporation or sputterings.In addition, after the duplexer both ends of not calcining are coated with outer electrode conductive paste, also can implement calcination processing with duplexer simultaneously.
For the conductive material of outer electrode contained by conductivity paste, do not limit especially, but preferably use the material of Ga, In, Ni, Cu etc., and then Ag electrode can be formed on these electrodes.
Like this, in the present embodiment, by the calcining heat at secondary clacining is carried out with the low temperature of 450 ~ 580 DEG C, thus the lower thickness of the crystal boundary insulating barrier formed to crystal grain boundary diffusion, therefore can make schottky barrier height also step-down, the varistor voltage decline formed at crystal grain boundary.Further, like this, when varistor voltage reduces, the resistance of the laminated semiconductor ceramic capacitor when discharging reduces, and its result, can suppress crest voltage, and the absorbent properties of ESD can be made thus to improve by leaps and bounds.Even if that is, with and used capacitor to compare with the situation of Zener diode also can be in no way inferior ESD tolerance is improved, laminated semiconductor ceramic capacitor can guarantee good ESD tolerance with 1 element.
Specifically, even if the low electric capacity of electrostatic capacitance turns to about 1nF, the ESD with more than 30kv is withstand voltage, and varistor voltage becomes below 75V, and crest voltage becomes below 85V, can obtain the laminated semiconductor ceramic capacitor that the absorption characteristic of ESD is superior.
In addition, due to like this, laminated semiconductor ceramic capacitor can undertake the function of capacitor and Zener diode with 1 element, so can the reduction of achievement unit pieces number or cost degradation, and then the standardization of design also becomes easily, can realize the high laminated semiconductor ceramic capacitor of added value.
In addition, the invention is not restricted to above-mentioned execution mode.Such as, in the above-described embodiment, make solid solution with solid phase method, but the manufacture method of solid solution does not limit especially, such as, can use the arbitrary method such as hydrothermal synthesis method, sol-gal process, hydrolyzable method, coprecipitation.
Secondly, embodiments of the invention are specifically described.
Embodiment
(making of sample)
As ceramic origin raw material, prepare SrCO
3, preparation specific area is 30m
2/ g (average grain diameter: about 30nm) TiO
2, and as the LaCl of donor compound
3.Further, the mode that the content of La is 0.8 mole with relative Ti element 100 moles weighs LaCl
3, and then weigh SrCO in the mode that the mixing mol ratio m (=Sr position/Ti position) of Sr position and Ti position becomes 1.008
3and TiO
2.
Then, relative to these weighing thing 100 weight portion, with the addition of the polycarboxylic acids ammonium salt in 3 weight portions as dispersant after, as abrasive media, the PSZ ball of diameter 2mm and pure water are dropped into ball mill together, in this ball mill, carry out 16 hours wet mixed made slurry.
Then, after making this slurry evaporation drying, under air atmosphere, implement 2 hours preheatings with the temperature of 1400 DEG C, to obtain in crystalline particle the solid solution preburning powder of donor element.
Then, the content using relative Ti element 100 moles as the Mn element of recipient element is that the mode of 0.3 mole is by MnCl
2solution adds described preburning powder to, and then, with SiO
2the mode becoming 0.1 mole containing mole relative to Ti element 100 moles adds tetraethoxysilane (Si (OC
2h
5)
4), then, again the PSZ ball of diameter 2mm and pure water are dropped into ball mill together, in this ball mill, carry out 16 hours wet mixed.In addition, in the present embodiment, in preburning powder, MnCl is added
2solution, but also can add Mn sol solution.
Further, after this make it evaporation drying, under air atmosphere, carry out heat treatment in 5 hours at 600 DEG C, obtain heat treated powder.
Then, described heat treated powder is added in right amount to organic solvent and the dispersant of toluene, ethanol etc., and input ball mill together with the PSZ ball of diameter 2mm again, wet mixed 16 hours in this ball mill.And afterwards, attach the polyvinyl butyral resin (PVB) as organic binder bond and the o-phthalic acid dibutyl ester (DOP) as plasticiser in right amount, carry out 24 hours mixed processing with wet type, made ceramic slurry thus.
Secondly, use knife coating to implement processing and forming to this ceramic slurry, make the ceramic green sheet that thickness is about 3.2um.Then, use and Ni is implemented screen painting as the internal electrode conductive paste of main component on ceramic green sheet, define the conducting film of compulsory figure on described ceramic green sheet surface.
Then, to the ceramic green sheet of conducting film be defined after stacked 10 of prescribed direction, giving the ceramic green sheet of the skin not forming conducting film up and down, the mode after this becoming about 0.6mm with thickness carries out hot press, obtains ceramic green sheet and the alternately laminated block of internal electrode.
Further, after this, block is cut to given size as duplexer, by this duplexer in air atmosphere, has carried out 2 hours de-adhesive treatment with temperature 400 DEG C.Then, to be modulated to H
2: N
2under the reducing atmosphere of the flow-rate ratio of=1: 100, with the temperature of 1250 DEG C, duplexer is implemented to the once calcining of 2 hours, make this duplexer semiconductor transformation.
Then, under air atmosphere, carry out 1 hour secondary clacining with the temperature of 400 ~ 800 DEG C and implement to reoxidize process, make oxygen form crystal boundary insulating barrier dispersedly at crystal boundary thus, after this, grinding is carried out to make hardware body to end face.
Then, sputtering is implemented to the both ends of the surface of this hardware body, forms the outer electrode of the three-layer structure be made up of Ni-Cr layer, Ni-Cu layer, Ag layer.Then, implement metallide, form Ni overlay film and Sn overlay film in turn at external electrode surface, thus, make the sample of sample number 1 ~ 8.In addition, the length L:1.0mm of the outside dimension of each sample obtained, width W: 0.5mm, thickness T:0.5mm.
(evaluation of sample)
Secondly, about each sample of sample number 1 ~ 8, use impedance analyzer (Agilent Technologies's system: HP4194A), measurement of electrostatic capacity under the condition of frequency 1kHz, voltage 1V.
In addition, for each sample of sample number 1 ~ 8, the direct current of circulation 1mA carrys out voltage between measurement terminal, obtains varistor voltage.
Further, for each sample of sample number 1 ~ 8, according to the IEC61000-4-2 (international standard) as immunity test specification, with oscilloscope measurement voltage waveform (absorption waveform), crest voltage is obtained.
Fig. 2 is the electrical circuit diagram of the voltage waveform measuring equipment of ESD.
That is, the tie point between discharge resistance R1 and charging resistor R2 and power supply V are connected in parallel to charging capacitor C.In addition, be situated between power supply V and discharge resistance Rl and establish switch S 1, the outlet side of charging resistor R2 is provided with change over switch S2, be situated between lead-out terminal and establish sample 11.
The static capacity of charging capacitor C is set to 150pF, discharge resistance R1 is set to 330 Ω, charging capacitor C is applied to the voltage of 8kV, each sample 11 for sample number 1 ~ 8 carries out discharge test.Further, about each sample 11, use oscilloscope measurement voltage waveform, read crest voltage from oscillographic measurement result.
Table 1 illustrates secondary clacining temperature and the measurement result of sample number 1 ~ 8.
[table 1]
* be outside the scope of the invention
In sample number 8, because secondary clacining temperature is 800 DEG C higher, internal electrode is oxidized, therefore cannot measurement of electrostatic capacity.
Sample number 6 and 7, because secondary clacining temperature high is 600 ~ 700 DEG C, so crest voltage height is more than 150V.
On the other hand, sample number 1 because secondary clacining temperature be 400 DEG C too low, so the oxidation of crystal grain boundary is insufficient, electrostatic capacitance is increased to 15nF.
On the other hand, known sample number 2 ~ 5 is because secondary clacining temperature is 450 ~ 580 DEG C, and within the scope of the present invention, so crest voltage can be made to be reduced to 65 ~ 85V, the absorption characteristic of ESD improves.Particularly known along with the decline of secondary clacining temperature, crest voltage also declines.That is, when secondary clacining temperature declines, be distributed to crystal grain boundary and the thickness of crystal boundary insulating barrier that formed is also thinning, its result, the schottky barrier height formed at crystal grain boundary is also low, and therefore varistor voltage declines.And when varistor voltage declines, when discharge test, because the resistance of sample 11 (with reference to figure 2) reduces, so think that crest voltage also declines.
Industry utilizes possibility
Even electrostatic capacitance is the product with smaller capacity of about 1nF, also can obtain the laminated semiconductor ceramic capacitor good to the absorbent properties of ESD, and capacitor function and Zener function can be realized by an element.
Label declaration
1a ~ 1g semiconductor ceramic coating
Claims (6)
1. a manufacture method for laminated semiconductor ceramic capacitor, it has:
Preburning powder production process, weighs the Sr compound of ormal weight, Ti compound and donor compound, carries out preheating to make preburning powder after carrying out co-grinding;
Heat treated powder production process, mixes acceptor's compound with described preburning powder, heat-treats to make heat treated powder;
Duplexer formation process, implements processing and forming to described heat treated powder and makes ceramic green sheet, after this by interior electrode layer and ceramic green sheet is alternately stacked forms duplexer; And
Calcination process, after having carried out a calcination processing under reducing atmosphere, has carried out secondary clacining process to described duplexer under air atmosphere,
Wherein, under the temperature atmosphere of 450 DEG C ~ 550 DEG C, described secondary clacining process is carried out.
2. the manufacture method of laminated semiconductor ceramic capacitor as claimed in claim 1, is characterized in that,
The calcined temperature of described preheating is higher than the calcining heat of a described calcination processing.
3. the manufacture method of laminated semiconductor ceramic capacitor as claimed in claim 1 or 2, is characterized in that,
In described preburning powder production process, the mode becoming the scope of 0.990≤m≤1.010 according to the mixing mol ratio m of Sr position and Ti position, weighs described Sr compound and Ti compound.
4. the manufacture method of laminated semiconductor ceramic capacitor as claimed in claim 1 or 2, is characterized in that,
In described heat treated powder production process, with relative to Ti element 100 moles, acceptor's compound is less than 0.5 mole but the mode not comprising 0 mole weighs acceptor's compound.
5. the manufacture method of laminated semiconductor ceramic capacitor as claimed in claim 1 or 2, is characterized in that,
Low melting point oxide is added relative in the scope of Ti element 100 moles below 0.1 mole.
6. a laminated semiconductor ceramic capacitor, is characterized in that,
The manufacture method according to any one of claim 1 to 5 is used to manufacture.
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|---|---|---|---|
| JP2011000486 | 2011-01-05 | ||
| JP2011-000486 | 2011-01-05 | ||
| PCT/JP2011/079207 WO2012093575A1 (en) | 2011-01-05 | 2011-12-16 | Method of manufacturing stacked semiconductor ceramic capacitor and stacked semiconductor ceramic capacitor |
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| CN103098157B true CN103098157B (en) | 2016-01-06 |
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| CN109650878B (en) * | 2019-01-10 | 2021-08-24 | 陕西科技大学 | Lead-free broadband giant dielectric low-loss high-insulation-resistance ceramic material and preparation method thereof |
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| JP2007180297A (en) * | 2005-12-28 | 2007-07-12 | Murata Mfg Co Ltd | Semiconductor ceramic, method for manufacturing the same and laminated semiconductor ceramic capacitor |
| CN101341558A (en) * | 2006-07-03 | 2009-01-07 | 株式会社村田制作所 | Stacked semiconductor ceramic capacitor with varistor function and method for manufacturing the same |
| CN101346325A (en) * | 2006-05-31 | 2009-01-14 | 株式会社村田制作所 | Semiconductor ceramic, laminated semiconductor ceramic capacitor, method for fabricating semiconductor ceramic, and method for fabricating laminated semiconductor ceramic capacitor |
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| JP2727626B2 (en) * | 1989-02-16 | 1998-03-11 | 松下電器産業株式会社 | Ceramic capacitor and method of manufacturing the same |
| JPH03138905A (en) * | 1989-10-24 | 1991-06-13 | Matsushita Electric Ind Co Ltd | Voltage dependent non-linear ceramic resistor and its manufacture |
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| CN1686936A (en) * | 2005-03-30 | 2005-10-26 | 天津大学 | Method for preparing double functional ceramics of pressure-sensitive capacitance based on SrTiO3 |
| JP2007180297A (en) * | 2005-12-28 | 2007-07-12 | Murata Mfg Co Ltd | Semiconductor ceramic, method for manufacturing the same and laminated semiconductor ceramic capacitor |
| CN101346325A (en) * | 2006-05-31 | 2009-01-14 | 株式会社村田制作所 | Semiconductor ceramic, laminated semiconductor ceramic capacitor, method for fabricating semiconductor ceramic, and method for fabricating laminated semiconductor ceramic capacitor |
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| WO2012093575A1 (en) | 2012-07-12 |
| CN103098157A (en) | 2013-05-08 |
| JP5418993B2 (en) | 2014-02-19 |
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