CN103094291B - A kind of encapsulation structure for image sensor with double layer substrate - Google Patents
A kind of encapsulation structure for image sensor with double layer substrate Download PDFInfo
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- CN103094291B CN103094291B CN201210220408.0A CN201210220408A CN103094291B CN 103094291 B CN103094291 B CN 103094291B CN 201210220408 A CN201210220408 A CN 201210220408A CN 103094291 B CN103094291 B CN 103094291B
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- substrate
- image sensor
- crystal grain
- double layer
- encapsulation structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
The invention provides a kind of encapsulation structure for image sensor with double layer substrate, it comprises one and contains the first substrate that crystal grain accepts opening, and it comprises multiple first and penetrates hole, and it penetrates this first substrate; One second substrate, is formed on this first substrate, and it comprises a crystal grain openning and multiple second and penetrates hole, and it penetrates this second substrate; Second wiring diagram of part is coupled with the 3rd wiring diagram of part; One image crystal grain its comprise a conductive pad and and receive sensing array, wherein this crystal grain accepts opening and this sensing array window is exposed to this crystal grain openning; And one penetrates hole electric conducting material, penetrate hole in order to be filled in the plurality of second, wherein the plurality of second some perforations penetrated in hole is coupled with the conductive pad of this image crystal grain.
Description
Technical field
The present invention relates to a kind of encapsulation structure for image sensor, particularly a kind of encapsulation structure for image sensor embedding double layer substrate containing crystal grain.
Background technology
In the field of semiconductor element, along with component size constantly reduces, component density also constantly improves.Technical need in encapsulation or interconnector also must improve to meet above-mentioned situation.Traditionally, covering in brilliant method of attachment (flip-chip attachment method), a solder bump array is formed at the surface of above-mentioned crystal grain.The formation of above-mentioned solder projection by use one soldering composite material (solder composite material), can produce desired solder projection pattern through a pad shade (solder mask).The function of wafer package comprises power transmission (power distribution), signal transmission (signal distribution), heat radiation (heat dissipation), protection and supports etc.More complicated when semiconductor variable, traditional encapsulation technology, such as leaded package (lead frame package), contraction type encapsulation (flex package), rigid encapsulation technology (rigid package technique), cannot meet the demand manufacturing high density components on a less wafer.More complicated when semiconductor variable, traditional encapsulation technology, such as leaded package (lead frame package), contraction type encapsulation (flex package), rigid encapsulation technology (rigid package technique), cannot meet the demand manufacturing high density components on a less wafer.The development trend of the encapsulation technology of today is towards ball grid array (BGA, ball grid array), cover crystalline substance (FC-BGA, flip-chip), chip-size package (CSP, chip scale package) and wafer-level packaging (WL-CSP, wafer level chip scale package).
Image sensor is widely used in digital still camera, mobile phone, mobile phone and other application now.Manufacturing the technical of image sensor, particularly CMOS image sensor, all has greatly improved.For example, for the demand of high-res and low power consumption, all impel image sensor towards to minimize and integration aspect strides forward.
The photodiodes of formula photodiodes (pinned photodiode) and embedded photoelectric diode (buried photodiode) is pricked in hole often to use one to be called in the image sensor of the overwhelming majority, because this photodiodes has lower noise performance.
The anode layer of this photodiodes structure normally embeds the surface of this photodiodes or below and close to transmission lock (transfer gate), negative electrode layer is then the darker position of embedding one silicon system substrate, this embedded layer can store electric charge and away from surf zone, meaning can avoid the defect of this silicon system substrate surface, and the object of anode layer is then the storage volume and the defect of passivation on photodiodes surface that are to provide photodiodes to have increase.
There are many image sensor wafers to use crystal covering type packing structure, all attempt to develop and image sensor encapsulation architecture is simplified.United States Patent (USP) 6,144,507 disclose one directly by the technology of image sensor wafer sealing on printed circuit board (PCB) (PCB, printed circuit board).
One image sensing wafer is locked in by crystal covering type packing structure on a hole in PCB, and a transparent cover body is also directly attached to the surface, master end of this wafer or being bonded in this image sensing wafer is locked in opposite side in this PCB on hole.
Although these methods all omit the difficulty place of wire bonds, but this PCB is in order to meet the size of this image sensing wafer and this transparent cover body, and the size of this PCB usually can be very large.
United States Patent (USP) 5,786,589 disclose a kind of Adhesive Label tablet on glass substrate and a gluing image sensing wafer and a conductive film to this labei sheet.Because labei sheet wire, so this design needs a kind of special substrate attach technology.Moreover this conductive film may disturb the sensing circuit on this image sensing wafer and need the virtual distribution of formation one or dam structure is to make up this problem.
United States Patent (USP) 6,885,107 disclose a kind of traditional encapsulation structure of image sensing chip.It adopts a kind ofly has at substrate bottom the BGA package that multiple solder ball and this crystal grain expose to substrate.
The making of the encapsulation structure for image sensor provided according to this invention has aforementioned and other advantageous refinements and method.One image sensing wafer utilizes one to cover crystal type and is arranged on conductive trace on a first surface of a transparency carrier.The active surface of this image chip is then protected by the surrounding space deposition sealing pearl at the active surface of this image chip and this first surface of this substrate after installing and is avoided polluting, because of omitted herein prior art in addition needed for dam structure or spacing frame.The transport element of dispersion then sticks to this conductive trace end as solder ball and column and forms an array figure, and the transport element of this dispersion is from the horizontal common plane extended out to the back surface exceeding this image sensing wafer haply of this conductive trace this first surface.Such structure contains a kind of BOC(board-on-chip) encapsulation arrangement.But because the solder ball height of this structure and this extrusion mould accept structure and this substrate thickness cannot be reduced and limits reducing of the size of encapsulating structure.
Prior art forms this image sensing chip package and has complicated process, and this encapsulating structure is too high and cannot be reduced.In addition, the encapsulation that these prior arts only disclose single-chip there is no the structure that multi-wafer is described.
Summary of the invention
In view of this, main purpose of the present invention is to provide a kind of encapsulation structure for image sensor with double layer substrate, and it has to be pre-formed and penetrates the double layer substrate that hole and crystal grain accept opening.
Another object of the present invention is to provide a kind of encapsulation structure for image sensor with the double layer substrate of crystal grain openning, in order to the reliability of improving device and the size of reduction device.
Another object of the present invention is to provide a kind of to be had utilize the alloying metal of copper clad laminate and electro-coppering gold or copper nickel gold to increase wiring diagram that electrical conductivity formed and is positioned at below double layer substrate and the encapsulation structure for image sensor of top.
For achieving the above object, technical scheme of the present invention is achieved in that
Have an encapsulation structure for image sensor for double layer substrate, comprise one and have the first substrate and multiple first that crystal grain accepts opening and penetrate hole, it penetrates this first substrate; One second substrate, it is formed on this first substrate, wherein this first substrate has one first wiring diagram and one second wiring diagram, it is formed at below and the overhead surface of this first substrate, and this second substrate has one the 3rd wiring diagram and one the 4th wiring diagram, it is formed at below and the overhead surface of this second substrate, and the second wiring diagram of part is coupled with the 3rd wiring diagram of part; One image crystal grain its comprise a conductive pad and one receive sensing array, wherein this crystal grain accepts opening and this sensing array window and is exposed to this crystal grain openning and one and penetrates hole electric conducting material, penetrate hole in order to be filled in the plurality of second, wherein the plurality of second some perforations penetrated in hole is coupled with the conductive pad of this image crystal grain.
One optical glass substrate, it is formed on this second substrate and this crystal grain openning.One lens fixed mount comprises lens, and it is formed on this optical glass substrate, and wherein these lens and this image sensing grain alignment.One infrared filter, it is formed within this lens fixed mount.One passive type crystal grain and/or an active crystal grain, it is formed on this second substrate, and wherein this active crystal grain comprises: chip-size package, circle level chip-size package, ball grid array and cover Jingjing grain.In addition, the plurality of first at least one sidewall penetrating hole comprises conductive metal.This penetrates hole electric conducting material, comprises metal or alloy, as scolding tin and anisotropic conducting membrance.
One containing the lens fixed mount of lens, and it is formed on this second substrate, wherein these lens and this image sensing grain alignment.One infrared filter, it is formed within this lens fixed mount.One passive type crystal grain, it is formed on this second substrate.One active crystal grain, it is formed on this second substrate.
This active crystal grain comprises: chip-size package, circle level chip-size package, ball grid array and cover Jingjing grain.The plurality of first at least one sidewall penetrating hole comprises a conductive metal.This penetrates hole electric conducting material, comprises metal or alloy or anisotropic conductive film.This first substrate and this second substrate material, comprise fire resistant epoxy glass mat (FR5) or FR4.In addition, this first substrate and this second substrate material, comprise bismaleimides triazine resin, silicon system, printed circuit board material, glass, pottery, metal or alloy.
The encapsulation structure for image sensor with double layer substrate provided by the present invention, has the following advantages: it has to be pre-formed and penetrates the double layer substrate that hole and crystal grain accept opening.There is the encapsulation structure for image sensor of the double layer substrate of crystal grain openning, the reliability of encapsulating structure and the size of reduction encapsulating structure can be improved.Utilize copper clad laminate and electro-coppering gold or the alloying metal of copper nickel gold to increase wiring diagram that electrical conductivity formed is positioned at below double layer substrate and the encapsulation structure for image sensor of top.
Accompanying drawing explanation
Fig. 1 illustrates the sectional view before the link of a first substrate, a second substrate and image sensor according to the present invention.
Fig. 2 illustrates according to the present invention the sectional view that first substrate combines with the second substrate with crystal grain opening.
Fig. 3 illustrates according to the present invention the sectional view that first substrate accepts crystal grain.
Fig. 4 illustrates according to the present invention to form solder ball in the sectional view penetrating hole.
Fig. 5 is the sectional view of the attached glass substrate illustrating second substrate according to the present invention.
Fig. 6 illustrates lens fixed mount according to the present invention to be formed at sectional view on this second substrate.
Fig. 7 is the sectional view illustrating another embodiment according to the present invention.
[primary clustering symbol description]
100 first substrates
101 first wiring diagrams
102 second wiring diagrams
103 conduction through holes
104 second substrates
105 crystal grain accept opening
106 the 3rd wiring diagrams
106a the 4th wiring diagram
107 crystal grain opennings
120 crystal grain (wafer)
121 conductive pads
122 sensing arrays
159 conduction through holes
159a conducts through hole
160 optical glass devices
162 electric conducting materials
164 pasting materials
180 active (passive) elements
182 lens fixed mounts
184 optical lenses
186 bendable printed circuit board (PCB)s
188 infrared filters.
Embodiment
The encapsulation structure for image sensor having a double layer substrate to of the present invention below in conjunction with accompanying drawing and embodiments of the invention and method are described in further detail.
As shown in FIG. 6 and 7, the present invention discloses a kind of crystal grain (or multi-wafer) embedded board structure and at both side surface construction double-decker, and the profile of a system packaging structure is described, it comprises double layer substrate and passive device that one has crystal grain embedding, and according to the present invention at top construction layer and the pin at opposite side, with ball grid array (BGA, ball grid array), cover crystalline substance (FC-BGA, flip-chip), chip-size package (CSP, chip scale package) and wafer-level packaging (WL-CSP, wafer level chip scale package) etc. do surface mount.
One encapsulation structure for image sensor, it comprises a first substrate 100, wherein this first substrate 100 more comprise one first wiring Figure 101 be positioned at this first substrate upper surface, and one second wiring Figure 102 be positioned at this first substrate lower surface.One conduction through hole 103 can penetrate this first substrate 100 in order to link with this first Figure 101 and this second Figure 102 that connects up that connects up.This first substrate 100 has a crystal grain and accepts opening 105 in order to accept one crystal grain/wafer 120, and this one crystal grain/wafer 120 has a sensing array 122 and is formed at wherein.This crystal grain (image sensor) 120 comprises a conduction (as aluminium or gold) and pads 121(input and output pad) be formed at wherein.The crystal grain that this crystal grain 120 is exposed to this first substrate 100 accepts in opening 105.One second substrate 104 its be formed on this first substrate 100, this second substrate 104 comprises a crystal grain openning 107, the 3rd Figure 106 that connects up and is positioned at this second substrate 104 upper surface and one the 4th wiring diagram 106a is positioned at this second substrate 104 lower surface.3rd wiring Figure 106 is linked to this first wiring Figure 101.One conduction through hole 159 can penetrate this second substrate 104 and link this first wiring Figure 101.Another conduction penetrates the conduction (as aluminium or gold) that hole 159a can penetrate this second substrate 104 and link this image sensor 120 and pads 121.
This conduction through hole 159,159a can fill, as metal or alloy by conductive material.Can scolding tin or anisotropic conducting membrance formation in an example.In an embodiment, this conduction penetrates hole 159a and is linked to this crystal grain conductive pad 121.One optical glass substrate 160 adheres on this second substrate 104 by a pasting material 164.At least one active or passive device 180 are welded in the 4th wiring diagram 106a of this second substrate 104 upper surface.The aforesaid system packaging construct construction encapsulating structure of a grid array (land grid array package-LGA) form, it omits the thickness that solder ball reduces encapsulating structure.
The material of this first substrate 101 and this second substrate 104 is good with organic substrate such as epoxy resin (refractory glass fibre plate (FR5), bismaleimides triazine resin (BT)) and printed circuit board (PCB).This first substrate 100 is the same with motherboard (printed circuit board (PCB)) with the thermal coefficient of expansion of this second substrate 104 is good.Above-mentioned organic substrate is to have the epoxy resin (fire resistant epoxy glass mat, bismaleimides triazine resin) of high glass transition temperature (Tg) for good, and above-mentioned material can be formed in circuit pattern and interconnector perforation easily.The thermal coefficient of expansion of metallic copper is approximately 16, also can be applicable among first and second baseplate material.And glass, pottery and silicon also can be used to be used as substrate.Above-mentioned sticky material 122 is good with silicone rubber based elastomeric material.
The thermal coefficient of expansion of the organic substrate of above-mentioned epoxy resin (refractory glass fibre plate, bismaleimides triazine resin) is about 14 ~ 17 in X, Y-direction, is about 30 ~ 60 so can reduces sticky material crystal grain displacement problem in temperature-curable process in Z-direction.
In one of the present invention embodiment, wiring layer 102,101,106, the material of 106a comprises: the alloy of copper nickel gold and, or, the alloy of copper nickel; This wiring layer thickness is 5 um to 25 um (time if necessary, its thickness can more than 25um).
Copper clad laminate (copper clad laminated) is also if metal seed layer is with stacked formation, and this copper/nickel alloy and copper/nickel/billon are to electroplate formation; The wiring layer utilizing electroplating process formed thereby has enough thickness and preferably mechanical property, can bear the unmatched problem of thermal coefficient of expansion in temperature cycles and mechanical bend.This conductive pad can be gold or copper/gold or aluminium or and combines.
In one of the present invention embodiment, as shown in Figure 1, a first substrate 100 comprises the conduction Figure 101 that connects up and is formed at the upper surface of this first substrate, and a conduction wiring Figure 102 is formed at the lower surface of this first substrate 100.This wiring Figure 101 and this wiring Figure 102 comprises with copper clad laminate and the alloying metal electroplating electro-coppering or the copper nickel gold formed.This crystal grain 120 has a conduction (aluminium or gold) and pads 121(input and output pad) be formed at wherein.The crystal grain that this crystal grain 120 is exposed to this first substrate 100 accepts in opening 105.One second substrate 104 its be formed on this first substrate 100, this second substrate 104 comprises a crystal grain openning 107, the 3rd Figure 106 that connects up and is positioned at this second substrate 104 upper surface and one the 4th wiring diagram 106a is positioned at this second substrate 104 lower surface.
The present invention forms the method for packing of image sensor encapsulation, as shown in Figure 1, comprise the organic substrate that preparation one first substrate 100 and a second substrate 104(are preferably FR4/FR5/BT series material) and this first substrate there is wired circuit 102 and 101, be formed at upper surface and the lower surface of this first substrate 100 respectively.This wiring diagram 106a and 106 upper surface and the lower surface being formed at this second substrate 104 respectively.In this substrate 101,102,106a and 106 layer can electroplate the electro-coppering of formation or copper/nickel/billon metal is formed.This link conduction through hole 103 can penetrate this first substrate 100 and be formed.As shown in Figures 1 and 2, this first substrate 100 has a preformed crystal grain and accepts opening 105 and this crystal grain openning 107 also for being pre-formed, this crystal grain accepts opening 105 by laser cutting or mechanical stamping (many dices punch press), its opening size is greater than this crystal grain, and the every limit of its opening is than the size increase about 100um ~ 200um of crystal grain.As shown in Figure 2, this second substrate 104 sticks (tack glued membrane) at this first substrate 100.
Next step as shown in Figure 3, is then this image sensor 120 is arranged at the crystal grain openning 107 that this crystal grain accepts opening 105 and should to be exposed to by sensing region 122 by crystal grain/substrate truing tool on this second substrate 104.And next step, be then form this electric conducting material 162(as welding compound) in this conduction through hole 159,159a of this second substrate 104.This filling step can be formed at before this second substrate 104 adheres to this first substrate 100.IR back welding process is then flow to after welding compound newly filled by through hole bed in this welding compound to perform, and in through hole 159a, be connected to this conductive pad 121.
When welding compound 162 is backfilled to this this through hole 159,159a again, this glass substrate 160 is formed on this second substrate 104 as an other selectable method for packing by this adhesion material 164 subsequently.
This initiatively or passive device 180 also adhere to (surface mount, SMT) on layer as shown in Figure 5, then as shown in Figure 6, have the lens fixed mount 182 of lens 184, it to adhere on this second substrate 104 and aligns with this image sensing crystal grain 120.This first substrate 100 can stick on flexible circuit board 186 by welding compound or anisotropic conducting membrance (ACF).This optical lens height is then depending on its optical appearance and physical parameter.As shown in Figure 7, an infrared filter 188 can be formed within this lens fixed mount 182 (this infrared filter 188 can this glass substrate 160 replace).
This passive device 180 can be electric capacity or resistance, and it is another with wafer-level packaging (WL-CSP, wafer level chip scale package), chip-size package (CSP, chip scale package), cover crystalline substance (FC-BGA, flip-chip) and the crystal grain of ball grid array (BGA, ball grid array) also can be arranged on the top circuit of this second substrate 104.Therefore construction at least two plates can embed the inside together, and there is conduction through hole in order to as electric signal interior bonds.All conduction through holes 159,159a and 103 can CNC or Laser drill formation.
Native system encapsulation structure of image sensing chip and processing procedure all disclose the simple of multi-wafer and double-deck traditional image sensing chip package than shortcoming.And native system encapsulation structure of image sensing chip thickness can easily control, and the problem that can cause wafer shift in processing procedure can be eliminated.And ejection formation instrument can be omitted; Also cmp processing procedure must not be imported and this processing procedure also can not produce warpage.This substrate be one have be pre-formed crystal grain openning, interior bonds through hole prepare substrate in advance; This crystal grain openning size equals the every limit of this crystallite dimension increases about 100um to 200um; By filling elastic core colloid, above-mentioned opening can as stress buffer release areas, absorb and do not mated by thermal coefficient of expansion between silicon crystal grain with substrate (refractory glass fibre plate/bismaleimides triazine resin), the thermal stress caused.In addition, also elastomeric dielectric material be can fill between crystal grain and substrate sidewall spacers, caused mechanical bend and/or thermal stress do not mated to absorb by thermal coefficient of expansion.Owing to applying above-mentioned simple increasing layer at upper surface and basal surface simultaneously, therefore encapsulation productivity ratio (reducing the manufacturing cycle) can be increased.This crystal grain and substrate (i.e. this first substrate and this second substrate) are bonded together.The reliability that above-mentioned encapsulation and motherboard (motherboard) level encapsulate is also better than in the past.Especially for motherboard level package temperature loop test, because substrate is consistent with the thermal coefficient of expansion of printed circuit board (PCB) (motherboard), therefore do not have any thermal and mechanical stress putting on solder bump/ball; For motherboard level packaging machinery crooked test, the substrate bottom side of supported mechanical intensity can the stress of grained region on the upside of absorptive substrate and borderline region.
The above, be only preferred embodiment of the present invention, be not intended to limit protection scope of the present invention.
Claims (15)
1. have an encapsulation structure for image sensor for double layer substrate, it is characterized in that, it comprises:
One first substrate, it comprises: a crystal grain accepts opening, and multiple first penetrates hole, and it penetrates this first substrate;
One second substrate, be formed on this first substrate, it comprises: a crystal grain openning, and multiple second penetrates hole, and it penetrates this second substrate;
This first substrate, comprises: one first wiring diagram, and it is formed at the upper surface of this first substrate, and
One second wiring diagram, it is formed at the lower surface of this first substrate;
This second substrate, comprises: one the 3rd wiring diagram, and it is positioned at the lower surface of this second substrate, and one the 4th wiring diagram, and it is positioned at the upper surface of this second substrate;
This second wiring diagram part and the 3rd wiring diagram partial coupling; One image sensing crystal grain, it comprises: a conductive pad, and one receives sensing array; This crystal grain accepts opening and this reception sensing array is exposed to this crystal grain openning; One penetrates hole electric conducting material, and penetrate hole in order to be filled in the plurality of second, wherein the plurality of second some perforations penetrated in hole is coupled with this conductive pad.
2. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 1, it is characterized in that, more comprise:
One optical glass substrate, it is formed on this second substrate and this crystal grain openning.
3. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 2, it is characterized in that, more comprise:
One lens fixed mount, it comprises:
One lens, it is formed on this optical glass substrate, and
Wherein these lens and this image sensing grain alignment.
4. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 3, it is characterized in that, more comprise:
One infrared filter, it is formed within this lens fixed mount.
5. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 1, it is characterized in that, more comprise:
One containing the lens fixed mount of lens, and it is formed on this second substrate, wherein these lens and this image sensing grain alignment.
6. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 5, it is characterized in that, more comprise:
One infrared filter, it is formed within this lens fixed mount.
7. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 1, it is characterized in that, more comprise: a passive type crystal grain, it is formed on this second substrate.
8. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 7, it is characterized in that, more comprise: an active crystal grain, it is formed on this second substrate.
9. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 8, it is characterized in that, wherein:
This active crystal grain comprises: chip-size package, circle level chip-size package, ball grid array and cover Jingjing grain.
10. there is the encapsulation structure for image sensor of double layer substrate as claimed in claim 1, it is characterized in that, wherein:
The plurality of first at least one sidewall penetrating hole comprises a conductive metal.
11. encapsulation structure for image sensor as claimed in claim 1 with double layer substrate, is characterized in that, wherein:
This penetrates hole electric conducting material, comprises metal or alloy or anisotropic conductive film.
12. encapsulation structure for image sensor as claimed in claim 11 with double layer substrate, is characterized in that, wherein:
This penetrates hole electric conducting material, comprises scolding tin.
13. encapsulation structure for image sensor as claimed in claim 1 with double layer substrate, is characterized in that, wherein:
This first substrate and this second substrate material, comprise FR4 or fire resistant epoxy glass mat FR5.
14. encapsulation structure for image sensor as claimed in claim 1 with double layer substrate, is characterized in that, wherein:
This first substrate and this second substrate material, comprise bismaleimides triazine resin, silicon system, printed circuit board material, glass, pottery, metal or alloy.
15. encapsulation structure for image sensor as claimed in claim 1 with double layer substrate, is characterized in that, wherein:
This first wiring diagram, this second wiring diagram, the 3rd wiring diagram and the 4th wiring diagram, comprise with copper clad laminate and the alloying metal electroplating electro-coppering or the copper nickel gold formed.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/289,864 US8232633B2 (en) | 2008-09-25 | 2011-11-04 | Image sensor package with dual substrates and the method of the same |
| US13/289,864 | 2011-11-04 |
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| Publication Number | Publication Date |
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| CN103094291A CN103094291A (en) | 2013-05-08 |
| CN103094291B true CN103094291B (en) | 2015-08-26 |
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| CN105742253B (en) * | 2014-12-10 | 2018-08-07 | 旭景科技股份有限公司 | The printed circuit board assembly of image sensor is installed |
| CN106033753B (en) * | 2015-03-12 | 2019-07-12 | 恒劲科技股份有限公司 | Package module and its board structure |
| TWI559464B (en) * | 2015-03-12 | 2016-11-21 | 恆勁科技股份有限公司 | Package module and its substrate structure |
| TWI619389B (en) * | 2016-07-13 | 2018-03-21 | 許志行 | Portable electronic device and image capturing module thereof |
| US9860431B1 (en) | 2016-10-11 | 2018-01-02 | Chi-Hsing Hsu | Portable electronic device and image capturing module thereof |
| KR101942740B1 (en) | 2017-10-19 | 2019-01-28 | 삼성전기 주식회사 | Fan-out sensor package and optical-type fingerprint sensor module |
| TWI639880B (en) * | 2017-11-10 | 2018-11-01 | 群光電子股份有限公司 | Lens structure and method for correcting thermal drift |
Citations (1)
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| CN101859752A (en) * | 2009-04-06 | 2010-10-13 | 杨文焜 | Stack package structure and manufacture method thereof with chip embedded and silicon through hole crystal grain |
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| US20080191335A1 (en) * | 2007-02-08 | 2008-08-14 | Advanced Chip Engineering Technology Inc. | Cmos image sensor chip scale package with die receiving opening and method of the same |
| TWI484237B (en) * | 2007-12-19 | 2015-05-11 | Heptagon Micro Optics Pte Ltd | Optical module for a camera device, baffle substrate, wafer scale package, and manufacturing methods therefor |
| CN102045494A (en) * | 2009-10-22 | 2011-05-04 | 国碁电子(中山)有限公司 | Camera module and making method thereof |
| TWI409923B (en) * | 2009-12-02 | 2013-09-21 | King Dragon Internat Inc | Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101859752A (en) * | 2009-04-06 | 2010-10-13 | 杨文焜 | Stack package structure and manufacture method thereof with chip embedded and silicon through hole crystal grain |
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| CN103094291A (en) | 2013-05-08 |
| TW201320314A (en) | 2013-05-16 |
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