CN103050600B - A kind of preparation method of chip of light-emitting diode - Google Patents
A kind of preparation method of chip of light-emitting diode Download PDFInfo
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- CN103050600B CN103050600B CN201210563894.6A CN201210563894A CN103050600B CN 103050600 B CN103050600 B CN 103050600B CN 201210563894 A CN201210563894 A CN 201210563894A CN 103050600 B CN103050600 B CN 103050600B
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Abstract
The invention discloses a kind of preparation method of chip of light-emitting diode, belong to semiconductor applications.Chip: substrate layer, N-type layer, luminescent layer, P-type layer and transparency conducting layer and the N electrode of drawing in N-type layer and P-type layer respectively and P electrode, chip also comprises the transparent dielectric layer covering the bottom surface of substrate layer and/or the upper surface of transparency conducting layer; Cover the refractive index of refractive index higher than substrate layer of the transparent dielectric layer of the bottom surface of substrate layer; Cover the refractive index of refractive index higher than transparency conducting layer of the transparent dielectric layer of the upper surface of transparency conducting layer; The transparent dielectric layer covering the bottom surface of substrate layer comprises some projections of extending from the bottom surface of substrate layer; The transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer.Invention increases the light extraction efficiency of LED.
Description
Technical field
The present invention relates to semiconductor applications, particularly a kind of preparation method of chip of light-emitting diode.
Background technology
LED (LightingEmittingDiode, light-emitting diode) passes through chip light emitting.The chip of LED adopts semiconductive luminescent materials to make, and comprises epitaxial wafer, is etched in electrode on epitaxial wafer and passivation layer.
After the chip package of LED, encapsulating material covers on the outer surface of chip.Due to the refractive index of semiconductive luminescent materials and the refractive index of encapsulating material (as epoxy resin) close, therefore, only have the utilizing emitted light of fraction to be refracted away, affect the illumination effect of the chip of LED.For this, prior art provides a kind of solution: make one deck reflector in the bottom surface of epitaxial wafer, and the emergent light of the bottom surface of directive epitaxial wafer is reflexed to other direction by this reflector, the end face of such as epitaxial wafer.
Realizing in process of the present invention, inventor finds that prior art at least exists following problem:
Because the refractive index of semiconductive luminescent materials is on the low side, critical total internal is smaller; Make reflective layer reflects be reflected back toward chip internal again to the wide part of the end face of epitaxial wafer, and be heat energy by sorption enhanced, effectively can not promote the light extraction efficiency of chip.
Summary of the invention
In order to solve the problem of prior art, embodiments provide the preparation method of the chip of a kind of LED.Described technical scheme is as follows:
A preparation method for the chip of light-emitting diode, described method comprises:
Step 1, provide substrate layer, and on substrate layer, grow N-type layer, luminescent layer, P-type layer and transparency conducting layer successively;
Step 2, prepare wafer;
Step 3, sliver operation is carried out to described wafer, obtain chip;
Wherein, describedly prepare wafer, comprising:
The transparent dielectric layer be made up higher than the transparent medium of described transparency conducting layer of refractive index is formed at the upper surface of described transparency conducting layer, respectively N electrode and P electrode are set in described N-type layer and described P-type layer, and on described transparent dielectric layer deposit passivation layer, obtain wafer; Or,
The transparent dielectric layer be made up higher than the transparent medium of described transparency conducting layer of refractive index is formed at the upper surface of described transparency conducting layer, respectively N electrode and P electrode are set in described N-type layer and described P-type layer, and on described transparent dielectric layer deposit passivation layer, form the transparent dielectric layer be made up higher than the transparent medium of described substrate layer of refractive index in the bottom surface of described substrate layer, obtain wafer;
Wherein, the described transparent dielectric layer covering the bottom surface of described substrate layer comprises some projections of extending from the bottom surface of described substrate layer, and the transparent dielectric layer covering the upper surface of described transparency conducting layer comprises some projections of extending from the upper surface of described transparency conducting layer;
Wherein, the described upper surface at described transparency conducting layer forms the transparent dielectric layer be made up higher than the transparent medium of described transparency conducting layer of refractive index, comprising:
The transparent dielectric layer of one deck refractive index higher than described transparency conducting layer is evaporated at the upper surface of described transparency conducting layer;
At the upper surface deposition SiO of described transparent dielectric layer
2layer;
Adopt photoresist to described SiO
2the upper surface of layer carries out lithography operations, with at described SiO
2the upper surface of layer forms some predetermined patterns;
Etching machine is adopted to etch described SiO
2the described predetermined pattern of the upper surface of layer, obtains the SiO after etching
2layer;
The residual photoresist after etching is removed in cleaning, with the SiO after etching
2layer is mask body, carries out high temperature corrosion, make the described transparent dielectric layer after corrosion comprise some separate projections of extending from the upper surface of described transparency conducting layer to described transparent dielectric layer;
Remove the SiO after etching
2layer, and carry out N district etching;
Wherein, the thickness of described transparent dielectric layer is 0.5 ~ 3 μm, the external diameter of a circle of predetermined pattern described in each is 0.5 ~ 10 μm, spacing between adjacent described predetermined pattern is 0.5 ~ 5 μm, to make described protruding height described in each be 0.5 ~ 3 μm, external diameter of a circle protruding described in each is 0.5 ~ 5 μm, and the spacing between adjacent described projection is 0.5 ~ 10 μm.
Wherein, the described bottom surface at described substrate layer forms the transparent dielectric layer be made up higher than the transparent medium of described substrate layer of refractive index, comprising:
Protective layer is formed in described passivation layer surface;
The transparent dielectric layer of one deck refractive index higher than described substrate layer is evaporated in the bottom surface of described substrate layer;
Photoresist is adopted to carry out lithography operations to the bottom surface of described transparent dielectric layer, to form some predetermined patterns in the bottom surface of described transparent dielectric layer;
Adopt etching machine to etch the described predetermined pattern of the bottom surface of described transparent dielectric layer, make the described transparent dielectric layer after etching comprise some separate projections of extending from the bottom surface of described substrate layer;
The residual photoresist after etching and described protective layer are removed in cleaning.
Wherein, the process sequence of described lithography operations comprises spin coating operation, soft baking operation, developing procedure successively and firmly dries operation; The temperature of described soft baking is 100 ~ 120 degree, baking time 90 ~ 180s; The temperature of described hard baking is 120 ~ 160 degree, baking time 60 ~ 180s; To make described in each the acute angle formed between protruding sidewall and the bottom surface of described substrate layer or the upper surface of described transparency conducting layer be 30 ~ 70 degree.
Wherein, described employing photoresist also comprises before carrying out lithography operations to the bottom surface of described transparent dielectric layer:
At the bottom surface spin coating tackifier of described transparent dielectric layer.
The beneficial effect that the technical scheme that the embodiment of the present invention provides is brought is: by the bottom surface of the substrate layer of the chip at LED and/or the upper surface attachment transparent dielectric layer of transparency conducting layer; When the emergent light of LED chip is derived from substrate layer and transparency conducting layer respectively, owing to covering the refractive index of the transparent dielectric layer of the bottom surface of substrate layer higher than substrate layer, cover the refractive index of the transparent dielectric layer of transparency conducting layer upper surface higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and transparency conducting layer, makes more emergent light import to transparent dielectric layer, thus add the transmitance of light from substrate layer and/or transparency conducting layer; Again because the transparent dielectric layer of the bottom surface covering substrate layer comprises some projections of extending from the bottom surface of substrate layer; The transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, avoid total reflection effect during outgoing, thus add the transmitance of light from transparent dielectric layer; Increase effectively the recovery rate of light in chip, and then improve the luminance of LED.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the schematic diagram of the chip of a kind of LED that the embodiment of the present invention one provides;
Fig. 2 is the schematic diagram of the chip of a kind of LED that the embodiment of the present invention one provides;
Fig. 3 is the schematic diagram of the chip of a kind of LED that the embodiment of the present invention one provides;
Fig. 4 is the schematic diagram of the protective layer that the embodiment of the present invention two provides.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.
Embodiment one
See Fig. 1 and Fig. 2, embodiments provide the chip of a kind of LED, this chip comprises: substrate layer 1, cover N-type layer 2, luminescent layer 3, P-type layer 4 and transparency conducting layer 5 on substrate layer 1 and the N electrode 6 of drawing in N-type layer 2 and P-type layer 4 respectively and P electrode 7 successively.Wherein, this chip also comprises the transparent dielectric layer of the upper surface of bottom surface and/or the transparency conducting layer 5 covering substrate layer 1.Cover the refractive index of refractive index higher than substrate layer 1 of the transparent dielectric layer of the bottom surface of substrate layer 1; Cover the refractive index of refractive index higher than transparency conducting layer 5 of the transparent dielectric layer of the upper surface of transparency conducting layer 5.
Particularly, wherein, substrate layer 1 comprises Sapphire Substrate, silicon substrate, silicon carbide substrates and gallium nitride substrate.
Wherein, the transparent dielectric layer covering the bottom surface of substrate layer 1 comprises some projections 8 of extending from the bottom surface of substrate layer 1; The transparent dielectric layer covering the upper surface of transparency conducting layer 5 comprises some projections 8 of extending from the upper surface of transparency conducting layer 5.
Particularly, the height of each projection 8 is 0.5 ~ 3 μm; The external diameter of a circle of each projection 8 is 0.5 ~ 5 μm; Spacing between adjacent protrusion 8 is 0.5 ~ 10 μm.
Show after tested, when the spacing between the constant and adjacent protrusion 8 of the external diameter of a circle when protruding 8 is constant, the height of protruding 8 is higher, and the enhancing rate of the chip brightness of LED is larger; When spacing between the constant and adjacent protrusion 8 of height when protruding 8 is constant, the external diameter of a circle of protruding 8 is larger, and the enhancing rate ratio of the chip brightness of LED is less; When the external diameter of a circle of the height constant and protruding 8 of protruding 8 is constant, the spacing between adjacent protrusion 8 is less, and the enhancing rate ratio of the chip brightness of LED is larger.
Further, the acute angle formed between the upper surface of the sidewall of each projection 8 and the bottom surface of substrate layer 1 or transparency conducting layer 5 is 30 ~ 70 degree.
Show after tested, when the spacing (such as 2 μm) between adjacent protrusion 8 is constant, the acute angle formed between the upper surface of the sidewall of each projection 8 and the bottom surface of substrate layer 1 or transparency conducting layer 5 is larger, and the enhancing rate of the chip brightness of LED is larger.When this acute angle (such as 48.3 °) is constant, the spacing between adjacent protrusion 8 is less, and the enhancing rate of the chip brightness of LED is larger.
Preferably, transparent dielectric layer is by TiO
2make.
The results showed, when transparent dielectric layer adopts TiO
2, the height of protruding 8 is 1.42 μm, and the external diameter of a circle of protruding 8 is 2.43 μm, and when the spacing between adjacent protrusion 8 is 0.57 μm, compared to the LED without transparent dielectric layer, the brightness being coated with the LED of transparent dielectric layer improves 5.67%.
Particularly, this chip also comprises passivation layer (not shown).When transparency conducting layer 5 is coated with transparent dielectric layer, this passivation layer is positioned on transparent dielectric layer.When transparency conducting layer 5 does not cover transparent dielectric layer, this passivation layer is positioned on transparency conducting layer 5.
Wherein, see Fig. 3, transparent dielectric layer is provided with the reflector 9 for improving brightness.
The beneficial effect that the said chip that the embodiment of the present invention provides is brought is: by the bottom surface of the substrate layer of the chip at LED and/or the upper surface attachment transparent dielectric layer of transparency conducting layer; When the emergent light of LED chip is derived from substrate layer and transparency conducting layer respectively, owing to covering the refractive index of the transparent dielectric layer of the bottom surface of substrate layer higher than substrate layer, cover the refractive index of the transparent dielectric layer of transparency conducting layer upper surface higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and transparency conducting layer, makes more emergent light import to transparent dielectric layer, thus add the transmitance of light from substrate layer and/or transparency conducting layer; Again because the transparent dielectric layer of the bottom surface covering substrate layer comprises some projections of extending from the bottom surface of substrate layer; The transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, avoid total reflection effect during outgoing, thus add the transmitance of light from transparent dielectric layer; Increase effectively the recovery rate of light in chip, and then improve the luminance of LED.
Embodiment two
Embodiments provide the preparation method of the chip of a kind of LED, method flow comprises:
201: substrate layer is provided, on this substrate layer, grow N-type layer, luminescent layer, P-type layer and transparency conducting layer successively.
202: prepare wafer.
Wherein, prepare wafer and comprise: respectively N electrode and P electrode are set in N-type layer and P-type layer, and deposit passivation layer over transparent conductive layer, form the transparent dielectric layer be made up higher than the transparent medium of substrate layer of refractive index in the bottom surface of substrate layer, obtain wafer.Or, form at the upper surface of transparency conducting layer the transparent dielectric layer be made up higher than the transparent medium of transparency conducting layer of refractive index, respectively N electrode and P electrode be set in N-type layer and P-type layer, and on transparent dielectric layer deposit passivation layer, obtain wafer.Or, the transparent dielectric layer be made up higher than the transparent medium of transparency conducting layer of refractive index is formed at the upper surface of transparency conducting layer, respectively N electrode and P electrode are set in N-type layer and P-type layer, and on transparent dielectric layer deposit passivation layer, form the transparent dielectric layer be made up higher than the transparent medium of substrate layer of refractive index in the bottom surface of substrate layer, obtain wafer.
Further, the transparent dielectric layer covering the bottom surface of substrate layer comprises some projections of extending from the bottom surface of substrate layer, and the transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer.
203: sliver operation is carried out to wafer, obtains chip.
The beneficial effect that the said method that the embodiment of the present invention provides brings is: by the bottom surface of the substrate layer of the chip at LED and/or the upper surface attachment transparent dielectric layer of transparency conducting layer; When the emergent light of LED chip is derived from substrate layer and transparency conducting layer respectively, owing to covering the refractive index of the transparent dielectric layer of the bottom surface of substrate layer higher than substrate layer, cover the refractive index of the transparent dielectric layer of transparency conducting layer upper surface higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and transparency conducting layer, makes more emergent light import to transparent dielectric layer, thus add the transmitance of light from substrate layer and/or transparency conducting layer; Again because the transparent dielectric layer of the bottom surface covering substrate layer comprises some projections of extending from the bottom surface of substrate layer; The transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, avoid total reflection effect during outgoing, thus add the transmitance of light from transparent dielectric layer; Increase effectively the recovery rate of light in chip, and then improve the luminance of LED.
Embodiment three
Embodiments provide the preparation method of the chip of a kind of LED, method flow comprises:
301: substrate layer is provided, on this substrate layer, grow N-type layer, luminescent layer, P-type layer and transparency conducting layer successively.
Particularly, can utilize MOCVD (Metal-organicChemicalVaporDeposition, metallo-organic compound chemical gaseous phase deposition) mode on substrate layer 31, grow N-type layer 32, luminescent layer 33, P-type layer 34 and transparency conducting layer 35 (see Fig. 4).This is well known technology, is not described in detail in this.
Wherein, substrate layer 31 can be Sapphire Substrate, silicon substrate, silicon carbide substrates and gallium nitride substrate.
In addition, N-type layer 32, luminescent layer 33 and P-type layer 34 are made by GaN.
302: respectively N electrode and P electrode are set in N-type layer and P-type layer, and deposit passivation layer over transparent conductive layer; The transparent dielectric layer be made up higher than the transparent medium of substrate layer of refractive index is formed in the bottom surface of substrate layer; Obtain wafer.
Further, this step comprises:
3021: respectively N electrode and P electrode are set in N-type layer and P-type layer, and deposit passivation layer over transparent conductive layer.
Particularly, natural daylight lithography and other existing conventional methods can be adopted to draw N electrode 36 and P electrode 37.This is well known technology, is not described in detail in this.
In addition, after deposit passivation layer, polishing grinding equipment can be utilized to carry out thinning operation to substrate layer 31.Suppose that the thickness of substrate layer 31 is the first predetermined thickness, preferably, this first predetermined thickness can be 150 μm.
Further, after completing thinning operation, wafer is positioned in resist of delustering, absolute ethyl alcohol respectively and cleans, to improve the adhesion of photoresistance.
3022: form the transparent dielectric layer be made up higher than the transparent medium of substrate layer of refractive index in the bottom surface of substrate layer.
Wherein, this transparent dielectric layer comprises some projections 38 of extending from the bottom surface of substrate layer 31.
Further, this step comprises:
3022a: form protective layer in passivation layer surface.
Particularly, see Fig. 4, this protective layer 310 is positioned at passivation layer (Fig. 4 is not shown) surface, is made up of negative light resistance agent.Wherein, suppose that the thickness of this protective layer is the second predetermined thickness.Preferably, this second predetermined thickness is 2 ~ 5 μm.In addition, protective layer 310 should use exposure machine directly expose and toast after being formed.
3022b: evaporate the transparent dielectric layer of one deck refractive index higher than substrate layer in the bottom surface of substrate layer.
Particularly, adopt the method for electron beam evaporation or thermal evaporation on substrate layer 31, evaporate the transparent dielectric layer of one deck refractive index higher than substrate layer 31.The method of electron beam evaporation or thermal evaporation is well known technology, is not described in detail in this.
Preferably, transparent dielectric layer is by TiO
2make.Suppose that the thickness of this transparent dielectric layer is the 3rd predetermined thickness.Preferably, the 3rd predetermined thickness is 0.5 ~ 3 μm.
3022c: adopt photoresist to carry out lithography operations to the bottom surface of transparent dielectric layer, to form some predetermined patterns in the bottom surface of transparent dielectric layer.
Wherein, the process sequence of lithography operations comprises spin coating operation, soft baking operation, developing procedure successively and firmly dries operation.In lithography operations, the temperature of the soft baking after spin coating operation is 100 ~ 120 degree, baking time 90 ~ 180s; After developing procedure, hard temperature of drying is 120 ~ 160 degree, baking time 60 ~ 180s.Particularly, wafer level is positioned over hot plate to toast.
Particularly, the method for natural lithography can be adopted to form some predetermined pattern profiles in the bottom surface of substrate layer 31.What deserves to be explained is, in spin coating operation, answer in the bottom surface of substrate layer 31 spin coating one deck eurymeric photoresist as photoresist.Further, in order to increase viscosity, before carrying out lithography operations, can first at the bottom surface spin coating tackifier of transparent dielectric layer.
Wherein, the external diameter of a circle of each predetermined pattern is 0.5 ~ 10 μm; Spacing between adjacent predetermined pattern is 0.5 ~ 5 μm.Like this, the size of predetermined pattern defines the size of protruding 38.
In addition, photoresist should be contrary photosensitive character with the protective layer 310 formed in step 3022a.
3022d: the predetermined pattern adopting the bottom surface of etching machine etching transparent dielectric layer, makes the transparent dielectric layer after etching comprise some separate projections of extending from the bottom surface of substrate layer.
Wherein, with the 3rd predetermined thickness for etching depth etches.Because the 3rd predetermined thickness is 0.5 ~ 3 μm, so etching depth is 0.5 ~ 3 μm.
Particularly, wafer is positioned over and has in the ICP etching machine of refrigerating function, utilize Bcl3 gas to etch.Etching machine substrate bias power is 400 ~ 500W, and etching machine power is 1000 ~ 1500W, and etching temperature is 0 degree; BCL3:60sccm; O2:20sccm; Etch period 700s.
3022e: the residual photoresist after etching and protective layer are removed in cleaning.
Particularly, high temperature descum agent is used to remove the rear cull of etching and protective layer 310.
303: be the evaporation reflector, bottom surface of wafer.
Wherein, this reflector (not shown in Fig. 4) comprises the metal of multilayer and the metal membrane structure of nonmetal oxide membrane structure and single or multiple lift.
304: sliver operation is carried out to wafer, obtains chip.
Particularly, utilize the mode of mechanical sliver or laser sliver that wafer is divided into one single chip.This is well known technology, is not described in detail in this.
The beneficial effect that the said method that the embodiment of the present invention provides brings is: by the bottom surface of the substrate layer of the chip at LED and/or the upper surface attachment transparent dielectric layer of transparency conducting layer; When the emergent light of LED chip is derived from substrate layer and transparency conducting layer respectively, owing to covering the refractive index of the transparent dielectric layer of the bottom surface of substrate layer higher than substrate layer, cover the refractive index of the transparent dielectric layer of transparency conducting layer upper surface higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and transparency conducting layer, makes more emergent light import to transparent dielectric layer, thus add the transmitance of light from substrate layer and/or transparency conducting layer; Again because the transparent dielectric layer of the bottom surface covering substrate layer comprises some projections of extending from the bottom surface of substrate layer; The transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, avoid total reflection effect during outgoing, thus add the transmitance of light from transparent dielectric layer; Increase effectively the recovery rate of light in chip, and then improve the luminance of LED.
Embodiment four
Embodiments provide the preparation method of the chip of a kind of LED, method flow comprises:
401: substrate layer is provided, on substrate layer, grow N-type layer, luminescent layer, P-type layer and transparency conducting layer successively.
Wherein, this step, with in the embodiment of the present invention three 301, is not described in detail in this.
402: form at the upper surface of transparency conducting layer the transparent dielectric layer be made up higher than the transparent medium of transparency conducting layer of refractive index; Respectively N electrode and P electrode are set in N-type layer and P-type layer; And on transparent dielectric layer deposit passivation layer; Obtain wafer.
Further, this step comprises:
4021: form at the upper surface of transparency conducting layer the transparent dielectric layer be made up higher than the transparent medium of transparency conducting layer of refractive index.
Wherein, this transparent dielectric layer comprises some projections of extending from the upper surface of transparency conducting layer.
Particularly, this step comprises:
4021a: evaporate the transparent dielectric layer of one deck refractive index higher than transparency conducting layer at the upper surface of transparency conducting layer.
Particularly, this step, with 3022b in the embodiment of the present invention three, is not described in detail in this.
4021b: at the upper surface spin coating tackifier of transparent dielectric layer.
Particularly, after completing spin coating, need toast wafer, bake out temperature is not less than 100 degree.
4021c: adopt photoresist to carry out lithography operations to the upper surface of transparent dielectric layer, to form some predetermined patterns at the upper surface of transparent dielectric layer.
Particularly, this step, with 3022c in the embodiment of the present invention three, is not described in detail in this.
4021d: the predetermined pattern adopting the upper surface of etching machine etching transparent dielectric layer, makes the transparent dielectric layer after etching comprise some separate projections of extending from the upper surface of transparency conducting layer.
Wherein, suppose that etching depth is the 3rd predetermined thickness.Preferably, the 3rd predetermined thickness is 0.5 ~ 3 μm.
Particularly, wafer is positioned over and has in the ICP etching machine of refrigerating function, utilize CF4/BCl3 gas to etch.Etching machine substrate bias power is 200 ~ 400W, and etching machine power is 500 ~ 1000W, and etching temperature is 0 degree; BCL3:6sccm; CF4:60sccm; Etch period 600s.
4021e: the residual photoresist after etching is removed in cleaning, and carries out N district etching.
Particularly, high temperature descum agent is used to remove post-etch residue photoresist.
4022: respectively N electrode and P electrode are set in N-type layer and P-type layer, and on transparent dielectric layer deposit passivation layer.
Particularly, this step, with in the embodiment of the present invention three 3021, is not described in detail in this.
403: be the evaporation reflector, bottom surface of wafer.
Wherein, this step, with in the embodiment of the present invention three 303, is not described in detail in this.
404: sliver operation is carried out to wafer, obtains chip.
Wherein, this step, with in the embodiment of the present invention three 304, is not described in detail in this.
The beneficial effect that the said method that the embodiment of the present invention provides brings is: by the bottom surface of the substrate layer of the chip at LED and/or the upper surface attachment transparent dielectric layer of transparency conducting layer; When the emergent light of LED chip is derived from substrate layer and transparency conducting layer respectively, owing to covering the refractive index of the transparent dielectric layer of the bottom surface of substrate layer higher than substrate layer, cover the refractive index of the transparent dielectric layer of transparency conducting layer upper surface higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and transparency conducting layer, makes more emergent light import to transparent dielectric layer, thus add the transmitance of light from substrate layer and/or transparency conducting layer; Again because the transparent dielectric layer of the bottom surface covering substrate layer comprises some projections of extending from the bottom surface of substrate layer; The transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, avoid total reflection effect during outgoing, thus add the transmitance of light from transparent dielectric layer; Increase effectively the recovery rate of light in chip, and then improve the luminance of LED.
Embodiment five
Embodiments provide the preparation method of the chip of a kind of LED, method flow comprises:
501: substrate layer is provided, on substrate layer, grow N-type layer, luminescent layer, P-type layer and transparency conducting layer successively.
Wherein, this step, with in the embodiment of the present invention four 401, is not described in detail in this.
502: form at the upper surface of transparency conducting layer the transparent dielectric layer be made up higher than the transparent medium of transparency conducting layer of refractive index; Etching N electrode and P electrode in N-type layer and P-type layer respectively; And on transparent dielectric layer deposit passivation layer; Obtain wafer.
Further, this step comprises:
5021: form at the upper surface of transparency conducting layer the transparent dielectric layer be made up higher than the transparent medium of transparency conducting layer of refractive index.
Wherein, this transparent dielectric layer comprises some projections of extending from the upper surface of transparency conducting layer.
Particularly, this step comprises:
5021a: evaporate the transparent dielectric layer of one deck refractive index higher than transparency conducting layer at the upper surface of transparency conducting layer.
Particularly, this step, with 4021a in the embodiment of the present invention four, is not described in detail in this.
5021b: at the upper surface deposition SiO of transparent dielectric layer
2layer.
Wherein, SiO is supposed
2the thickness of layer is the 4th predetermined thickness.Preferably, the 4th predetermined thickness is 0.5 ~ 1 μm.Particularly, PECVD can be utilized to deposit the SiO of the 4th predetermined thickness
2layer.Depositing temperature is 200 ~ 300 degree.
5021c: at SiO
2the upper surface spin coating tackifier of layer.
Particularly, after completing spin coating, need toast wafer, bake out temperature is not less than 100 degree.
5021d: adopt photoresist to SiO
2the upper surface of layer carries out lithography operations, with at SiO
2the upper surface of layer forms some predetermined patterns.
Particularly, this step, with 4021c in the embodiment of the present invention four, is not described in detail in this.
5021e: adopt etching machine etching SiO
2the predetermined pattern of the upper surface of layer, obtains the SiO after etching
2layer.
Particularly, with above-mentioned 4th predetermined thickness for etching depth etches.This step, with 4021d in the embodiment of the present invention four, is not described in detail in this.
5021f: the residual photoresist after etching is removed in cleaning, with the SiO after etching
2layer is mask body, carries out high temperature corrosion, make the transparent dielectric layer after corrosion comprise some separate projections of extending from the upper surface of transparency conducting layer to transparent dielectric layer.
Wherein, high-temperature sulfuric acid (180 degree ~ 260 degree) or other corresponding acid solutions can be adopted to corrode transparent dielectric layer, to form required projection.Corrosion depth is aforementioned 3rd predetermined thickness.The temperature of the degree of depth by acid solution, acid solution of corrosion and the Time dependent of corrosion.Such as, the disk at chip place is positioned in the concentrated sulfuric acid of 260 degree and corrodes 5min.
5021g: remove the SiO after etching
2layer, and carry out N district etching.
Particularly, hydrofluoric acid or other acid solutions can be used SiO
2layer is removed.Such as, the disk after etching is positioned over 2min in HF acid (5% concentration), SiO2 layer can be removed.
5022: etching N electrode and P electrode in N-type layer and P-type layer respectively, and on transparent dielectric layer deposit passivation layer.
Particularly, this step, with in the embodiment of the present invention four 4022, is not described in detail in this.
503: be the evaporation reflector, bottom surface of wafer.
Wherein, this step, with in the embodiment of the present invention four 403, is not described in detail in this.
504: sliver operation is carried out to wafer, obtains chip.
Wherein, this step, with in the embodiment of the present invention four 404, is not described in detail in this.
The beneficial effect that the said method that the embodiment of the present invention provides brings is: by the bottom surface of the substrate layer of the chip at LED and/or the upper surface attachment transparent dielectric layer of transparency conducting layer; When the emergent light of LED chip is derived from substrate layer and transparency conducting layer respectively, owing to covering the refractive index of the transparent dielectric layer of the bottom surface of substrate layer higher than substrate layer, cover the refractive index of the transparent dielectric layer of transparency conducting layer upper surface higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and transparency conducting layer, makes more emergent light import to transparent dielectric layer, thus add the transmitance of light from substrate layer and/or transparency conducting layer; Again because the transparent dielectric layer of the bottom surface covering substrate layer comprises some projections of extending from the bottom surface of substrate layer; The transparent dielectric layer covering the upper surface of transparency conducting layer comprises some projections of extending from the upper surface of transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, avoid total reflection effect during outgoing, thus add the transmitance of light from transparent dielectric layer; Increase effectively the recovery rate of light in chip, and then improve the luminance of LED.
The invention described above embodiment sequence number, just to describing, does not represent the quality of embodiment.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (4)
1. a preparation method for the chip of light-emitting diode, is characterized in that, described method comprises:
Step 1, provide substrate layer, and on described substrate layer, grow N-type layer, luminescent layer, P-type layer and transparency conducting layer successively;
Step 2, prepare wafer;
Step 3, sliver operation is carried out to described wafer, obtain chip;
Wherein, describedly prepare wafer, comprising:
The transparent dielectric layer be made up higher than the transparent medium of described transparency conducting layer of refractive index is formed at the upper surface of described transparency conducting layer, respectively N electrode and P electrode are set in described N-type layer and described P-type layer, and on described transparent dielectric layer deposit passivation layer, obtain wafer; Or
The transparent dielectric layer be made up higher than the transparent medium of described transparency conducting layer of refractive index is formed at the upper surface of described transparency conducting layer, respectively N electrode and P electrode are set in described N-type layer and described P-type layer, and on described transparent dielectric layer deposit passivation layer, form the transparent dielectric layer be made up higher than the transparent medium of described substrate layer of refractive index in the bottom surface of described substrate layer, obtain wafer;
Wherein, the described transparent dielectric layer covering the bottom surface of described substrate layer comprises some projections of extending from the bottom surface of described substrate layer, and the transparent dielectric layer covering the upper surface of described transparency conducting layer comprises some projections of extending from the upper surface of described transparency conducting layer;
Wherein, the described upper surface at described transparency conducting layer forms the transparent dielectric layer be made up higher than the transparent medium of described transparency conducting layer of refractive index, comprising:
The transparent dielectric layer of one deck refractive index higher than described transparency conducting layer is evaporated at the upper surface of described transparency conducting layer;
At the upper surface deposition SiO of described transparent dielectric layer
2layer;
Adopt photoresist to described SiO
2the upper surface of layer carries out lithography operations, with at described SiO
2the upper surface of layer forms some predetermined patterns;
Etching machine is adopted to etch described SiO
2the described predetermined pattern of the upper surface of layer, obtains the SiO after etching
2layer;
The residual photoresist after etching is removed in cleaning, with the SiO after etching
2layer is mask body, carries out high temperature corrosion, make the described transparent dielectric layer after corrosion comprise some separate projections of extending from the upper surface of described transparency conducting layer to described transparent dielectric layer;
Remove the SiO after etching
2layer, and carry out N district etching;
Wherein, the thickness of described transparent dielectric layer is 0.5 ~ 3 μm, the external diameter of a circle of predetermined pattern described in each is 0.5 ~ 10 μm, spacing between adjacent described predetermined pattern is 0.5 ~ 5 μm, to make described protruding height described in each be 0.5 ~ 3 μm, external diameter of a circle protruding described in each is 0.5 ~ 5 μm, and the spacing between adjacent described projection is 0.5 ~ 10 μm.
2. method according to claim 1, is characterized in that, the described bottom surface at described substrate layer forms the transparent dielectric layer be made up higher than the transparent medium of described substrate layer of refractive index, comprising:
Protective layer is formed in described passivation layer surface;
The transparent dielectric layer of one deck refractive index higher than described substrate layer is evaporated in the bottom surface of described substrate layer;
Photoresist is adopted to carry out lithography operations to the bottom surface of described transparent dielectric layer, to form some predetermined patterns in the bottom surface of described transparent dielectric layer;
Adopt etching machine to etch the described predetermined pattern of the bottom surface of described transparent dielectric layer, make the described transparent dielectric layer after etching comprise some separate projections of extending from the bottom surface of described substrate layer;
The residual photoresist after etching and described protective layer are removed in cleaning.
3. method according to claim 2, is characterized in that, described employing photoresist also comprises before carrying out lithography operations to the bottom surface of described transparent dielectric layer:
At the bottom surface spin coating tackifier of described transparent dielectric layer.
4. according to the method in claim 2 or 3, it is characterized in that, the process sequence of described lithography operations comprises spin coating operation, soft baking operation, developing procedure successively and firmly dries operation, and the temperature of described soft baking is 100 ~ 120 degree, baking time 90 ~ 180s; The temperature of described hard baking is 120 ~ 160 degree, baking time 60 ~ 180s; To make described in each the acute angle formed between protruding sidewall and the bottom surface of described substrate layer or the upper surface of described transparency conducting layer be 30 ~ 70 degree.
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