CN103035578A - 形成具有较大载体的重构晶片的半导体器件和方法 - Google Patents
形成具有较大载体的重构晶片的半导体器件和方法 Download PDFInfo
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- CN103035578A CN103035578A CN201210368222XA CN201210368222A CN103035578A CN 103035578 A CN103035578 A CN 103035578A CN 201210368222X A CN201210368222X A CN 201210368222XA CN 201210368222 A CN201210368222 A CN 201210368222A CN 103035578 A CN103035578 A CN 103035578A
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (15)
Applications Claiming Priority (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161544248P | 2011-10-06 | 2011-10-06 | |
US61/544,248 | 2011-10-06 | ||
US61/544248 | 2011-10-06 | ||
US13/295843 | 2011-11-14 | ||
US13/295,843 | 2011-11-14 | ||
US13/295,843 US8513098B2 (en) | 2011-10-06 | 2011-11-14 | Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more eWLB packages per wafer with encapsulant deposited under temperature and pressure |
US13/366,008 | 2012-02-03 | ||
US13/366,008 US8524577B2 (en) | 2011-10-06 | 2012-02-03 | Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more eWLB packages per wafer with encapsulant deposited under temperature and pressure |
US13/366008 | 2012-02-03 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103035578A true CN103035578A (zh) | 2013-04-10 |
CN103035578B CN103035578B (zh) | 2017-08-18 |
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Application Number | Title | Priority Date | Filing Date |
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CN201210368222.XA Active CN103035578B (zh) | 2011-10-06 | 2012-09-28 | 形成具有较大载体的重构晶片的半导体器件和方法 |
Country Status (1)
Country | Link |
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CN (1) | CN103035578B (zh) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103915353A (zh) * | 2013-01-03 | 2014-07-09 | 新科金朋有限公司 | 半导体器件以及使用标准化载体形成嵌入式晶片级芯片尺寸封装的方法 |
CN104701195A (zh) * | 2013-11-02 | 2015-06-10 | 新科金朋有限公司 | 半导体器件及形成嵌入式晶片级芯片规模封装的方法 |
CN106935556A (zh) * | 2015-12-31 | 2017-07-07 | 三星电子株式会社 | 半导体封装件及其制造方法 |
US11011423B2 (en) | 2012-10-02 | 2021-05-18 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of using a standardized carrier in semiconductor packaging |
US11222793B2 (en) | 2012-10-02 | 2022-01-11 | STATS ChipPAC Pte. Ltd. | Semiconductor device with encapsulant deposited along sides and surface edge of semiconductor die in embedded WLCSP |
US11488933B2 (en) | 2013-01-03 | 2022-11-01 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming embedded wafer level chip scale packages |
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CN1438686A (zh) * | 2002-02-15 | 2003-08-27 | 恩益禧电子股份有限公司 | 半导体器件及其制造方法 |
US20080241998A1 (en) * | 2007-03-30 | 2008-10-02 | Motorola, Inc. | Method for fabricating a low cost integrated circuit (ic) package |
US20080254575A1 (en) * | 2007-04-10 | 2008-10-16 | Infineon Technologies Ag | Encapsulation method and apparatus |
US20110049694A1 (en) * | 2009-08-26 | 2011-03-03 | Qualcomm Incorporated | Semiconductor Wafer-To-Wafer Bonding For Dissimilar Semiconductor Dies And/Or Wafers |
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2012
- 2012-09-28 CN CN201210368222.XA patent/CN103035578B/zh active Active
Patent Citations (4)
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CN1438686A (zh) * | 2002-02-15 | 2003-08-27 | 恩益禧电子股份有限公司 | 半导体器件及其制造方法 |
US20080241998A1 (en) * | 2007-03-30 | 2008-10-02 | Motorola, Inc. | Method for fabricating a low cost integrated circuit (ic) package |
US20080254575A1 (en) * | 2007-04-10 | 2008-10-16 | Infineon Technologies Ag | Encapsulation method and apparatus |
US20110049694A1 (en) * | 2009-08-26 | 2011-03-03 | Qualcomm Incorporated | Semiconductor Wafer-To-Wafer Bonding For Dissimilar Semiconductor Dies And/Or Wafers |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11011423B2 (en) | 2012-10-02 | 2021-05-18 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of using a standardized carrier in semiconductor packaging |
US11222793B2 (en) | 2012-10-02 | 2022-01-11 | STATS ChipPAC Pte. Ltd. | Semiconductor device with encapsulant deposited along sides and surface edge of semiconductor die in embedded WLCSP |
US11961764B2 (en) | 2012-10-02 | 2024-04-16 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of making a wafer-level chip-scale package |
CN103915353A (zh) * | 2013-01-03 | 2014-07-09 | 新科金朋有限公司 | 半导体器件以及使用标准化载体形成嵌入式晶片级芯片尺寸封装的方法 |
US11488932B2 (en) | 2013-01-03 | 2022-11-01 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages |
US11488933B2 (en) | 2013-01-03 | 2022-11-01 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming embedded wafer level chip scale packages |
CN104701195A (zh) * | 2013-11-02 | 2015-06-10 | 新科金朋有限公司 | 半导体器件及形成嵌入式晶片级芯片规模封装的方法 |
CN104701195B (zh) * | 2013-11-02 | 2019-11-29 | 新科金朋有限公司 | 半导体器件及形成嵌入式晶片级芯片规模封装的方法 |
CN106935556A (zh) * | 2015-12-31 | 2017-07-07 | 三星电子株式会社 | 半导体封装件及其制造方法 |
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