CN102930899A - Erasing method and apparatus for nonvolatile memory - Google Patents
Erasing method and apparatus for nonvolatile memory Download PDFInfo
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Abstract
The present invention discloses an erasing method and an apparatus for a nonvolatile memory. The method comprises: determining two sectors requiring erasing in a nonvolatile memory, wherein the two sectors are positioned in the same storage block; and erasing the two sectors in parallel. With the present invention, an erasing operation time can be saved, and erasing speed and erasing efficiency can be improved.
Description
The application is that application number is 200910077696.7, and the applying date is on February 11st, 2009, and denomination of invention is the dividing an application of patented claim of a kind of method for deleting of nonvolatile memory and device.
Technical field
The application relates to the semiconductor memory technologies field, particularly relates to a kind of method for deleting of Nonvolatile memory device, and a kind of erasing apparatus of Nonvolatile memory device.
Background technology
Along with developing rapidly and widespread use of various electronic installations and embedded system, such as computing machine, personal digital assistant, mobile phone, digital camera etc., need in a large number a kind of can repeatedly the programming, capacity is large, read and write, wipe quick and easy, simple, peripheral components is few, the memory device of cheap non-volatile (still can keep under powering-off state store data message).Nonvolatile semiconductor memory member arises at the historic moment under this background demand.A nonvolatile memory also is a metal-oxide-semiconductor usually, has a source electrode (source), a drain electrode (drain), and a gate pole (gate) also has a floating grid (floating gate) in addition.As seen, its structure is slightly different with general metal-oxide-semiconductor, many floating grids, and this floating grid insulated body isolates from other parts.
Take flash memory (Flash Memory) as example, it is a kind of storer of based semiconductor, have and still can keep internal information, the functional characteristics such as online erasable behind the system power failure, the method for deleting of flash memory is to add positive voltage at source electrode, utilize the tunnel effect between floating grid and the source electrode, the negative charge that is injected into floating grid is attracted source electrode.Owing to utilizing source electrode to add positive voltage to wipe, so the source electrode of each unit is linked togather, and like this, flash memory can not be by byte-erase, and can only wipe with the form of full sheet (Flash chip) or piecemeal (block).
Comprising several storage blocks (block) in the flash memory, in the prior art, when whole Flashchip is carried out erase operation, is to wipe one by one take block as unit.For example, certain Flash comprises A, B, three block of C, and the erase operation of finishing whole Flash chip then needs first Ablock to be wiped, and then B block is wiped, and at last C block is wiped.And, this wiping for each storage unit (cell) carried out, the step of namely need to carry out pre-programmed (pre-program) for each cell among the block, wiping (erase) and software programming (post-program) etc. just can be achieved, and obvious this erase mode relatively expends time in.Moreover, since in the reality in flash memory included storage block more, the capacity of flash memory is increasing, and for reducing the erasable number of times of Flash, prior art also more and more trends towards adopting less storage block to be used as erase unit, in this case, storage block in flash memory will be more, adopt this mode of wiping one by one take block as unit that whole Flash chip is wiped, and will be not only consuming time, and speed is slower, and efficiency of erasing is comparatively low.
Therefore, need at present the urgent technical matters that solves of those skilled in the art to be exactly: how can propose a kind of erase mechanism of nonvolatile memory with innovating, carry out the time of erase operation in order to saving, improve erasing speed and efficient.
Summary of the invention
The application's technical matters to be solved provides a kind of method for deleting of Nonvolatile memory device, carries out the time of erase operation in order to saving, improves erasing speed and efficient.
The application's another technical matters to be solved provides a kind of erasing apparatus of Nonvolatile memory device, in order to guarantee said method application in practice.
In order to solve the problems of the technologies described above, the embodiment of the present application discloses a kind of method for deleting of Nonvolatile memory device, comprising:
Determine two sectors of wanting in the nonvolatile memory to wipe, described two sectors are arranged in same storage block;
Described two sectors of parallel erase.
Preferably, the step of two sectors of described parallel erase comprises:
Described two sectors are carried out the pre-programmed operation concurrently;
Described two sectors are carried out erase operation concurrently;
Verify serially for each sector and to wipe whether success, if not, then re-start erase operation to wiping unsuccessful sector;
After described two sector erasing success, concurrently soft programming operation is carried out in described two sectors.
Preferably, described pre-programmed operation further comprises:
Identify the storage unit that needs to carry out the pre-programmed operation in described two sectors;
Carry out the pre-programmed operation for described storage unit;
Described soft programming operation further comprises:
Identify the storage unit that needs to carry out the soft programming operation in described two sectors;
Carry out the soft programming operation for described storage unit.
Preferably, two sectors in the described same storage block are two adjacent sectors in the same storage block.
The embodiment of the present application also discloses a kind of erasing apparatus of nonvolatile memory, comprising:
The internal electric source module is used for carrying out gating control and the mode of operation control of two sectors;
The sector determination module is used for two sectors that definite nonvolatile memory is wanted to wipe, and described two sectors are arranged in same storage block;
The sector erasing module is used for described two sectors of parallel erase.
Preferably, described sector erasing module comprises:
Sector pre-programmed submodule is used for described two sectors are carried out the pre-programmed operation concurrently;
The sector erasing submodule is used for described two sectors are carried out erase operation concurrently;
Successfully whether sector erasing checking submodule wiped for verifying serially for each sector, if then, then triggers sector soft programming submodule; If not, then trigger the sector and again wipe submodule;
The sector is wiped submodule again, is used for re-starting erase operation to wiping unsuccessful sector;
Sector soft programming submodule is used for after described two sector erasing success concurrently soft programming operation being carried out in described two sectors.
Preferably, described sector pre-programmed submodule further comprises:
The pre-programmed detecting unit is used for identifying the storage unit that described two sectors need to carry out the pre-programmed operation;
The pre-programmed operating unit is used for carrying out the pre-programmed operation for described storage unit;
Described soft programming operation further comprises:
The soft programming detecting unit is used for identifying the storage unit that described two sectors need to carry out the soft programming operation;
Carry out the soft programming operation for described storage unit.
Preferably, two sectors in the described same storage block are two adjacent sectors in the same storage block.
Compared with prior art, the application has the following advantages:
One of core idea of the embodiment of the present application is, adopt a kind of mode for two sector parallel work-flows in the storage block to wipe fast whole storer, by two sectors that are arranged in same storage block are carried out erase operation simultaneously, thereby save the erasing time of storage block, and further save the time that full sheet is wiped.
And when the present embodiment was wiped two sectors simultaneously, need not to increase erasing voltage can realize.
Description of drawings
Fig. 1 is the process flow diagram of method for deleting embodiment of a kind of nonvolatile memory of the application;
Fig. 2 is the process flow diagram of two sectors of parallel erase in the application's the method for deleting of nonvolatile memory;
Fig. 3 is the structured flowchart of erasing apparatus embodiment of a kind of nonvolatile memory of the application.
Embodiment
For above-mentioned purpose, the feature and advantage that make the application can become apparent more, below in conjunction with the drawings and specific embodiments the application is described in further detail.
For making those skilled in the art understand better the application, at first simply introduce the principle of work of several nonvolatile memorys.
Typical nonvolatile memory comprises EPROM (Erarable Programmable Read only Memory), EEPROM (eeprom) and FLASH MEMORY (flash memory).EPROM refers to that content wherein can wipe by any special measures, then again writes.Its basic unit of storage cell circuit often adopts the pouring-in MOS circuit of floating grid snowslide, referred to as FAMOS.It is similar to the MOS circuit, is the p type island region that grows two high concentrations at the N-type substrate, draws respectively source S and drain D by Ohmic contact.Between source electrode and drain electrode, there is a polysilicon gate floating empty in the SiO2 insulation course, and all around without direct electric the connection.Sort circuit represents to deposit 1 or 0 so that floating grid is whether charged, after floating grid is charged (such as negative charge), just in its lower section, induces positive conducting channel between source electrode and the drain electrode, makes the metal-oxide-semiconductor conducting, i.e. expression deposits 0 in.If floating grid is not charged, then do not form conducting channel, not conducting of metal-oxide-semiconductor namely deposits 1 in.
EEPROM basic unit of storage cell is similar to EPROM, and it is floating grid of regeneration on the floating grid of EPROM basic element circuit, and the former is called first order floating grid, and the latter is called second level floating grid.Draw an electrode can for second level floating grid, make second level floating grid meet a certain voltage VG.If VG is positive voltage, produce tunnel effect between the first floating grid and the drain electrode, make electronic injection the first floating grid, i.e. programming writes.If making VG is negative voltage, the electronics of first order floating grid will scatter and disappear, and namely wipe.Can again write after wiping.
Basic element circuit and the EEPROM of flash memory are similar, also be comprised of double-deck floating grid metal-oxide-semiconductor, but the ground floor gate medium are very thin, as tunnel oxidation layer, draw an electrode can for second level floating grid, make second level floating grid meet a certain voltage VG.If VG is positive voltage, produce tunnel effect between the first floating grid and the drain electrode, make electronic injection the first floating grid, i.e. programming writes; Method for deleting is to add positive voltage at source electrode, utilizes the tunnel effect between first order floating grid and the source electrode, and the negative charge that is injected into floating grid is attracted source electrode.Owing to utilizing source electrode to add positive voltage to wipe, so the source electrode of each unit is linked togather, so flash memory can not be by byte-erase, and can only minute sector, piecemeal or full sheet wipe.Improvement along with semiconductor technology, flash memory has also been realized the design of single-transistor (1T), main is exactly to have added floating gate and selected grid at original transistor, and the semiconductor of the unidirectional conduction of electric current forms the unsteady canopy of storing electronics between source electrode and drain electrode.Floating gate is wrapped in one deck silicon oxide layer insulator.It is the selection/control gate of control conduction current between source electrode and drain electrode above it.Data are 0 or 1 to depend on whether electronics is arranged in the floating gate that silicon base plate forms.It is 0 that electronics is arranged, and is 1 without electronics.
With reference to figure 1, show the process flow diagram of method for deleting embodiment 1 of a kind of nonvolatile memory of the application, specifically can may further comprise the steps:
In nonvolatile memory, the minimum unit of general programming is page or leaf (page), the minimum unit of wiping is piece (block), for simplified control circuit, it is larger that general storage block (block) is all done, but in a lot of the utilization, may not need to rewrite so much data, namely do not need to wipe whole storage block, a part that so just can erase block is called sector (sector).Carry out the method for erase operation for a sector, same erase operation has different place.In the piece storage area, the P trap of all storage unit (P substrate) links to each other, and when sector 1 is wiped, wipes the voltage that the P trap is applied and also is added to simultaneously other sectors.That is to say, to a memory block erasing, the erasing voltage that applies when wiping all is the same to whole, and concerning a sector erasing, different to the voltage conditions that needs erase area and non-erase area to apply.
Below further specify the application in flash memory, to be erased to example.
The write operation of flash memory can only be carried out in sky or the unit of having wiped, so in most cases, must carry out first before carrying out write operation and wipe (erase) operation.Flash memory is comprised of the storage block with a plurality of sectors (block), each sector (sector) corresponding storage unit (cell) array.Flash memory can only carry out limited number of time ground write operation and erase operation, and can only in the sector that is wiped free of in advance, carry out write operation for storage unit, and can only in large storage block, carry out erase operation, therefore, write operation and erase operation need to spend the more time than read operation.
The write operation of flash memory cell is called programming (program), the mode that generally can use thermoelectron to inject makes electronics pass raceway groove to reach on floating grid (Floating Gate) FG, cause threshold voltage (VT) to rise, when this operation occurs, storage unit is in closed condition, can not conduction current, institute is so that storage unit changes to the write operation state from a neutral condition (erase status), and namely the data from storage unit change to " 0 " from " 1 ".Erase operation is based on tunnel effect, makes electronics arrive the P trap from floating grid FG.Data in the storage unit change to " 1 " from " 0 " again like this.
Particularly, a storage unit in the flash memory is in order to record the data of bit.Storage unit can comprise control grid (Control Gate) CG, floating grid (Floating Gate) FG, source S and drain D.The data of storage unit be with the quantity of electric charge stored among the floating grid FG what and decide: a large amount of electronics of storage in floating grid FG, need to control high-tension threshold voltage of grid CG this moment, for example be greater than 5V, just can make source S and the drain D conducting of this storage unit, General Definition data at this moment are 0; Store a small amount of electronics in floating grid FG, only need to control the threshold voltage of a low-voltage of grid CG this moment, for example is less than 3.2V, can make source S and the drain D conducting of this storage unit, and General Definition data at this moment are l.
A plurality of storage unit are linked together can form memory cell array as a sector, and its concrete connected mode is that the row of memory cell array are connecting the drain electrode of each storage unit, are called as bit line; And the row of array is connecting the grid of each unit, is called as the word line; When storer is entered write operation, need simultaneously at bit line and word line on-load voltage.
A P trap as source electrode (P substrate) is shared in all sectors in storage block, carries out for storage block so wipe (erase) operation.When carrying out erase operation, an erasing voltage is applied to the P trap of selected storage block, and applies 0V voltage to the word line of selected storage block, and the word line of selected storage block is not floated.For selected storage block, the electric field that the erasing voltage that applies forms has caused a potential barrier, and it provides a path that is arrived the P trap by floating grid for the electronics in its floating grid, thereby changes the logic state in the selected storage block.And for not selected storage block, the current potential of its word line raises by capacitive coupling, therefore can not be wiped free of.
One of core idea of the embodiment of the present application is, adopt a kind of mode for two sector parallel work-flows in the storage block to wipe fast whole storer, by two sectors that are arranged in same storage block are carried out erase operation simultaneously, thereby save the erasing time of storage block, and further save the time that full sheet is wiped.
In specific implementation, the wiping of flash memory/write operation can write specific instruction sequence to specific address by command user interface (CUI), after flash memory is deciphered instruction, start internal state machine (WSM) and carry out corresponding operating, thereby make it automatically finish the function that instruction sequence requires.Use the embodiment of the present application, by send the erasing instruction of pointing to the MBA memory block address of wanting to wipe to flash memory, storer receives the laggard row decoding of this instruction, the position of the definite storage block that need to wipe, and the startup internal state machine, this storage block is carried out erase operation.
Because a storage block is comprised of a plurality of sectors, each sector (sector) corresponding storage unit (cell) array.The row of this memory cell array are connecting the drain electrode of each storage unit, are called as bit line; And the row of array is connecting the grid of each unit, is called as the word line; When storer is entered write operation, need the while at bit line and word line on-load voltage, this write operation can only be carried out for storage unit in the sector that is wiped free of in advance; A P trap as source electrode (P substrate) is shared in all sectors in storage block, carries out for storage block so wipe (erase) operation.When carrying out erase operation, an erasing voltage is applied to the P trap of selected storage block, and the malleation that the P trap adds can be added on all interior sectors of storage block.Thereby when the present embodiment was wiped two sectors simultaneously, need not to increase erasing voltage can realize.
In the embodiment of the present application, for improving efficiency of erasing, two sectors in the described same storage block are preferably adjacent sectors.
With reference to the operational flowchart of two sectors of parallel erase shown in Figure 2, in the present embodiment, described step 102 can comprise following substep:
The operation of described pre-programmed is to write 0 for the storage unit in each sector in each storage block, the stability of wiping with raising.A kind of with storage unit write 0 method can for: control grid one high voltage, such as 10V, and the voltage that injects 6V to drain D, inject about 0V voltage to source S, thereby make a large amount of electronic injection floating grid FG, threshold voltage is risen.
Preferably, in the present embodiment, this step can also may further comprise the steps:
Identify the storage unit that needs to carry out the pre-programmed operation in described two sectors;
Carry out the pre-programmed operation for described storage unit.
Be understandable that, in practice, for the storage unit in the sector, be not that each must carry out the pre-programmed operation, be that data in some storage unit were exactly " 0 " originally, just can unnecessaryly carry out the pre-programmed operation for this part storage unit so; And the storage unit of only needs being carried out the pre-programmed operation is carried out the pre-programmed operation such as data for the storage unit of " 1 " and is got final product.
Described erase operation refers to the storage unit in the sector is write 1.A kind ofly storage unit is write 1 method be: control grid CG one negative voltage, for example be-11 volts, and give 3 volts voltage to source S, so can take out the electronics among the floating grid FG, data in the storage unit change to " 1 " from " 0 " again, and threshold voltage is reduced.
In practice, after operation to be erased is finished, just enter the erase verification state.In this process, verify first first sector, treat that the checking of first sector is finished after, begin to verify second sector.If find to also have certain sector not wipe successfully by erase verification, then add erasing voltage to it again, re-start erase operation.For wiping successful sector, ability jump procedure 205.
Described checking wipes whether successful method is in different operating process, uses different reference voltages and threshold voltage to go the data of storing in the read memory cell.When the grid that some threshold voltages is added to storage unit, the current conversion in the drain electrode is voltage after, compare with reference voltage, judgement is " 1 " or " 0 ", is determined to wipe successfully or unsuccessfully by judged result.
Below further specify the process of the application's erase verification as example take the read operation of a kind of MLC Flash Memory (multi-layered unit flash memory).
In MLC Flash Memory, a storage unit (cell) comprises two transistors and two electric capacity, with storage one of four states, two bits.MLC Flash Memory is carried out read operation roughly can comprise following three steps:
The first step, apply identical cut-in voltage Vwl at the word line WL of storage cell array with grid (gate) with reference to cell, keep close voltage at the bit line (BL) of storage cell array with reference to the drain electrode (drain) of cell, such as 1v.When beginning during reading out data, transistor is opened, and because array cell is different with the state of charge with reference to cell, thereby can cause the electric current difference that produces;
Second step, with above-mentioned array cell with reference to the electric current of cell respectively by custom-designed I-V (current-voltage) change-over circuit (being about to different electric currents by identical impedance device), obtain different magnitudes of voltage, thereby current difference is transformed for voltage differences;
For example, for the storage unit of MLC Flash Memory, just need four I-V (current-voltage) change-over circuit, the corresponding array cell of I-V change-over circuit, obtain the corresponding magnitude of voltage of required storage unit, other three I-V change-over circuit correspondences obtain three reference voltages with reference to cell.
The 3rd step, by comparer two voltage signals relatively, can obtain storing the status information of data, be converted into again digital signal, as, 00,01,10,11.
For example, the corresponding magnitude of voltage of required storage unit is compared in twos with three reference voltages respectively, thereby can determine that the corresponding magnitude of voltage of required storage unit is to drop in that voltage range, namely can determine the data that this storage unit is stored.
Because erase operation carries out for the sector, therefore in writing 1 process, the floating grid FG of possible partial memory cell can be removed too much electronics, and so that the threshold voltage of this part storage unit is excessively low, even may be less than zero.So also need to operate to adjust by soft programming the threshold voltage of storage unit.For example, 3V voltage is injected control grid CG, and the voltage that injects about 5V is to drain D.
Thereby in the present embodiment, this step may further include following steps:
The storage unit that needs to carry out the soft programming operation in the identification sector; Then carry out the soft programming operation for described storage unit.
Described identifying operation can be by choosing all cell that link in the block on the same bit line, and the namely drain electrode of these all cell is all linked together, compares with reference voltage, and judgement is that " 1 " or " 0 " is determined.
Preferably, the application's nonvolatile memory can comprise SLC Flash Memory (Single-Level Cell, single layer cell flash memory) and MLC Flash Memory (Multi-Level Cell, multi-layered unit flash memory).
Need to prove, for aforesaid each embodiment of the method, for simple description, therefore it all is expressed as a series of combination of actions, but those skilled in the art should know, the application is not subjected to the restriction of described sequence of movement, because according to the application, some step can adopt other orders or carry out simultaneously.Secondly, those skilled in the art also should know, the embodiment described in the instructions all belongs to preferred embodiment, and related action and module might not be that the application is necessary.
With reference to figure 3, show the structured flowchart of erasing apparatus embodiment of a kind of nonvolatile memory of the application, can comprise with lower module:
Internal electric source module 301 is used for carrying out gating control and the mode of operation control of two sectors;
Owing to a P trap as source electrode (P substrate) is shared in all sectors in the storage block, carry out for storage block so wipe (erase) operation.When carrying out erase operation, an erasing voltage is applied to the P trap of selected storage block, and the malleation that the P trap adds can be added on all interior sectors of storage block.Thereby when simultaneously two sectors being wiped in the present embodiment, need not to increase erasing voltage can realize, namely corresponding internal electric source module can not need to have simultaneously two storage blocks are powered and corresponding electrical source exchange control ability.
Preferably, in the embodiment of the present application, described sector erasing module 303 may further include following submodule:
Sector pre-programmed submodule 3031 is used for described two sectors are carried out the pre-programmed operation concurrently;
Successfully whether sector erasing checking submodule 3033 wiped for verifying serially for each sector, if then, then triggers sector soft programming submodule 3035; If not, then trigger the sector and again wipe submodule 3034;
The sector is wiped submodule 3034 again, is used for re-starting erase operation to wiping unsuccessful sector;
Sector soft programming submodule 3035 is used for after described two sector erasing success concurrently soft programming operation being carried out in described two sectors.
As another embodiment, described sector erasing checking submodule also can adopt the mode for two sector parallel proofs.Because embodiment shown in Figure 3 is comparatively close with aforementioned embodiment illustrated in figures 1 and 2, relevant portion gets final product referring to the description in the previous embodiment, has not just given unnecessary details at this.
The method for deleting of the above nonvolatile memory that the application is provided and the erasing apparatus of nonvolatile memory are described in detail, used specific case herein the application's principle and embodiment are set forth, the explanation of above embodiment just is used for helping to understand the application's method and core concept thereof; Simultaneously, for one of ordinary skill in the art, the thought according to the application all will change in specific embodiments and applications, and in sum, this description should not be construed as the restriction to the application.
Claims (8)
1. the method for deleting of a nonvolatile memory is characterized in that, comprising:
Determine two sectors of wanting in the nonvolatile memory to wipe, described two sectors are arranged in same storage block;
Described two sectors of parallel erase.
2. the method for claim 1 is characterized in that, the step of two sectors of described parallel erase comprises:
Described two sectors are carried out the pre-programmed operation concurrently;
Described two sectors are carried out erase operation concurrently;
Verify serially for each sector and to wipe whether success, if not, then re-start erase operation to wiping unsuccessful sector;
After described two sector erasing success, concurrently soft programming operation is carried out in described two sectors.
3. method as claimed in claim 1 or 2 is characterized in that, described pre-programmed operation further comprises:
Identify the storage unit that needs to carry out the pre-programmed operation in described two sectors;
Carry out the pre-programmed operation for described storage unit;
Described soft programming operation further comprises:
Identify the storage unit that needs to carry out the soft programming operation in described two sectors;
Carry out the soft programming operation for described storage unit.
4. method as claimed in claim 1 or 2 is characterized in that, two sectors in the described same storage block are two adjacent sectors in the same storage block.
5. the erasing apparatus of a nonvolatile memory is characterized in that, comprising:
The internal electric source module is used for carrying out gating control and the mode of operation control of two sectors;
The sector determination module is used for two sectors that definite nonvolatile memory is wanted to wipe, and described two sectors are arranged in same storage block;
The sector erasing module is used for described two sectors of parallel erase.
6. device as claimed in claim 5 is characterized in that, described sector erasing module comprises:
Sector pre-programmed submodule is used for described two sectors are carried out the pre-programmed operation concurrently;
The sector erasing submodule is used for described two sectors are carried out erase operation concurrently;
Successfully whether sector erasing checking submodule wiped for verifying serially for each sector, if then, then triggers sector soft programming submodule; If not, then trigger the sector and again wipe submodule;
The sector is wiped submodule again, is used for re-starting erase operation to wiping unsuccessful sector;
Sector soft programming submodule is used for after described two sector erasing success concurrently soft programming operation being carried out in described two sectors.
7. such as claim 5 or 6 described devices, it is characterized in that, described sector pre-programmed submodule further comprises:
The pre-programmed detecting unit is used for identifying the storage unit that described two sectors need to carry out the pre-programmed operation;
The pre-programmed operating unit is used for carrying out the pre-programmed operation for described storage unit;
Described soft programming operation further comprises:
The soft programming detecting unit is used for identifying the storage unit that described two sectors need to carry out the soft programming operation;
Carry out the soft programming operation for described storage unit.
8. such as claim 5 or 6 described devices, it is characterized in that, two sectors in the described same storage block are two adjacent sectors in the same storage block.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910077696.7A CN101800078B (en) | 2009-02-11 | 2009-02-11 | Erasing method and device of nonvolatile memory |
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| CN200910077696.7A Division CN101800078B (en) | 2009-02-11 | 2009-02-11 | Erasing method and device of nonvolatile memory |
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| CN102930899A true CN102930899A (en) | 2013-02-13 |
| CN102930899B CN102930899B (en) | 2015-11-25 |
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| CN201210244976.4A Active CN102930899B (en) | 2009-02-11 | 2009-02-11 | A kind of method for deleting of nonvolatile memory and device |
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| CN109254723A (en) * | 2017-07-12 | 2019-01-22 | 恩智浦美国有限公司 | It nullifies memory sectors in nonvolatile memory |
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| CN103390424A (en) * | 2012-05-08 | 2013-11-13 | 北京兆易创新科技股份有限公司 | Erasing/programming method and device of memory |
| CN105976867A (en) * | 2016-07-06 | 2016-09-28 | 北京兆易创新科技股份有限公司 | Erasing method for storage units |
| US10354737B2 (en) * | 2017-06-22 | 2019-07-16 | Western Digital Technologies, Inc. | Non-volatile memory sub-block erasure disturb management scheme |
| US11049565B2 (en) * | 2018-04-23 | 2021-06-29 | Micron Technology, Inc. | Non-volatile memory devices and systems with volatile memory features and methods for operating the same |
| CN110634522A (en) * | 2018-06-25 | 2019-12-31 | 北京兆易创新科技股份有限公司 | Nonvolatile memory erasing method and device |
| CN110634524A (en) * | 2018-06-25 | 2019-12-31 | 北京兆易创新科技股份有限公司 | Nonvolatile memory erasing method and device |
| CN109491596B (en) * | 2018-10-08 | 2020-07-10 | 华中科技大学 | Method for reducing data storage error rate in charge trapping type 3D flash memory |
| CN111863093B (en) * | 2019-04-29 | 2022-08-09 | 北京兆易创新科技股份有限公司 | Erasing method and device of nonvolatile memory |
| CN112825261A (en) * | 2019-11-20 | 2021-05-21 | 合肥格易集成电路有限公司 | Erasing method of nonvolatile memory and nonvolatile memory |
| CN110970075A (en) | 2019-12-02 | 2020-04-07 | 武汉新芯集成电路制造有限公司 | Memory structure and erasing method thereof |
| CN110970076B (en) * | 2019-12-02 | 2022-03-18 | 武汉新芯集成电路制造有限公司 | Memory structure and erasing method thereof |
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| US6055184A (en) * | 1998-09-02 | 2000-04-25 | Texas Instruments Incorporated | Semiconductor memory device having programmable parallel erase operation |
| JP3920501B2 (en) * | 1999-04-02 | 2007-05-30 | 株式会社東芝 | Nonvolatile semiconductor memory device and data erase control method thereof |
| US6891752B1 (en) * | 2002-07-31 | 2005-05-10 | Advanced Micro Devices | System and method for erase voltage control during multiple sector erase of a flash memory device |
| US7110301B2 (en) * | 2004-05-07 | 2006-09-19 | Samsung Electronics Co., Ltd. | Non-volatile semiconductor memory device and multi-block erase method thereof |
| CN101023497B (en) * | 2004-08-30 | 2011-03-02 | 斯班逊有限公司 | Nonvolatile storage and erasing method for nonvolatile storage |
| US7640389B2 (en) * | 2006-02-28 | 2009-12-29 | Freescale Semiconductor, Inc. | Non-volatile memory having a multiple block erase mode and method therefor |
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| CN109254723A (en) * | 2017-07-12 | 2019-01-22 | 恩智浦美国有限公司 | It nullifies memory sectors in nonvolatile memory |
| CN109254723B (en) * | 2017-07-12 | 2023-06-02 | 恩智浦美国有限公司 | Method and system for memory sector de-registering in non-volatile memory |
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| CN101800078B (en) | 2013-02-13 |
| CN102930899B (en) | 2015-11-25 |
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