CN102880432A - Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system - Google Patents

Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system Download PDF

Info

Publication number
CN102880432A
CN102880432A CN2012103725738A CN201210372573A CN102880432A CN 102880432 A CN102880432 A CN 102880432A CN 2012103725738 A CN2012103725738 A CN 2012103725738A CN 201210372573 A CN201210372573 A CN 201210372573A CN 102880432 A CN102880432 A CN 102880432A
Authority
CN
China
Prior art keywords
flash memory
data
flash
memory pages
pages
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012103725738A
Other languages
Chinese (zh)
Other versions
CN102880432B (en
Inventor
张彤
邹粤林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN 201210372573 priority Critical patent/CN102880432B/en
Publication of CN102880432A publication Critical patent/CN102880432A/en
Application granted granted Critical
Publication of CN102880432B publication Critical patent/CN102880432B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

The invention discloses a method for increasing writing speeds of flash memory chips by the aid of the limited lives of data. A flash memory comprises a plurality of flash memory chips, and each flash memory chip comprises a plurality of flash memory pages. The method includes steps of monitoring the size of available memory space of the flash memory in real time; writing received new valid data into the flash memory pages which are not adjacent to one another when the detected current available memory space of the flash memory is larger than a preset threshold value; and writing the received new valid data into the adjacent flash memory pages which store invalid data when the detected current available memory space of the flash memory is smaller than the preset threshold value. The invention further discloses a flash memory system and a controller thereof. The method, the flash memory system and the controller in an embodiment of the invention have the advantages that the data writing speeds can be increased by effectively using the characteristic that the lives of the data are greatly different from one another in practical application, and an implementation process is simple and feasible.

Description

Utilize data finite lifetime to improve method, system and the controller thereof of flash chip writing speed
Technical field
The present invention relates to communication technical field, relate in particular to a kind of method, flash-memory storage system and controller thereof that utilizes data finite lifetime to improve the flash chip writing speed.
Background technology
As the solid-state non-volatile data storing technology of unique main flow, flash memory has become a ring with the fastest developing speed in the global semiconductor industrial system.Market intelligence showed in 2010, and the market of flash memory products has been broken through 20,000,000,000 dollars.Solid-state data-storage system based on flash chip mainly comprises a solid-state memory system controller and an above flash chip.
The essential information storage unit of flash chip is floating gate transistor (Floating-Gate Transistor).The threshold voltage of floating gate transistor can enter floating boom by the electronics of injection some and change.Therefore, by the accurate control to number of electrons in the floating boom, each storage unit, namely floating gate transistor can store a plurality of bit informations.Accurately the process of number of electrons is commonly called programming in the control floating boom.Before each storage unit can be programmed, all electronics in its floating boom must be removed, thereby so that its threshold voltage is set to minimumly, this process is called as wipes.In the process to information memory cell programming, industry uses a kind of method of gradual " programming-verification-again programming " with the accurate control of realization to number of electrons in the floating boom.Increasing electron trap (traps) is introduced in " program/erase " the operation meeting (program/erase) that repeats gradually in floating gate transistor, causing the noise tolerance limit of more and more lower floating gate transistor, thereby so that flash chip only has certain " program/erase " number of times limit.
As base unit, the user data that comprises in each page is generally 4096 bytes (byte), 8192 bytes or 16384 bytes to the flash memory chip data read-write operation with the page (page).The memory page of some (such as 256,512) forms a storage block, and flash chip is made of the storage block of a large amount of equal sizes and necessary peripheral auxiliary circuits.Data erase operation must be take storage block as unit.
When all information memory cells are programmed in to a page, can bring interference to its tight adjacent page institute canned data, bring the decline of the data storage stability of adjacent page.This mainly is because caused the crosstalking of stray capacitance (cell-to-cell interference) between the neighbor information storage unit.Along with improving constantly of flash memory system fabrication technique, can be more and more nearer between the neighbor information storage unit, directly cause the stray capacitance between the neighbor information storage unit and the neighbor information storage unit that causes between crosstalk can be increasing.In order to overcome crosstalking on the impact of data storage stability between the information memory cell as far as possible, flash chip must use enough little programming step-length with the noise margin of raising information memory cell in the process of gradual " programming-verification-again programming ", and then improves the tolerance to crosstalking between the neighbor information storage unit.But the speed of flash memory chip data programming directly is proportional to the size of programming step-length.So, when reducing the programming step-length when improving the noise margin of information memory cell, the speed of flash memory chip data programming also together with the time descend.
As seen, in existing the realization, in order to realize the enough tolerances to crosstalking between the neighbor information storage unit, the writing speed of flash chip is very restricted, and flash memory chip data writing speed on the low side is the travelling speed of the whole solid-state data-storage system of impact directly.Crosstalking between the neighbor information storage unit of minimizing flash chip has certain meaning to improving the flash memory chip data writing speed, especially be the target that those skilled in the art endeavour in the current speed that how to promote the flash memory data writing, can effectively improve the flash memory chip data writing speed, thereby the travelling speed that improves whole storage system is significant.
In the prior art, by crosstalking between the neighbor information storage unit that the discontinuous mode that writes the page of user data is reduced flash chip, for example, application number is that China of 20091014313.6 applies for a patent the programmed method that discloses a kind of flash memory device, wherein by the recto of the storage unit that comprises verso and recto is programmed threshold voltage is improved certain level in advance, and carry out subsequently verso programming operation and recto programming operation, so that can prevent because the skimble-scamble threshold voltage that disturbing effect causes between the unit distributes.Although disclosed method to a certain degree can prevent because the skimble-scamble threshold voltage that disturbing effect causes between the unit distributes, but only come data writing by distinguishing the odevity page or leaf, cause easily the waste of storage space, and judgement and checking that the method relates to voltage are difficult to all control and operate.
In addition, application number is US2007,0849, a kind of method that reduces the impact of interference during the programming is disclosed in the instructions of 992 U. S. application patent, the disturbing effect that it reduces from neighbours' upper act comprises: in the very first time, the first group of non-volatile memory device is programmed; In the second time that is different from the very first time, the second group of non-non-volatile memory device is programmed; And verify together the first group of described non-volatile memory device and the second group of described non-non-volatile memory device.The method can effectively reduce the impact of interference between the neighbor memory cell during the programming, but the method implementation procedure more complicated, change the program/erase procedure of existing flash-memory storage system and realizes, is unfavorable for popularizing and uses.
Summary of the invention
Embodiments of the invention provide a kind of method, flash-memory storage system and controller thereof that utilizes data finite lifetime to improve the flash chip writing speed, can effectively utilize that there is the characteristic of larger difference in the data lifetime and improves writing speed in the practical application, and implementation procedure is simple, easy row.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of data finite lifetime of utilizing utilizes data finite lifetime to improve the method for flash chip writing speed, and wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages, and the method comprising the steps of:
The size of the free memory of Real-Time Monitoring flash memory;
When the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages;
When the free memory that monitors current flash memory during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
A kind of controller comprises:
Microprocessing unit;
Flash interface is coupled to described microprocessing unit and flash memory, and wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
The flash memory management module is coupled to described microprocessing unit by microprocessing unit described flash memory is carried out the flash memory management program, comprising:
The free memory monitoring means is used for the size of the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive is write in the mutual non-conterminous flash memory pages;
Stale data invalid address record cell, physical address for detection of the expired invalid flash memory pages of the data that have with record, and the free memory that monitors current flash memory when the free memory monitoring means writes the new valid data that receive in the adjacent flash memory pages of the flash memory pages that has invalid data during less than default threshold value.A kind of flash-memory storage system comprises:
Flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
Controller is coupled to described flash chip with the size of the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive is write in the mutual non-conterminous flash memory pages; When the free memory that monitors current flash memory during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
A kind of method of utilizing data finite lifetime to improve the flash chip writing speed that the embodiment of the invention provides, flash-memory storage system and controller thereof are by size and the detection of the free memory of monitoring flash memory, the physical address of the expired invalid flash memory pages of the data that have of record, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages with the crosstalk phenomenon in the decrease programming process, so just can corresponding increasing data write fashionable programming step-length with direct raising writing speed; When the free memory that monitors current flash memory during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data, operate crosstalking of bringing and need not take high speed write into account, because the data in the page that is affected by crosstalking are payable to order.Therefore, can effectively utilize that the user data lifetime exists the characteristic of larger difference to improve data write operation speed in the practical application, and the realization of the embodiment of the invention and the design of existing solid-state memory system are directly compatible, implementation procedure is simple.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the composition frame chart of a kind of flash-memory storage system in the embodiment of the invention 1;
Fig. 2 is the composition frame chart of flash chip in the embodiment of the invention 1;
Fig. 3 a ~ 3b utilizes the flash-memory storage system in the embodiment of the invention 1 to carry out the synoptic diagram that data write flash memory pages;
Fig. 4 is the composition frame chart of a kind of controller in the embodiment of the invention 2;
Fig. 5 is the composition frame chart of a kind of controller in the embodiment of the invention 3;
Fig. 6 is a kind of method flow diagram that utilizes data finite lifetime to improve the flash chip writing speed in the embodiment of the invention 4;
Fig. 7 is a kind of method flow diagram that utilizes data finite lifetime to improve the flash chip writing speed in the embodiment of the invention 5.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
Embodiment 1
The embodiment of the invention provides a kind of flash-memory storage system, as shown in Figure 1, flash-memory storage system 100 comprises controller 110 and flash memory 120, usually flash-memory storage system 100 can use with main frame 140, and by communication interface 130 connections, so that main frame 140 can write to data storage system 100 or reading out data from storage system 100.In the present embodiment, main frame 140 can be any system that computing machine, digital camera, video camera, communicator, audio player or video player etc. can be stored data.Communication interface 130 can be USB interface, PCI Express interface, SATA interface, MS interface, MMC interface, SD interface, CF interface, ide interface or other data transmission interfaces that is fit to.In the present embodiment, described flash-memory storage system 100 is solid state hard disc (Solid State Drive, SDD), but intelligible, this flash-memory storage system 100 also can be Portable disk or storage card in other embodiments.
Flash memory 120 couples controller 110 and in order to store data.In the present embodiment, flash memory 120 comprises a plurality of flash chips 122, and as shown in Figure 2, each flash chip 122 is divided in fact a plurality of entity stores pieces (physical block) 124 usually, generally speaking, block storage is the minimum unit of wiping (erase) in flash memory.Each block storage contains the minimum digital storage unit that is wiped free of in the lump (memory cell).Each block storage can be divided into several flash memory pages (page) 126 usually; for example a block storage 124 can be divided into a flash memory pages 126; one of them flash memory pages is generally and programmes/read the minimum unit of (program/read); but for different flash memory design; minimum programming/read (program/read) unit also to can be a sector (sector) size namely has a plurality of sectors and take a sector as the minimum unit of programme/read (program/read) in one page.In the present embodiment, each flash chip 122 as minimum storage unit, that is to say that flash memory pages 126 is the minimum unit of data writing or reading out data with flash memory pages 126.Usually each flash memory pages comprises user data storage area and redundant area, and redundant area comprises system management district and error correction district usually.Wherein, the user data storage area is in order to store user's data, the system management district is in order to (for example initial paging of the logical-physical address corresponding relation of each block storage, block storage of system management memory data ... Deng), the error correction district is then in order to store the error correcting code (parity) of the ECC after the error correcting code coding calculates.
Controller 110 is used for coordinating the overall operation of main frame 140 and flash memory 120, writing, read and wiping etc. such as data.Controller 110 comprises microprocessing unit 110a, flash interface 110b and flash memory management module 110c.
Microprocessing unit 110a is used for coordinating control flash interface 110b and flash memory management module 110c, and carries out the runnings such as writing, read and erase to flash memory 120.
Flash interface 110b is electrically connected to microprocessing unit 110a and in order to access flash memory 120, and namely, the data that main frame 140 wants to write to flash memory 120 can be converted to 120 receptible forms of flash memory via flash interface 110b.Particularly, in this enforcement, flash memory management module 110c is to the acquisition of information of flash memory 120 and to send control command etc. also be to need by flash interface 110b.
Flash memory management module 110c is electrically connected to microprocessing unit 110a by microprocessing unit 110a described flash memory 120 is carried out the flash memory management program.Flash memory management module 110c is used for management flash memory 120, such as carrying out average abrasion (wear 1eve1i ng) method, bad block management, safeguarding mapping table (mapping table) etc.Particularly, in embodiments of the present invention, flash memory management module 110c is also for detection of the operating position of flash memory 120, to set current writing speed.Implementation is as follows: the size of the free memory of Real-Time Monitoring flash memory 120; When the free memory that monitors current flash memory 120 during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages; When the free memory that monitors current flash memory 120 during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data; And detect in real time the poorest possible noise tolerance limit of the current flash memory pages that will write, and set the writing speed that current maximum allows according to the poorest described possible noise tolerance limit.
Below, in conjunction with Fig. 3 a ~ 3b, further set forth the operational process of the flash-memory storage system 100 of the embodiment of the invention.Shown in Fig. 3 a, in the specific implementation, the size that to utilize controller 110 Real-Time Monitoring flash memories 120 be available storage space with the available storage block number of knowing current flash memory 120, if current free memory is greater than a certain predetermined threshold value, just can only use the mutually not tight adjacent new valid data of flash memory pages storage.In the present embodiment, this threshold value be the total volume of whole storage system hundred deals (as threshold value can be made as total volume 30% or 20%), concrete value depends on actual operating position.In addition, if current free memory during greater than this predetermined threshold value, writes the new valid data that receive in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write the flash memory pages of a certain storage block 124, if all flash memory pages are numbered 0,1,2,3 ... it is nearest in chip, the also maximum of crosstalking therebetween of flash memory pages of adjacent numbering.User data is being write fashionable, is being begun most only data to be write to be numbered 0,2,4 ... the page in, understand like this crosstalk phenomenon in the decrease programming process.So, just can be corresponding increasing programming step-length, to improve writing speed.
When using above-mentioned writing mode, can improve writing speed, but many flash memory pages (such as the page 1,3,5 ...) when beginning most, be not used to store the valid user data.In whole flash-memory storage system 100 operational processs, along with the number of times that writes is more and more, available storage space is with fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate crosstalking of bringing and need not take high speed write into account, because the data in the flash memory pages that is affected by crosstalking are payable to order.Therefore, when the free memory that monitors current flash memory during less than default threshold value, if when finding that data that the adjacent flash memory pages of a certain flash memory pages has are all invalid, the new valid data that receive are write in the described flash memory pages.For example, user data is write fashionable, begin most only data to be write to be numbered 0,2,4 ... the page in, along with the operation of system, after data in detecting flash memory pages 2 and flash memory pages 4 become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and the flash memory pages 4.Although when new valid data are write flash memory pages 3, can cause crosstalking to the data in flash memory pages 2 and the flash memory pages 4, so that the data storage stability in flash memory pages 2 and the flash memory pages 4 descends, but because the data in flash memory pages 2 and the flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to system's operation.In the present embodiment, it is payable to order to detect in several ways the data of judging in the flash memory pages, for example, when real system moves, when if the user writes a certain logical address with new data, if in the flash memory in the stored physical address with respect to this logical address original data can be set to expired invalid.In addition, added special command a: TRIM in some new operating system, it is invalid that the user can utilize this order directly to notify flash-memory storage system that some data is set to.
In above-mentioned operational process, when a certain flash memory pages data writing, before this storage block was by bulk erase, this flash memory pages can not be written into new data again.And, before writing arbitrary flash memory pages, also comprise the poorest possible noise tolerance limit of the current flash memory pages that will write of real-time detection, and set the writing speed (programming step-length) of current maximum permission according to the poorest described possible noise tolerance limit.Thereby can guarantee large step-length programming with high speed write access customer data, and don't can cause crosstalking between the flash memory pages storing information.
In addition, though be not illustrated in present embodiment, controller 110 can comprise also that general flash controller is normal
The functional module of seeing is such as power management module etc.
In the embodiment of the invention, flash memory management module 110c is set in the controller 110 of flash-memory storage system 100, and this flash memory management module 110c has set up size and the detection of the free memory of Real-Time Monitoring flash memory, the physical address of the expired invalid flash memory pages of the data that have of record, and write in the mutual non-conterminous flash memory pages according to the new valid data that testing result will receive, the new valid data that maybe will receive write in the adjacent flash memory pages of the flash memory pages that has invalid data, with the crosstalk phenomenon in the decrease programming process, operate crosstalking of bringing and need not take high speed write into account, and then guarantee the current writing speed of flash chip.Therefore, can effectively utilize that the user data lifetime exists the characteristic of larger difference to improve data write operation speed in the practical application, and the realization of the embodiment of the invention and the design of existing solid-state memory system are directly compatible, implementation procedure is simple.
Embodiment 2
The embodiment of the invention provides a kind of controller, be applicable to have on the flash-memory storage system of flash memory, wherein, this flash memory comprises a plurality of flash chips, and each flash chip is divided into a plurality of entity stores pieces, and each block storage is divided into several flash memory pages, in the present embodiment, each flash chip that is to say that with the storage unit of flash memory pages as minimum flash memory pages is the minimum unit of data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 4, the controller 300 of the embodiment of the invention comprises microprocessing unit 310, flash interface 320 and flash memory management module 330.
Microprocessing unit 310 is used for coordinating control flash interface 320 and flash memory management module 330, and carries out the runnings such as writing, read and erase to flash memory.
Flash interface 320 is electrically connected to microprocessing unit 310 and in order to the access flash memory, namely, the user data that the controller wish will write to flash memory can be converted to 120 receptible forms of flash memory via flash interface 320.Particularly, in this enforcement, the acquisition of information of 330 pairs of flash memories of flash memory management module and transmission control command etc. also is to need to send by flash interface 320.
Flash memory management module 330 is electrically connected to microprocessing unit 310 to carry out the flash memory management program by 310 pairs of described flash memories of microprocessing unit.Flash memory management module 330 is used for the management flash memory, and particularly, in embodiments of the present invention, flash memory management module 330 is for detection of the operating position of the flash memory pages of flash memory, to guarantee current writing speed.Specifically comprise free memory monitoring means 332 and stale data invalid address record cell 334:
Free memory monitoring means 332 is used for the size of the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive is write in the mutual non-conterminous flash memory pages;
Stale data invalid address record cell 334, physical address for detection of the expired invalid flash memory pages of the data that have with record, and the free memory that monitors current flash memory when the free memory monitoring means writes the new valid data that receive in the adjacent flash memory pages of the flash memory pages that has invalid data during less than default threshold value.
In the specific implementation, the monitoring flash memory is with the size of the available storage space of available storage block number of knowing current flash memory when utilizing free memory monitoring means 332, if current free memory is greater than a certain predetermined threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write the flash memory pages of a certain storage block, if all flash memory pages are numbered 0,1,2,3 ... it is nearest in chip, the also maximum of crosstalking therebetween of flash memory pages of adjacent numbering.User data is being write fashionable, begun most only data to be write to be numbered 0,2,4 ... the page in, in this process, because write operation is very little to crosstalking of bringing of other pages that have valid data, write operation can use larger programming step-length to improve writing speed.
In whole flash-memory storage system operational process, along with the number of times that writes is more and more, available storage space is with fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate crosstalking of bringing and need not take high speed write into account, because the data in the flash memory pages that is affected by crosstalking are payable to order.Therefore, after system's operational process in, the free memory that monitors current flash memory when free memory monitoring means 332 is during less than default threshold value, in a single day stale data invalid address record cell 334 finds that the data in some page are payable to order, just new valid data can be write with it tightly in the adjacent memory page.Especially, if when the data that the adjacent flash memory pages of a certain flash memory pages of stale data invalid address record cell 334 record has are all invalid, the new valid data that receive are write in the described flash memory pages.For example, after the data in detecting flash memory pages 2 and flash memory pages 4 become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and the flash memory pages 4.Although when new valid data are write flash memory pages 3, can cause crosstalking to the data in flash memory pages 2 and the flash memory pages 4, so that the data storage stability in flash memory pages 2 and the flash memory pages 4 descends, but because the data in flash memory pages 2 and the flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to system's operation.
Embodiment 3
The embodiment of the invention provides another kind of controller, be applicable to have on the flash-memory storage system of flash memory, wherein, this flash memory comprises a plurality of flash chips, and each flash chip is divided into a plurality of entity stores pieces, and each block storage is divided into several flash memory pages, in the present embodiment, each flash chip that is to say that with the storage unit of flash memory pages as minimum flash memory pages is the minimum unit of data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 5, the controller 400 of the embodiment of the invention comprises microprocessing unit 410, flash interface 420 and flash memory management module 430
Microprocessing unit 410 is used for coordinating control flash interface 420, flash memory management module 430, and carries out the runnings such as writing, read and erase to flash memory.
Flash interface 420 is electrically connected to microprocessing unit 410 and in order to the access flash memory, namely, the user data that the controller wish will write to flash memory can be converted to the receptible form of flash memory via flash interface 420.Particularly, in this enforcement, the acquisition of information of 430 pairs of flash memories of flash memory management module and transmission control command etc. also is to need to send by flash interface 420.
Flash memory management module 430 is electrically connected to microprocessing unit 410 to carry out the flash memory management program by 410 pairs of described flash memories of microprocessing unit.Flash memory management module 430 is used for the management flash memory, and particularly, in embodiments of the present invention, flash memory management module 430 is for detection of the operating position of the flash memory pages of flash memory, to guarantee current writing speed.Specifically comprise free memory monitoring means 432 and stale data invalid address record cell 434, noise tolerance limit detecting unit 436 and writing speed setup unit 438:
Free memory monitoring means 432 is used for the size of the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive is write in the mutual non-conterminous flash memory pages;
Stale data invalid address record cell 434, physical address for detection of the expired invalid flash memory pages of the data that have with record, and the free memory that monitors current flash memory when the free memory monitoring means writes the new valid data that receive in the adjacent flash memory pages of the flash memory pages that has invalid data during less than default threshold value;
Noise tolerance limit detecting unit 436 is for detection of the poorest possible noise tolerance limit of the current flash memory pages that will write; Concrete, before the storage unit of program/erase flash chip by error bit number contained in the data that detect the current storage unit that is read out to estimate the noise tolerance limit of described storage unit;
Writing speed setup unit 438 is for the writing speed of the maximum permission of setting current flash memory pages according to the poorest described possible noise tolerance limit.
In the specific implementation, the monitoring flash memory is with the size of the available storage space of available storage block number of knowing current flash memory when utilizing free memory monitoring means 432, if current free memory is greater than a certain predetermined threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write the flash memory pages of a certain storage block, if all flash memory pages are numbered 0,1,2,3 ... it is nearest in chip, the also maximum of crosstalking therebetween of flash memory pages of adjacent numbering.User data is being write fashionable, begun most only data to be write to be numbered 0,2,4 ... the page in, in this process, because write operation is very little to crosstalking of bringing of other pages that have valid data, write operation can use larger programming step-length to improve writing speed.
In whole flash-memory storage system operational process, along with the number of times that writes is more and more, available storage space is with fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate crosstalking of bringing and need not take high speed write into account, because the data in the flash memory pages that is affected by crosstalking are payable to order.Therefore, after system's operational process in, the free memory that monitors current flash memory when free memory monitoring means 432 is during less than default threshold value, in a single day stale data invalid address record cell 434 finds that the data in some page are payable to order, just new valid data can be write with it tightly in the adjacent memory page.Low especially, if when the data that the adjacent flash memory pages of a certain flash memory pages of stale data invalid address record cell 434 record has are all invalid, the new valid data that receive are write in the described flash memory pages.For example, after the data in detecting flash memory pages 2 and flash memory pages 4 become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and the flash memory pages 4.Although when new valid data are write flash memory pages 3, can cause crosstalking to the data in flash memory pages 2 and the flash memory pages 4, so that the data storage stability in flash memory pages 2 and the flash memory pages 4 descends, but because the data in flash memory pages 2 and the flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to system's operation.
And, before writing arbitrary flash memory pages, also utilize noise tolerance limit detecting unit 436 to detect in real time the poorest possible noise tolerance limit of the current flash memory pages that will write, then utilize writing speed setup unit 438 to set the writing speed (programming step-length) that current maximum allows according to the poorest described possible noise tolerance limit.Thereby can guarantee large step-length programming with high speed write access customer data, and don't can cause crosstalking between the flash memory pages storing information.
Embodiment 4
The embodiment of the invention provides a kind of method of utilizing data finite lifetime to improve the flash chip writing speed, be applicable in the control of controller to flash memory of flash-memory storage system, wherein, this flash memory comprises a plurality of flash chips, and each flash chip is divided into a plurality of entity stores pieces, and each block storage is divided into several flash memory pages, in the present embodiment, each flash chip that is to say that with the storage unit of flash memory pages as minimum flash memory pages is the minimum unit of data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 6, the method comprises:
Step S101: the size of the free memory of Real-Time Monitoring flash memory;
Concrete, in the present embodiment, can monitor the size of free memory of flash memory to know that the available storage block number in the current storage system is available storage space by multiple existing mode.
Step S102: when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages;
Concrete, if when monitoring current free memory greater than a certain predetermined threshold value, the new valid data that receive can be write in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write the flash memory pages of a certain storage block, if all flash memory pages are numbered 0,1,2,3 ... it is nearest in chip, the also maximum of crosstalking therebetween of flash memory pages of adjacent numbering.User data is being write fashionable, begun most only data to be write to be numbered 0,2,4 ... the page in, in this process, because write operation is very little to crosstalking of bringing of other pages that have valid data, write operation can use larger programming step-length to improve writing speed.
Step S103: when the free memory that monitors current flash memory during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
Concrete, along with the number of times that writes is more and more, available storage space is with fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate crosstalking of bringing and need not take high speed write into account, because the data in the flash memory pages that is affected by crosstalking are payable to order.Therefore, after system's operational process in, when the free memory that monitors current flash memory during less than default threshold value, in case find that the data in some page are payable to order, just new valid data can be write with it tightly in the adjacent memory page.If when finding that especially data that the adjacent flash memory pages of a certain flash memory pages has are all invalid, the new valid data that receive are write in the described flash memory pages.For example, after the data in detecting flash memory pages 2 and flash memory pages 4 become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and the flash memory pages 4.Although when new valid data are write flash memory pages 3, can cause crosstalking to the data in flash memory pages 2 and the flash memory pages 4, so that the data storage stability in flash memory pages 2 and the flash memory pages 4 descends, but because the data in flash memory pages 2 and the flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to system's operation.
Fig. 6 improves the process flow diagram of the method for flash chip writing speed according to the data finite lifetime of utilizing shown in the embodiment of the invention, and wherein these steps are that the mechanical order that the microprocessor of the controller of flash-memory storage system is carried out the flash memory management module is finished.It must be appreciated, the method step that utilizes data finite lifetime to improve the flash chip writing speed proposed by the invention is not limited to execution sequence shown in Figure 6, and those skilled in the art can change arbitrarily the method step that utilizes data finite lifetime to improve the flash chip writing speed according to spirit of the present invention.
Embodiment 5
The embodiment of the invention provides another kind to utilize data finite lifetime to improve the method for flash chip writing speed, is applicable in the control of controller to flash memory of flash-memory storage system,
Wherein, this flash memory comprises a plurality of flash chips, each flash chip is divided into a plurality of entity stores pieces, each block storage is divided into several flash memory pages, in the present embodiment, each flash chip that is to say that with the storage unit of flash memory pages as minimum flash memory pages is the minimum unit of data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 7, the method comprises:
Step S201: the size of the free memory of Real-Time Monitoring flash memory;
Concrete, in the present embodiment, can monitor the size of free memory of flash memory to know that the available storage block number in the current storage system is available storage space by multiple existing mode.
Step S202: when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages; And before writing flash memory pages, detect the poorest possible noise tolerance limit of described flash memory pages, and set the writing speed that current maximum allows according to the poorest described possible noise tolerance limit;
Concrete, if when monitoring current free memory greater than a certain predetermined threshold value, the new valid data that receive can be write in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write the flash memory pages of a certain storage block, if all flash memory pages are numbered 0,1,2,3 ... it is nearest in chip, the also maximum of crosstalking therebetween of flash memory pages of adjacent numbering.User data is being write fashionable, begun most only data to be write to be numbered 0,2,4 ... the page in, in this process, because write operation is very little to crosstalking of bringing of other pages that have valid data, write operation can use larger programming step-length to improve writing speed.And before writing flash memory pages, detect in real time the poorest possible noise tolerance limit of the current flash memory pages that will write, then set the writing speed (programming step-length) that current maximum allows according to the poorest described possible noise tolerance limit.Thereby can guarantee large step-length programming with high speed write access customer data, and don't can cause crosstalking between the flash memory pages storing information.
Step S203: when the free memory that monitors current flash memory during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
Concrete, along with the number of times that writes is more and more, available storage space is with fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate crosstalking of bringing and need not take high speed write into account, because the data in the flash memory pages that is affected by crosstalking are payable to order.Therefore, after system's operational process in, when the free memory that monitors current flash memory during less than default threshold value, in case find that the data in some page are payable to order, just new valid data can be write with it tightly in the adjacent memory page.If when finding that especially data that the adjacent flash memory pages of a certain flash memory pages has are all invalid, the new valid data that receive are write in the described flash memory pages.For example, after the data in detecting flash memory pages 2 and flash memory pages 4 become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and the flash memory pages 4.Although when new valid data are write flash memory pages 3, can cause crosstalking to the data in flash memory pages 2 and the flash memory pages 4, so that the data storage stability in flash memory pages 2 and the flash memory pages 4 descends, but because the data in flash memory pages 2 and the flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to system's operation.
Fig. 7 improves the process flow diagram of the method for flash chip writing speed according to the data finite lifetime of utilizing shown in the embodiment of the invention, and wherein these steps are that the mechanical order that the microprocessor of the controller of flash-memory storage system is carried out the flash memory management module is finished.It must be appreciated, the method step that utilizes data finite lifetime to improve the flash chip writing speed proposed by the invention is not limited to execution sequence shown in Figure 6, and those skilled in the art can change arbitrarily the method step that utilizes data finite lifetime to improve the flash chip writing speed according to spirit of the present invention.
One of ordinary skill in the art will appreciate that all or part of flow process that realizes in above-described embodiment method, to realize by the mode that software adds necessary common hardware, can certainly finish by hardware, but the former is better embodiment in a lot of situation.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product is stored in the storage medium that can read, floppy disk, hard disk or CD etc. such as computing machine, comprise that some instructions are with so that a computer equipment (can make personal computer, server, perhaps network equipment etc.) carry out the described method of elder brother embodiment of the present invention.
The above is preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also are considered as protection scope of the present invention.

Claims (10)

1. one kind is utilized data finite lifetime to utilize data finite lifetime to improve the method for flash chip writing speed, and wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages, it is characterized in that, the method comprising the steps of:
The size of the free memory of Real-Time Monitoring flash memory;
When the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages;
When the free memory that monitors current flash memory during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
2. the method for utilizing data finite lifetime to improve the flash chip writing speed as claimed in claim 1, it is characterized in that, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.
3. the method for utilizing data finite lifetime to improve the flash chip writing speed as claimed in claim 1, it is characterized in that, when the free memory that monitors current flash memory during less than default threshold value, if when finding that data that the adjacent flash memory pages of a certain flash memory pages has are all invalid, the new valid data that receive are write in the described flash memory pages.
4. such as each described method of utilizing data finite lifetime to improve the flash chip writing speed of claim 1 ~ 3, it is characterized in that, before writing arbitrary flash memory pages, also comprise step:
Detect the poorest possible noise tolerance limit of described flash memory pages;
Set the writing speed that current maximum allows according to the poorest described possible noise tolerance limit.
5. a controller is characterized in that, comprising:
Microprocessing unit;
Flash interface is coupled to described microprocessing unit and flash memory, and wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
The flash memory management module is coupled to described microprocessing unit by microprocessing unit described flash memory is carried out the flash memory management program, comprising:
The free memory monitoring means is used for the size of the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive is write in the mutual non-conterminous flash memory pages;
Stale data invalid address record cell, physical address for detection of the expired invalid flash memory pages of the data that have with record, and the free memory that monitors current flash memory when the free memory monitoring means writes the new valid data that receive in the adjacent flash memory pages of the flash memory pages that has invalid data during less than default threshold value.
6. controller as claimed in claim 5, it is characterized in that, it is characterized in that, the free memory that monitors current flash memory when the free memory monitoring means is during greater than default threshold value, the new valid data that receive are write in the mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.
7. controller as claimed in claim 5, it is characterized in that, the free memory that monitors current flash memory when the free memory monitoring means is during less than default threshold value, if when the data that the adjacent flash memory pages of a certain flash memory pages of stale data invalid address recording unit records has are all invalid, the new valid data that receive are write in the described flash memory pages.
8. controller as claimed in claim 5 is characterized in that, described flash memory management module also comprises:
Noise tolerance limit detecting unit is for detection of the poorest possible noise tolerance limit of the current flash memory pages that will write;
The writing speed setup unit is used for setting the writing speed that current maximum allows according to the poorest described possible noise tolerance limit.
9. a flash-memory storage system is characterized in that, comprising:
Flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
Controller is coupled to described flash chip with the size of the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory during greater than default threshold value, the new valid data that receive is write in the mutual non-conterminous flash memory pages; When the free memory that monitors current flash memory during less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
10. flash-memory storage system as claimed in claim 9, it is characterized in that, described controller also detects the poorest possible noise tolerance limit of the current flash memory pages that will write in real time, and sets the writing speed that current maximum allows according to the poorest described possible noise tolerance limit.
CN 201210372573 2012-09-29 2012-09-29 Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system Expired - Fee Related CN102880432B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201210372573 CN102880432B (en) 2012-09-29 2012-09-29 Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201210372573 CN102880432B (en) 2012-09-29 2012-09-29 Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system

Publications (2)

Publication Number Publication Date
CN102880432A true CN102880432A (en) 2013-01-16
CN102880432B CN102880432B (en) 2013-12-25

Family

ID=47481780

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201210372573 Expired - Fee Related CN102880432B (en) 2012-09-29 2012-09-29 Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system

Country Status (1)

Country Link
CN (1) CN102880432B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104103309A (en) * 2013-04-15 2014-10-15 旺宏电子股份有限公司 Operation Method Of Nand Array And Computer Readable Non-transient Storage Media
CN104252883A (en) * 2013-06-26 2014-12-31 深圳市江波龙电子有限公司 Flash memory management method and system
CN107015918A (en) * 2017-03-31 2017-08-04 建荣半导体(深圳)有限公司 A kind of flash management system, method and flash chip
CN110007856A (en) * 2019-03-05 2019-07-12 四川九洲电器集团有限责任公司 Date storage method, device and flash chip
CN113521745A (en) * 2021-06-17 2021-10-22 广州三七极耀网络科技有限公司 Data storage method, device and equipment of AI model training framework of FPS game

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101477492A (en) * 2009-01-21 2009-07-08 华中科技大学 Circulating rewriting flash memory equalization method used for solid state disk
US20120233438A1 (en) * 2011-03-07 2012-09-13 Microsoft Corporation Pagefile reservations

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101477492A (en) * 2009-01-21 2009-07-08 华中科技大学 Circulating rewriting flash memory equalization method used for solid state disk
US20120233438A1 (en) * 2011-03-07 2012-09-13 Microsoft Corporation Pagefile reservations

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104103309A (en) * 2013-04-15 2014-10-15 旺宏电子股份有限公司 Operation Method Of Nand Array And Computer Readable Non-transient Storage Media
CN104103309B (en) * 2013-04-15 2017-11-17 旺宏电子股份有限公司 The operating method of NAND array and computer-readable non-transitory store media
CN104252883A (en) * 2013-06-26 2014-12-31 深圳市江波龙电子有限公司 Flash memory management method and system
CN104252883B (en) * 2013-06-26 2017-06-13 深圳市江波龙电子有限公司 Flash memory management method and system
CN107015918A (en) * 2017-03-31 2017-08-04 建荣半导体(深圳)有限公司 A kind of flash management system, method and flash chip
CN107015918B (en) * 2017-03-31 2019-11-05 建荣半导体(深圳)有限公司 A kind of flash management system, method and flash chip
CN110007856A (en) * 2019-03-05 2019-07-12 四川九洲电器集团有限责任公司 Date storage method, device and flash chip
CN110007856B (en) * 2019-03-05 2020-08-04 四川九洲电器集团有限责任公司 Data storage method and device and flash memory chip
CN113521745A (en) * 2021-06-17 2021-10-22 广州三七极耀网络科技有限公司 Data storage method, device and equipment of AI model training framework of FPS game
CN113521745B (en) * 2021-06-17 2024-01-09 广州三七极耀网络科技有限公司 Data storage method, device and equipment of AI model training architecture of FPS game

Also Published As

Publication number Publication date
CN102880432B (en) 2013-12-25

Similar Documents

Publication Publication Date Title
US9448868B2 (en) Data storing method, memory control circuit unit and memory storage apparatus
US9213629B2 (en) Block management method, memory controller and memory stoarge apparatus
US9665481B2 (en) Wear leveling method based on timestamps and erase counts, memory storage device and memory control circuit unit
US8099543B2 (en) Methods of operarting memory devices within a communication protocol standard timeout requirement
CN102915770B (en) Method for reducing inter-crosstalk of internal data of flash memory chip, flash memory storage system and controller thereof
TW201437807A (en) Method of recording mapping information method, and memory controller and memory storage apparatus using the same
US20170046068A1 (en) Memory management method, memory control circuit unit and memory storage device
CN107423231B (en) Method for managing a memory device, memory device and controller
US10620874B2 (en) Memory management method, memory control circuit unit and memory storage apparatus
TWI571882B (en) Wear leveling method, memory control circuit unit and memory storage device
US10503433B2 (en) Memory management method, memory control circuit unit and memory storage device
US9418731B1 (en) Memory management method, memory storage device and memory control circuit unit
US20150039811A1 (en) Method for managing memory apparatus, associated memory apparatus thereof and associated controller thereof
CN102880432B (en) Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system
CN104765569A (en) Data write-in method, memory control circuit unit and memory storing device
CN102880554B (en) Method for improving storage efficiency of flash memory chips, flash-memory storage system and controller thereof
US20130332653A1 (en) Memory management method, and memory controller and memory storage device using the same
TWI648739B (en) Memory management method and storage controller
TW201526006A (en) Data writing method, memory control circuit unit and memory storage apparatus
TW201531855A (en) Memory management method, memory control circuit unit and memory storage apparatus
US9778862B2 (en) Data storing method for preventing data losing during flush operation, memory control circuit unit and memory storage apparatus
CN103714008A (en) Method for memorizing data, memory controller and memorizing device of memory
TW201413450A (en) Data storing method, and memory controller and memory storage apparatus using the same
CN107204205B (en) Memory management method, memory control circuit unit and memory storage device
CN106354651B (en) Average wear method, memory control circuit unit and memory storage device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20131225

Termination date: 20150929

EXPY Termination of patent right or utility model