CN102760403A - Signal interface circuit of LED module and LED display device - Google Patents
Signal interface circuit of LED module and LED display device Download PDFInfo
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Abstract
The invention discloses a signal interface circuit of an LED module, aiming to provide the signal interface circuit of the LED module with few connections and low cost. The signal interface circuit comprises an input socket, an output socket, a crystal oscillator, an LVDS (low voltage differential signal) interface chip, an LED lattice, a line drive circuit and a column drive circuit, wherein the line drive circuit and the column drive circuit are connected with the LED lattice; and the LVDS interface chip comprises a data differential input end connected with the input socket, a data differential output end connected with the output socket, an RGB (red, green, blue) output end, an LED scanning control signal output end, a line scanning control signal output end for outputting line scanning control signals, a Des/CDR module, a lock phase clock generation module, an RGB data interception and control signal generation module and a serializer. The invention also discloses an LED display device with the signal interface circuit and the LVDS interface chip used for the LED module. The signal interface circuit and the LED display device are suitable for various LED display screens.
Description
Technical field
The present invention relates to LED and show the field, especially relate to a kind of signal interface circuit of led module and have the LED display device of this signal interface circuit.
Background technology
In the application of LED display; It is a very important ring that circuit between led module connects, and from the nineties, 16-20 line parallel interface technology is adopted in the connection between at present general led module always; Its signal comprises shift clock SCLK, latch signal/LATCH, opens signal/OE, data R [n:0], G [n:0], B [n:0], optional virtual data X [n:0], line scan signals H [m:0] and ground wire; Wherein the group of RGB data is counted n and can be 0-3, i.e. 1-4 group, and the number m of line scan signals can be 0-3 or nothing according to the difference of dutycycle; Promptly, dutycycle is respectively 0,1,2,3 when being 1/2,1/4,1/8,1/16 dynamic scan; When dutycycle is 1 static scanning, do not have line scan signals, ground wire then takies all the other non-signal pins, is at least 1.
Make a concrete analysis of the interface circuit design technology of existing led module below.
Fig. 4 is 2 for a kind of group number of RGB data; 20 line interface layouts of the dynamic scan led module of dutycycle support 1/16; Comprise 6 position datawire R [1..0], G [1..0], B [1..0]; 1 bit shift clock, 1 capable latch signal/LATCH, 1 are opened signal/OE, 4 line scan signals H [3..0], and active data and control signal wire number are 13, and ground wire and vacant number of pins are 7.
Fig. 5 is that a dutycycle is 1/8; Resolution is the legacy interface design circuit schematic diagram of 32 * 16 dynamic LED module; Interface circuit comprises 3 cmos buffer chip for driving 74HC245 among the figure; 1 CMOS 74HC138 line decoder, 1 CMOS 74HC123 no signal turn-off protection chip and two 20 P sockets.Wherein: 1 74HC245 is used for the driving of RGB input data, divide 2 groups of R [], G [], B [] totally 6 output to the LED column drive circuit respectively, as the data input of two groups of RGB constant current chip arrays up and down; 1 74HC245 is used for the driving of control signal; Divide 2 groups of SCLK ,/LATCH ,/totally 6 of OE signals; One group of CT [] output to RGB constant current chip go to control the RGB data displacement, latch, open with gray scale and show; / OE also outputs to CMOS74HC138 simultaneously and goes to control the row shutoff blanking of going when switching, and another group CT_out outputs to next led module; 1 74HC245 is used for the driving of line scan signals, divides totally 6 of 2 groups of line scan signals, and one group of output H [] carries out row decoding to this module CM OS74HC138, and one group of H_out outputs to next led module; In the input control signal / LED turn-off protection when LATCH also inserts CMOS74HC123 simultaneously and goes to realize not having line scan signals.Chip 74HC245,74HC138 and the 74HC123 of this parallel RGB data and control signal interface circuit and employing are for many years popular, are extensively adopted by each company.Secondly, the manufacturer that also has minority to adopt the special purpose interface chip, but handle remain parallel data, this point does not change.
Because in the signal interface circuit design of existing led module; Each road RGB data and control signal generally all adopt the parallel transfer pattern; It needs multi-disc CMOS 74HC245 to make bus driver, also needs row decoding device 74HC138 to make row decoding during dynamic scan.Be 1/4 in dutycycle for example, resolution is that the RGB data have 12 in the RGB full-color LED module design of 32 row * 16 row; Control signal has 5; When transfer rate is 20MHz, need 3 74HC245, a slice 74HC138; And adopting 20P socket and 20 core flat cables, the buffering of accomplishing RGB data and LED sweep signal drives, deciphers and transmits.Though this kind prior art have general with the unified design that is beneficial to various led modules, be convenient to the advantage of purchasing and producing; But; But have following defective: 1, the data of this parallel transfer pattern transmission and control signal are nearly 17, and connecting line is many, and the casing wiring seems numerous and diverse; 2, taken the I/O resource of more FPGA; 3, the empty after a little while pin of signal is many, seems economical inadequately; 4, the interface chip that adopts is more, be unfavorable for the design of low-density LED display, and cost is higher; 5, owing to still do not have industry standard, force the LED manufacturer to develop the interface layout that various HUB interface board adapts to each company's different LED module, increased cost.
Summary of the invention
The present invention provides a kind of signal interface circuit and LED display device of led module for there be I/O resource and the cost technical problems of high that connecting line is many, wiring is complicated, taken more FPGA in the signal interface circuit that solves the prior art led module.
For solving the problems of the technologies described above; The technical scheme that the present invention adopts is the signal interface circuit of a kind of led module of design; Comprise LED dot matrix, the horizontal drive circuit and the column drive circuit that are connected with said LED dot matrix; The signal interface circuit of said led module also comprises input socket, accessory power outlet, LVDS interface chip and is used to produce the crystal oscillator of local reference clock that said LVDS interface chip has:
Be used to receive the data difference input end of rgb video data, it is connected with said input socket;
Be used to export the data difference output terminal of rgb video data, it is connected with said accessory power outlet;
Be used to receive the local clock input end of local reference clock, it is connected with the output terminal of said crystal oscillator;
The RGB output terminal that is connected and exports RGB data to said column drive circuit with said column drive circuit;
The LED scan control signal output terminal that is connected and exports LED scan control signal to said column drive circuit with said column drive circuit;
Be connected with said horizontal drive circuit and export the line scanning control signal output ends that line scanning controls signal to said horizontal drive circuit;
The Des/CDR module that is connected with the data difference input end; Its rgb video data that receive said data difference input end input are also therefrom recovered shift clock and are alignd with data bit, and the rgb video data-switching with the input of data difference input end becomes parallel data output then;
One phase-locked clock generation module according to local clock generation phase-locked clock signal;
One input end is connected with the output terminal of said Des/CDR module, phase-locked clock generation module; RGB data cutout and control signal generation module that output terminal and said RGB output terminal, LED scan control signal output terminal link to each other with the line scanning control signal output ends; It receives the parallel data of said Des/CDR module output; And under the effect of the shift clock of said recovery and said phase-locked clock, accomplish the intercepting of rgb video data of decoding, buffering, conversion and the corresponding led module of parallel data; And rgb video data, LED scan control signal and the line scanning of exporting intercepting respectively control signal to said RGB output terminal, LED scan control signal output terminal and line scanning control signal output ends, exports the rgb video data simultaneously;
One with said RGB data cutout and the output terminal of control signal generation module and the serializer that the data difference output terminal joins; Said serializer receives the rgb video data of said RGB data cutout and the output of control signal generation module, and becomes serial data to export the data difference output terminal to the rgb video data-switching that receives.
Said LVDS interface chip also comprises:
The intelligence sample module of the said led module data of one monitoring;
One receives the returning data input end of next led module data;
The returning data output terminal of one output passback data;
The one passback Des/CDR module that is connected with said returning data input end, it receives next led module data of said returning data input end input, and converts parallel data output to;
One is connected and mixes the hybrid circuit of said led module data and next led module data with the output terminal of the output terminal of said intelligence sample module, passback Des/CDR module;
The one passback serializer that is connected with the output terminal of hybrid circuit, it becomes serial data to export the returning data output terminal to next led module data conversion mixed said led module data.
Said LVDS interface chip also comprises the FLASH storer that links to each other with the control signal generation module with said RGB data cutout.
Said crystal oscillator produces the local reference clock.
Said input socket is the 2P socket.
Said accessory power outlet is the 2P socket.
The difference input/output port of said LVDS interface chip is supported the hot plug function.
Said Des/CDR module module comprises CDR clock data restorer and Des deserializer.
Contain led module control signal and module parameter in the said rgb video data stream.
The present invention also provides a kind of LED display device with signal interface circuit of above-mentioned led module.
The present invention also provides a kind of LVDS interface chip that is used for led module, comprising:
Be used to receive the data difference input end of rgb video data;
Be used to export the data difference output terminal of rgb video data;
Be used to receive the local clock input end of local reference clock;
Be used to export the RGB output terminal of RGB data;
Be used to export the LED scan control signal output terminal of LED scan control signal;
Be used to export the line scanning control signal output ends of line scanning control signal;
The Des/CDR module that is connected with the data difference input end; Its rgb video data that receive said data difference input end input are also therefrom recovered shift clock and are alignd with data bit, and the rgb video data-switching with the input of data difference input end becomes parallel data output then;
One phase-locked clock generation module according to local reference clock generation phase-locked clock signal;
One input end is connected with the output terminal of said Des/CDR module, phase-locked clock generation module; RGB data cutout and control signal generation module that output terminal and said RGB output terminal, LED scan control signal output terminal link to each other with the line scanning control signal output ends; It receives the parallel data of said Des/CDR module output; And under the effect of the shift clock of said recovery and said phase-locked clock, accomplish the intercepting of rgb video data of decoding, buffering, conversion and the corresponding led module of parallel data; And rgb video data, LED scan control signal and the line scanning of exporting intercepting respectively control signal to said RGB output terminal, LED scan control signal output terminal and line scanning control signal output ends, exports the rgb video data simultaneously;
One with said RGB data cutout and the output terminal of control signal generation module and the serializer that the data difference output terminal joins; Said serializer receives the rgb video data of said RGB data cutout and the output of control signal generation module, and becomes serial data to export the data difference output terminal to the rgb video data-switching that receives.
Said LVDS interface chip also comprises:
The intelligence sample module of one monitoring led module data;
One receives the returning data input end of next led module data;
The returning data output terminal of one output passback data;
The one passback Des/CDR module that is connected with said returning data input end, it receives next led module data of said returning data input end input, and converts parallel data output to;
One is connected and mixes the hybrid circuit of said led module data and next led module data with the output terminal of the output terminal of said intelligence sample module, passback Des/CDR module;
The one passback serializer that is connected with the output terminal of hybrid circuit, it becomes serial data to export the returning data output terminal to next led module data conversion mixed said led module data
The present invention only needs 2 signal wires can realize buffering driving, decoding and the transmitting function of led module total data and control signal through the LVDS interface chip is set, and connecting line obviously reduces; The casing wiring is very simple, and has reduced the I/O mouth resource that takies FPGA significantly, simultaneously; The interface chip that adopts is few; Help the design of LED display, and help the standardization that led module connects, cost is also lower.
Description of drawings
Below in conjunction with embodiment and accompanying drawing the present invention is elaborated, wherein:
Fig. 1 is a led module logic glue synoptic diagram of the present invention;
Fig. 2 is the led module logic glue synoptic diagram of band monitoring retransmission function of the present invention
Fig. 3 is the LVDS interface chip Logic Circuit Design synoptic diagram of band monitoring retransmission function of the present invention;
Fig. 4 is existing led module 20 line interface synoptic diagram;
Fig. 5 is existing led module logic glue synoptic diagram.
Embodiment
Make a general survey of modern data communication technology, we are not difficult to find that along with the continuous growth to the information flow-rate demand, traditional parallel interface technology has become the bottleneck of further raising message transmission rate.Being mainly used in the serial communication technology of optical fiber communication in the past---SerDes is replacing traditional parallel bus and is becoming the technological main flow of high-speed interface.
SERDES is the abbreviation of parallel series and staticizer SERializer/DESerializer (serializer/and change device).The SerDes interface that two kinds of fundamental types are arranged: the source is (SS) agreement and clock and data recovery (CDR) agreement synchronously.This main difference of two types is how to realize clock control.The source sync cap has one and follows the clock signal that transmits data; CDR does not have separate clock signal, but is embedded in clock in the data.Be the CDR receiver with phase locking at data-signal itself to obtain clock.
The low-voltage differential tranmission techniques is based on the tranmission techniques of Low Voltage Differential Signal LVDS (Low Voltage Differential Signal), and the LVDS interface is claimed the RS644 EBI again.LVDS is a kind of little difference of vibration sub-signal technology, and it uses low-down range signal, through the PCB cabling or the balanced cable transmission data of pair of parallel.This transmission standard adopts constant current two line differential driving patterns, and anti-common-mode noise interference performance is strong, and electromagnetic radiation is little, can not produce ring and signal and switch the spiking that brings, and has good EMI characteristic.Also have advantages such as data reversal is fast, low in energy consumption.Adopt this technology; As long as guarantee that the length of ribbon feeder is enough consistent; And provide good impedance matching to reduce signal reflex at receiving end; A pair of line just can be brought up to the transfer rate of data more than the 800MHz, and transmission range is then successively decreased with the increase of frequency, can reach tens meters to tens centimetres.Because LVDS has these good characteristics, has been widely used in USB interface, PCI Ex, has all adopted the data mode of differential type.
SerDes and low-voltage differential tranmission techniques have remarkable performance, and SerDes IP has created more advantageous conditions with application for the application of difference tranmission techniques with the appearance of the PLD with difference transmitting-receiving interface.At present, companies such as Altera, Xilinx, Actel have all released inside and have been embedded with and do not wait number, and speed is the FPGA device of the SerDes IP kernel of 1.5-3.125G, and LVDS sort signal standard is all supported in the input and output of these FPGA devices IO mouth.The release of the employing of high speed serialization difference tranmission techniques and support high speed serialization difference tranmission techniques device; For realizing apparatus interconnection at a high speed and setting up large-scale electronic system very big convenience is provided undoubtedly, thereby has promoted the technological innovation in fields such as information processing, video demonstration, network communication and data storing and crossed over progressive.
It is not unique, but has its counterpart; Investigate the development history of LED display controller control technology, from digital discrete device to GAL, PAL, arrive on a small scale FPGA again until large-scale F PGA; No matter be collection, conversion, transmission, storage, the distribution of digital video; Or the scan control of LED module, just being based on FPGA is that core makes up, and develops with the development of making FPGA.The data of LED display control system transmitter transmit; Although because of cost factor does not adopt the inner high-grade fpga chip that is embedded with 1.5-3.125G SerDes IP kernel as yet; SerDes and low-voltage differential tranmission techniques have also externally been adopted; Promptly pass through the I/O mouth of FPGA, with video data and the parallel SerDes chip that outputs to of control signal.Can predict, along with the expansion day by day that HD video and high-resolution video are used, with the cost decline of making fpga chip and the reduction of price, the fpga chip that inside is embedded with the SerDes IP kernel will occupy a tiny space in the control system of LED display.
Yet, in the period of nearly 20, the stream data transmission mechanics of communication between led module; Still stop and being confined to the application of separation of C MOS device and not having developedly, the connection between the module still adopts 20 line flat cables to connect, and how wordy the layout connecting line of module is; The chip of usefulness is more, and volume is bigger than normal, and cost is higher; Seem particularly outstanding when especially being applied to the low-density screen; Because of the mixed and disorderly distribution of 20 different line signals of company, also be unfavorable for the foundation and the unification of signal standards simultaneously, be unfavorable for the high-level development and progress of LED display.Based on this; The present invention proposes the led module communication chip and the circuit design scheme of a kind of SerDes of employing communication and low-voltage differential tranmission techniques; There is the special chip of LVDS difference string line interface to be used for the access of LED module data and control signal through set inside; Its application transport speed to the LVDS differential communication signal of several Gbps, only needs 1 pair of twisted-pair feeder can realize the transmission of total data and control signal between led module up to hundreds of Mbps.Utilize inner programmable logic resource simultaneously, accomplish the intercepting of RGB data, the generation and the output of LED control signal.
See also Fig. 1, Fig. 2 and Fig. 3, the signal interface circuit of led module of the present invention comprises: LVDS interface chip, crystal oscillator, input 2P socket and output 2P socket, LED dot matrix, the horizontal drive circuit that is connected with said LED dot matrix, the column drive circuit that is connected with said LED dot matrix.Crystal oscillator is used to produce the local reference clock.
The LVDS interface chip comprises: data difference input end, data difference output terminal, RGB output terminal, LED scan control signal output terminal, line scanning control signal output ends, Des/CDR module, phase-locked clock generation module, RGB data cutout and control signal generation module, serializer (Ser) and FLASH storer.Wherein:
The data difference input end is used to receive the rgb video data of upper level led module or scanning monitor, wherein, contains led module control signal and module parameter in the rgb video data.
The data difference output terminal is used to export the LVDS interface chip of rgb video data to next led module.
The RGB output terminal links to each other with said LED column drive circuit, is used to export the work of RGB data to LED column drive circuit driving LED lamp.
The local clock input end links to each other with said crystal oscillator, is used to receive the local reference clock;
LED scan control signal output terminal links to each other with said LED column drive circuit, is used to export the LED scan control signal to the LED column drive circuit.
The line scanning control signal output ends links to each other with the input end of said horizontal drive circuit, is used to export line scanning and controls signal to horizontal drive circuit control horizontal drive circuit.
The Des/CDR module is connected with the data difference input end; Its rgb video data that receive said data difference input end input are also therefrom recovered shift clock and are alignd with data bit, and the rgb video data-switching with the input of data difference input end becomes parallel data output then.Said Des/CDR module comprises CDR clock data restorer and Des deserializer.
The phase-locked clock generation module generates the phase-locked clock signal according to local clock.
RGB data cutout and control signal generation module; Its input end is connected with the output terminal of said Des/CDR module, phase-locked clock generation module, and output terminal links to each other with serializer with said RGB output terminal, LED scan control signal output terminal, line scanning control signal output ends.RGB data cutout and control signal generation module receive the parallel data of said Des/CDR module output; And under the effect of the shift clock of said recovery and said phase-locked clock, accomplish the intercepting of rgb video data of decoding, buffering, conversion and the corresponding led module of parallel data; And rgb video data, LED scan control signal and the line scanning of exporting intercepting respectively control signal to said RGB output terminal, LED scan control signal output terminal and line scanning control signal output ends, exports the rgb video data simultaneously to serializer.
Serializer (Ser) joins with the output terminal and the data difference output terminal of said RGB data cutout and control signal generation module.Serializer receives the rgb video data of said RGB data cutout and the output of control signal generation module, and becomes serial data to export the data difference output terminal to the rgb video data-switching that receives.
Whole difference input/output ports of said LVDS interface chip are supported the hot plug function.
The FLASH storer links to each other with the control signal generation module with said RGB data cutout, is used to store the parameter of led module.
For information such as the temperature of the correction coefficient of the short circuit of LED lamp and open circuit, LED lamp, led module and voltage are monitored; The signal wire of interface section increase the LVDS differential data input S1_in of dotted portion ± with output S1_out ±; To be used for the realizing monitoring retransmission function, the LVDS interface chip increases state detecting, processing and retransmission function simultaneously.Be that the LVDS interface chip also comprises:
The intelligence sample module, it monitors said led module data;
The returning data input end, next led module data S1_in of its reception ±;
The returning data output terminal, its output passback data S1_out ±;
Passback Des/CDR module, it is connected with said returning data input end, receives the passback data of next led module, and converts parallel data output to;
Hybrid circuit, it is connected and mixes said led module data and next led module data with the output terminal of said intelligence sample module, the output terminal of passback Des/CDR module;
Passback serializer (Ser), it is connected with the output terminal of hybrid circuit, becomes serial data to export the returning data output terminal to next led module data conversion mixed said led module data.
After increasing returning data output terminal and returning data input end,, change input 4P socket and output 4P socket respectively into output 2P socket so in Fig. 2, will import the 2P socket owing to increased the input and output socket.
The principle of work of the signal interface circuit of led module of the present invention is: differential data input S0_in ± reception is from video and system's control data of a scan control plate or a last led module; Lock recovers shift clock mutually under the effect of CDR receiver; And with data bit alignment; Again through outputing to RGB data cutout and scan control signal generator after Des (Deserializes, and change device) 8B/10B decoding, string and the conversion; RGB data cutout and scan control signal generating module are accomplished the intercepting of decoding, buffering, conversion and this led module RGB [] video data of raw data under the effect of receive clock and local phase-locked clock; Generate LED scan control signal CT [] through RGB data cutout and the built-in scan control signal generation circuit of scan control signal generating module again; The line scan signals Ho [7..0] that comprises shift clock SCLK, data latch signal/LATCH, gray scale gate-control signal/EN and deciphered; And through the video demonstration of LPT driving output with realization RGB data; Raw data is through Ser (Serializes simultaneously; Serializer) 8B/10B coding and stringization processing embed the PLL phase-locked loop clock again after differential data is exported S0_out ± be connected to next stage led module.
The parallel delivery outlet of LVDS signaling interface chip can design like this; Video data output R [3..0], G [3..0], B [3..0] be totally four groups of RGB data; Its output function can be through software programming; Except that the various led modules of supporting 1-4 group data structure, adopt R [3..0], G [1..0], B [1..0] data structure virtual support pixel to show; Adopt R [0], G [0], the single group of B [0] data structure, 8 high-order horizontal scanning lines that can be used as 1/16 dynamic scan of remaining R [3..1], G [3..1], B [3..1]; Adopt R [1..0], G [1..0], 2 groups of data structures of B [1..0]; Remaining R [3..2], G [3..2], B [3..2] can be used as multi-branched LED scan control signal SCLK, data latch signal/LATCH and gray scale gate-control signal/EN output, to make things convenient for the led module design.Fixing line scan signals then is totally 8 of Ho [7..0], supports 1/2,1/4,1/8 dynamic scan to show and static the demonstration, can realize that the dynamic scan of 1/3,1/5,1/6 and 1/7 any dutycycle shows through programming simultaneously.
In interface chip, embed the intelligence sample module and can accomplish obtaining of led module monitor data S at the corresponding levels []; Differential data input S1_in ± reception is from the Monitoring Data of next led module;, mixes with the monitor signal of module at the corresponding levels Des after unstringing through mixing module; Arrive the Ser stringization coding of input end again, through the past upper level led module of differential data output biography or the scan control plate of input end.
The FLASH module that in interface chip, embeds is used to store led module parameter at the corresponding levels, RGB correction data and other Useful Information, is used for the pixel correction and the Based Intelligent Control of brightness, colourity.
When not adopting the passback monitoring function, remove Fig. 5 dotted portion, be lower-cost list to the differential lines transfer scheme.
As for the encapsulation of LVDS signaling interface chip, can adopt miniature TQFP encapsulation, QFN encapsulation, as adopting the BGA encapsulation, then in the led module design of four laminates, have more advantage.
The signal interface circuit of led module of the present invention can be used for various LED display device, like monochromatic LED display screen, double-basis LED display, full-color LED display screen etc.
The present invention has following advantage:
1, adopts 1 high speed LVDS serial link, only need 2 signal wires, can realize buffering driving, decoding and the transmitting function of led module total data and control signal.
2, utilize the internal resource of chip to accomplish the data of led module and intercepting, driving and the decoding of control signal, the virtual support pixel shows simultaneously, 1--16 takes action attitude scanning or static drive.
3, excellent performance; Traffic rate can be up to 270Mbps to 3.125Gbps; Data amount transmitted is big, anti-interference good, reliability is high; The LVDS data rate can be up to 270Mbps to 3.125Gbps, and the interface chip that while separation of C MOS chip is integrated replaces, and compares its circuit of prior art and simplifies greatly.
4, it has reduced the quantity of signal connecting line between led module significantly, makes LED casing wires design more succinct, and cost reduces.
5, the function of output pin can define programming voluntarily by the user, and this has brought dirigibility for the design of pcb board.
6, expand 1 LVDS serial return link, have the signal monitoring function, improved the application level of LED display.
7, reduce the I/O mouth output of scan control plate FPGA significantly, allow to adopt the FPGA of littler encapsulation or simpler device, further reduced cost.
8, the standardization effort that helps led module connection and communications protocol.
The above is merely preferred embodiment of the present invention; Not in order to restriction the present invention; All any modifications of within spirit of the present invention and principle, being done, be equal to replacement and improve; For example will singly change two pairs of difference videos input etc. into, all should be included within protection scope of the present invention the input of difference video.
Claims (10)
1. the signal interface circuit of a led module; Comprise LED dot matrix, the horizontal drive circuit and the column drive circuit that are connected with said LED dot matrix; It is characterized in that: the signal interface circuit of said led module also comprises input socket, accessory power outlet, LVDS interface chip and is used to produce the crystal oscillator of local reference clock that said LVDS interface chip has:
Be used to receive the data difference input end of rgb video data, it is connected with said input socket;
Be used to export the data difference output terminal of rgb video data, it is connected with said accessory power outlet;
Be used to receive the local clock input end of local reference clock, it is connected with the output terminal of said crystal oscillator;
The RGB output terminal that is connected and exports RGB data to said column drive circuit with said column drive circuit;
The LED scan control signal output terminal that is connected and exports LED scan control signal to said column drive circuit with said column drive circuit;
Be connected with said horizontal drive circuit and export the line scanning control signal output ends that line scanning controls signal to said horizontal drive circuit;
The Des/CDR module that is connected with the data difference input end; Its rgb video data that receive said data difference input end input are also therefrom recovered shift clock and are alignd with data bit, and the rgb video data-switching with the input of data difference input end becomes parallel data output then;
One phase-locked clock generation module according to local reference clock generation phase-locked clock signal, it is connected with said local clock input end;
One input end is connected with the output terminal of said Des/CDR module, phase-locked clock generation module; RGB data cutout and control signal generation module that output terminal and said RGB output terminal, LED scan control signal output terminal link to each other with the line scanning control signal output ends; It receives the parallel data of said Des/CDR module output; And under the effect of the shift clock of said recovery and said phase-locked clock, accomplish the intercepting of rgb video data of decoding, buffering, conversion and the corresponding led module of parallel data; And rgb video data, LED scan control signal and the line scanning of exporting intercepting respectively control signal to said RGB output terminal, LED scan control signal output terminal and line scanning control signal output ends, exports the rgb video data simultaneously;
One with said RGB data cutout and the output terminal of control signal generation module and the serializer that the data difference output terminal joins; Said serializer receives the rgb video data of said RGB data cutout and the output of control signal generation module, and becomes serial data to export the data difference output terminal to the rgb video data-switching that receives.
2. the signal interface circuit of led module according to claim 1, it is characterized in that: said LVDS interface chip also comprises:
The intelligence sample module of the said led module data of one monitoring;
One receives the returning data input end of next led module data;
The returning data output terminal of one output passback data;
The one passback Des/CDR module that is connected with said returning data input end, it receives next led module data of said returning data input end input, and converts parallel data output to;
One is connected and mixes the hybrid circuit of said led module data and next led module data with the output terminal of the output terminal of said intelligence sample module, passback Des/CDR module;
The one passback serializer that is connected with the output terminal of hybrid circuit, it becomes serial data to export the returning data output terminal to next led module data conversion mixed said led module data.
3. the signal interface circuit of led module according to claim 1 is characterized in that: said LVDS interface chip also comprises the FLASH storer that links to each other with the control signal generation module with said RGB data cutout.
4. the signal interface circuit of led module according to claim 1, it is characterized in that: said data difference input end and data difference output terminal are hot-plug interface.
5. the signal interface circuit of led module according to claim 1, it is characterized in that: said input socket is the 2P socket.
6. the signal interface circuit of led module according to claim 1, it is characterized in that: said accessory power outlet is the 2P socket.
7. the signal interface circuit of led module according to claim 1, it is characterized in that: said Des/CDR module comprises CDR clock data restorer and Des deserializer.
8. LED display device with signal interface circuit of each said led module of claim 1 to 7.
9. LVDS interface chip that is used for led module is characterized in that comprising:
Be used to receive the data difference input end of rgb video data;
Be used to export the data difference output terminal of rgb video data;
Be used to receive the local clock input end of local reference clock;
Be used to export the RGB output terminal of RGB data;
Be used to export the LED scan control signal output terminal of LED scan control signal;
Be used to export the line scanning control signal output ends of line scanning control signal;
The Des/CDR module that is connected with the data difference input end; Its rgb video data that receive said data difference input end input are also therefrom recovered shift clock and are alignd with data bit, and the rgb video data-switching with the input of data difference input end becomes parallel data output then;
One phase-locked clock generation module according to local reference clock generation phase-locked clock signal;
Input end is connected with the output terminal of said Des/CDR module, phase-locked clock generation module; RGB data cutout and control signal generation module that output terminal and said RGB output terminal, LED scan control signal output terminal link to each other with the line scanning control signal output ends; It receives the parallel data of said Des/CDR module output; And under the effect of the shift clock of said recovery and said phase-locked clock, accomplish the intercepting of rgb video data of decoding, buffering, conversion and the corresponding led module of parallel data; And rgb video data, LED scan control signal and the line scanning of exporting intercepting respectively control signal to said RGB output terminal, LED scan control signal output terminal and line scanning control signal output ends, exports the rgb video data simultaneously;
One with said RGB data cutout and the output terminal of control signal generation module and the serializer that the data difference output terminal joins; Said serializer receives the rgb video data of said RGB data cutout and the output of control signal generation module, and becomes serial data to export the data difference output terminal to the rgb video data-switching that receives.
10. the LVDS interface chip that is used for led module according to claim 9 is characterized in that: said LVDS interface chip also comprises:
The intelligence sample module of one monitoring led module data;
One receives the returning data input end of next led module data;
The returning data output terminal of one output passback data;
The one passback Des/CDR module that is connected with said returning data input end, it receives next led module data of said returning data input end input, and converts parallel data output to;
One is connected and mixes the hybrid circuit of said led module data and next led module data with the output terminal of the output terminal of said intelligence sample module, passback Des/CDR module;
The one passback serializer that is connected with the output terminal of hybrid circuit, it becomes serial data to export the returning data output terminal to next led module data conversion mixed said led module data.
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