CN102662726A - Virtual machine simulating method and computer device - Google Patents
Virtual machine simulating method and computer device Download PDFInfo
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Abstract
The invention relates to simulation method and a device for TLB (Translation Look-aside Buffer) in a virtual machine, wherein the method comprises the following steps: the virtual machine fills the TLB table entry of a target CPU (Central Processing Unit) in the TLB of a local CPU, and when the target CPU needs to carry out a memory accessing instruction, the virtual machine translates the memory accessing instruction into a memory accessing instruction capable of being executed by the local CPU; when the virtual machine executes the translated memory accessing instruction, the TLB of the local CPU converts the virtual address carried by the memory accessing instruction into a physical address for accessing of the translated memory accessing instruction, thereby completing the memory accessing operation of the memory accessing instruction executed by the target CPU. According to the invention, the simulation on the TLB in the heterogeneous virtual machine is realized by the method of combining hardware and software, and the simulation efficiency of the TLB is improved.
Description
Technical field
The present invention relates to Computer Systems Organization, virtual machine technique field, relate in particular to a kind of analogy method and computer equipment of virtual machine.
Background technology
Bypass conversion buffered (Translation Look-aside Buffer, TLB) simulation has critical impact to the performance of virtual machine, and in all instructions that CPU carries out, the instruction above 50% is an access instruction.The now general equal virtual support memory mechanism of CPU, the logical address that promptly contains in the instruction converts physical address into through page table.TLB is the hardware supports parts that are used to quicken the page table conversion, has higher execution frequency.
The main method of pure software that adopts realizes the TLB simulation in the current virtual machine.In the dummy machine system of increasing income (for example Bochs, QEMU etc.), all, comprising: the traversal tlb entry with the execution mechanism of TLB in the pure software method simulation dummy machine system; Judge whether list item matees the virtual address of input; If hit, return the physical address that comprises in the list item; If do not hit, execute exception is handled.The analogy method of pure software has good portability, but has introduced higher simulation cost: an access instruction for target CPU carries out is used to simulate TLB and searches generally at least tens of the needed dummy instructions of algorithm.In the occasion that the virtual machine performance is had higher requirements, the easy form performance bottleneck of TLB simulation link.
In order to overcome the shortcoming of pure software method; Some virtual machine adopts the hardware simulation mode; With local physics TLB simulated target TLB; This analogy method is mainly used in the virtual machine (for example Vmware, VirtualBox, KVM etc.) with architecture, promptly preserves the page table snapshot of application program in the goal systems among the TLB of local cpu, directly carries out the access instruction of target CPU with local cpu.
The hardware simulation mode has outstanding odds for effectiveness than pure software method, but has limited portability, can only in the virtual machine of same architecture, could use.For the isomery virtual machine,, therefore also can't directly utilize the TLB simulated target TLB of local cpu owing to can't on local cpu, directly carry out the access instruction of target architecture.
Summary of the invention
The objective of the invention is defective to prior art; A kind of analogy method and computer equipment of virtual machine are provided; Realized utilizing software and hardware to accomplish the simulation of TLB in the virtual machine jointly, this analogy method can be applicable to the isomery virtual machine simultaneously, and the TLB simulation precision is high.
In order to achieve the above object, the invention provides a kind of analogy method of virtual machine, said method comprising the steps of: virtual machine takes out first access instruction that target CPU will carry out; Obtain the second corresponding access instruction of said first access instruction, said second access instruction is the executable instruction of local cpu that said first access instruction of virtual machine translation obtains; When virtual machine was carried out said second access instruction, virtual address and the list item among the TLB that the bypass conversion buffered TLB of local cpu carries said second access instruction carried out matching check, judged whether the list item that exists said virtual address corresponding; When having the list item of said virtual address correspondence among the TLB of local cpu; The TLB of local cpu is a physical address with said virtual address translation; Use so that local cpu with the actual access address of said physical address as said second access instruction, is normally carried out said second access instruction.
Preferably; Saidly also comprise after judging whether to exist the corresponding list item of said virtual address: when not having the corresponding list item of said virtual address among the TLB of local cpu; It is unusual that local cpu produces TLB miss; And change the exception handler inlet of carrying out the local operation system registry over to, carry out simulation process by the local operation system unusually to said TLB miss
Preferably; The TLB of said local cpu carries out matching check with the list item among said virtual address and the TLB, and judge whether to exist the corresponding list item of said virtual address also to comprise before: the tlb entry that virtual machine is simulated the quilt among the target CPU is filled up among the TLB of local cpu.
Preferably; Said virtual machine obtains the second corresponding access instruction of said first access instruction and is specially: virtual machine is preserved formation according to the instruction of translation back; Judge whether said first access instruction has been translated into second access instruction of local cpu; If then preserve the formation and obtain said second access instruction from said translation back instruction; Otherwise said first access instruction is translated as said second access instruction, and deposits said second access instruction instruction preservation formation of in said translation back.
Preferably, said target CPU is different architectures with said local cpu; The page unit that TLB in TLB among the said target CPU and the said local cpu supports big or small identical.
Preferably, said second access instruction is specially an access instruction, or an access instruction sequence.
Preferably; Saidly carried out simulation process unusually and be specially to said TLB miss by the local operation system: the local operation system discern reason of unusual generation in exception handler; Judge that said is after coming the TLB miss of self virtualizing machine unusual, to produce the unusual hardware processing method of TLB miss among the simulated target CPU and handle unusually.
Correspondingly, in order to achieve the above object, the embodiment of the invention also provides a kind of computer equipment, and said computer equipment comprises: virtual machine, and said virtual machine comprises: get the finger unit, be used to take out first access instruction that target CPU will carry out; Instruction fetch unit is used to obtain the second corresponding access instruction of said first access instruction, and said second access instruction is the executable instruction of local cpu that said first access instruction of virtual machine translation obtains;
Said computer equipment also comprises local cpu, and said local cpu comprises: bypass conversion buffered TLB, and virtual address that is used for said second access instruction is carried and the list item of TLB carry out matching check, judge whether the list item that exists said virtual address corresponding; When having the list item of said virtual address correspondence among the TLB of local cpu; TLB is a physical address with said virtual address translation; Use so that local cpu with the actual access address of said physical address as said second access instruction, is normally carried out said second access instruction.
Preferably, the virtual machine in the embodiment of the invention also comprises: the TLB operating unit is used for the bypass conversion buffered tlb entry that the quilt of target CPU is simulated is filled up among the TLB of local cpu.
Preferably; Said instruction fetch unit specifically is used for: preserve formation according to the instruction of translation back; Judge whether said first access instruction has been translated into second access instruction of local cpu, if then preserve the formation and obtain said second access instruction from said translation back instruction; Otherwise said first access instruction is translated as said second access instruction, and deposits said second access instruction instruction preservation formation of in said translation back.
Preferably, said target CPU is different architectures with said local cpu; The page unit that TLB in TLB among the said target CPU and the said local cpu supports big or small identical.
In the above embodiment of the present invention, virtual machine is filled up to the tlb entry among the target CPU among the TLB of local cpu, and when target CPU will carry out an access instruction, virtual machine was translated as the executable access instruction of local cpu with this access instruction; When virtual machine was carried out the access instruction after the translation, the virtual address translation that the TLB of local cpu carries access instruction was a physical address, supplied the access instruction visit after the translation, accomplished the accessing operation of the access instruction that target CPU will carry out thus; If do not comprise the corresponding list item of virtual address that access instruction is carried among the TLB of local cpu; It is unusual that local cpu produces TLB miss; And change the exception handler inlet of carrying out the registration of local operation system over to, being handled by the unusual hardware processing method of generation TLB miss among the local operation system simulation target CPU should be unusual.Thus, the method that the present invention uses hardware and software to combine has realized the simulation of TLB in the isomery virtual machine, has improved the simulation precision of TLB in the virtual machine.
Description of drawings
The analogy method process flow diagram of a kind of virtual machine that Fig. 1 provides for the embodiment of the invention;
The analogy method process flow diagram of the another virtual machine that Fig. 2 provides for the embodiment of the invention;
A kind of computer equipment synoptic diagram that Fig. 3 provides for the embodiment of the invention.
Embodiment
Through accompanying drawing and embodiment, technical scheme of the present invention is done further detailed description below.At first the vocabulary of terms of using in the present specification is made an explanation:
1, local platform is meant the operation platform at software virtual machine place, is real physical platform;
2, target platform is meant the platform of software virtual machine in the run duration simulation, the platform that target software relied on that just in virtual machine, moves.
3, local cpu is the CPU in the local platform, and target CPU is the CPU in the target platform.
When 4, the local platform of virtual machine is identical with target platform, be called the isomorphism virtual machine, otherwise be called the isomery virtual machine.
5, TLB hits and is meant the list item that comprises the virtual address correspondence of importing among the TLB, can convert physical address to.TLB does not hit and is meant the list item that does not comprise the virtual address correspondence of importing among the TLB.
6, destination OS is meant the operating system of moving in the virtual machine, and the local operation system is the operating system of on local physical host, moving.
The analogy method process flow diagram of a kind of virtual machine that Fig. 1 provides for the embodiment of the invention.Present embodiment is described the process of utilizing software and hardware to accomplish the simulation of TLB in the virtual machine jointly in detail.As shown in Figure 1, present embodiment may further comprise the steps:
Virtual machine constantly takes out the instruction that next bar will be carried out in a looping fashion from the target internal memory in the process of carrying out target program, if this instruction is an access instruction, the method for then using the embodiment of the invention to provide is simulated the implementation of this access instruction; Otherwise the execution of instruction and the present invention are irrelevant.
Need to prove that the method that the embodiment of the invention provided is applicable to the isomery virtual machine, promptly the architecture of local cpu and target CPU is inequality.
In addition, in the embodiment of the invention, the equal virtual support storage system of local cpu and target CPU, and local cpu and target CPU all comprise the hardware TLB that is used for virtual address and physical address translations; TLB in the local cpu and the TLB among the target CPU will support the page unit of identical size, and this condition can both be met in existing main platform usually, so the feasibility of the method that provides of the embodiment of the invention is better; Local cpu provides the operational order for TLB, and promptly the read write command of tlb entry is read and write local TLB so that virtual machine can use these to instruct.
The concrete grammar that virtual machine obtains the second corresponding access instruction of said first access instruction is: virtual machine is preserved formation according to the instruction of translation back; Judge whether first access instruction has been translated into second access instruction of local cpu; If then preserve the formation and obtain said second access instruction from said translation back instruction; Otherwise first access instruction is translated as executable second access instruction of local cpu.
Virtual machine is at first retrieved in the instruction preservation formation after translation when first access instruction that Simulation execution is taken out, and checks whether this instruction has been translated into second access instruction that local cpu can be carried out.It is a formation that is used to preserve all translation post codes in the virtual machine that formation is preserved in the instruction of translation back, if the instruction of carrying out is translated, second access instruction that the local cpu after then virtual machine directly will be translated can be carried out is taken out and carried out.Second access instruction that if the instruction of translation back is preserved does not have target CPU to carry out in the formation the corresponding local cpu of first access instruction is carried out; Virtual machine translation first access instruction then; And the code after will translating is kept in this translation back instruction preservation formation; So that when virtual machine is carried out first access instruction next time again, need not translate again, directly from this formation, take out and carry out second access instruction after the translation.
The employed method of second access instruction that virtual machine is translated into local cpu with first access instruction among the target CPU is: before adopting the binary command translation rule to guarantee translation, the instruction of translation back is at semantically equivalence.Comprise the visit action for local internal memory in the instruction sequence after the translation, the virtual address that comprises in the instruction is before identical with translation.
Need to prove that second access instruction in the present embodiment can be a single instruction, also can be an instruction sequence, promptly a plurality of instructions, this is by the architecture decision of target CPU and local cpu.
When step 103, virtual machine were carried out said second access instruction, virtual address and the list item among the TLB that the bypass conversion buffered TLB of local cpu carries said second access instruction carried out matching check, judged whether the list item that exists said virtual address corresponding.
During second access instruction of virtual machine after getting access to translation; This instruction sequence is dropped into the local cpu operation; Carried the virtual address that target CPU will visit in second access instruction; The inner TLB of local cpu checks with hardware mode and comprises the corresponding list item of this virtual address among this TLB, promptly inquires about this virtual address and whether can convert physical address into, just uses the exception handling of TLB itself to judge whether and can this virtual address translation be physical address.Wherein, the virtual address that above-mentioned virtual address will be visited by dummy instruction, physical address is local physical memory addresses, corresponding to the zone of target internal memory.
Tlb entry among the target CPU is filled up among the TLB of local cpu; Inquiry and the address translation flow process of pure hardware approach simulated target TLB have been realized using; To have only the access instruction after the translation in the translation post code in the step 102; Need not generate the retrieval of TLB, the judgement code that whether hits, thereby make the translation cost be reduced to minimum radius, execution speed is higher than the scale of tens instructions using the pure software method far away.
Step 104; When having the list item of said virtual address correspondence among the TLB of local cpu; The TLB of local cpu is a physical address with said virtual address translation; Use so that local cpu with the actual access address of said physical address as said second access instruction, is normally carried out said second access instruction.
Virtual machine according to the virtual address in second access instruction, obtains the virtual address physical address corresponding by local cpu after second access instruction is dropped into the local cpu operation in TLB.As long as the local operation system is configured to local cpu to launch the pattern of page table conversion; Local cpu at first carries out " virtual address-physical address " conversion through TLB when execution command; The virtual address that TLB will change and all list items of self preserving carry out matching check; If there is the list item of same virtual address, then return physical address corresponding, supply local cpu in carrying out follow-up memory access flow process, to use.
Physical address after local cpu will be changed is the physical location of memory access, according to the visit action of the local internal memory of the semantic execution of instructing, with the execution of normal completion second access instruction.
Because TLB generally has higher hit rate; Therefore TLB hits; The normal complete situation of second access instruction accounts for the important proportion of TLB simulation; Because TLB hits the Shi Buhui generation unusually, therefore also need not execute exception processing section in kernel again, make virtual machine produce fairly large performance boost on the whole.
In the embodiment of the invention, when target CPU will carry out an access instruction, virtual machine at first obtained the executable access instruction of local cpu that this access instruction is corresponding; When virtual machine was carried out the access instruction after the translation, the virtual address translation that the TLB of local cpu carries access instruction was a physical address, supplied the access instruction visit after the translation, accomplished the accessing operation of the access instruction that target CPU will carry out thus.Thus, the method that the present invention uses hardware and software to combine has realized the simulation of TLB in the isomery virtual machine, has improved the simulation precision of TLB in the virtual machine
The analogy method process flow diagram of the another virtual machine that Fig. 2 provides for the embodiment of the invention.As shown in Figure 2, present embodiment may further comprise the steps:
Virtual machine constantly takes out the instruction that next bar will be carried out in a looping fashion from the target internal memory in the process of carrying out target program, if this instruction is an access instruction, the method for then using the embodiment of the invention to provide is simulated the implementation of this access instruction; Otherwise the execution of instruction and the present invention are irrelevant.
Step 202, virtual machine is preserved formation according to the instruction of translation back, judges whether first access instruction has been translated into second access instruction of local cpu, if then preserve the formation from said translation back instruction and obtain said second access instruction; Otherwise first access instruction is translated as executable second access instruction of local cpu.
Virtual machine is at first retrieved in the instruction preservation formation after translation when first access instruction that Simulation execution is taken out, and checks whether this instruction has been translated into second access instruction that local cpu can be carried out.It is a formation that is used to preserve all translation post codes in the virtual machine that formation is preserved in the instruction of translation back, if the instruction of carrying out is translated, second access instruction that the local cpu after then virtual machine directly will be translated can be carried out is taken out and carried out.Second access instruction that if the instruction of translation back is preserved does not have target CPU to carry out in the formation the corresponding local cpu of first access instruction is carried out; Virtual machine translation first access instruction then; And the code after will translating is kept in this translation back instruction preservation formation; So that when virtual machine is carried out first access instruction next time again, need not translate again, directly from this formation, take out and carry out second access instruction after the translation.
During second access instruction of virtual machine after getting access to translation; This instruction sequence is dropped into the local cpu operation; Carried the virtual address that target CPU will visit in second access instruction; The inner TLB of local cpu checks with hardware mode and comprises the corresponding list item of this virtual address among this TLB, promptly inquires about this virtual address and whether can convert physical address into, just uses the exception handling of TLB itself to judge whether and can this virtual address translation be physical address.Wherein, the virtual address that above-mentioned virtual address will be visited by dummy instruction, physical address is local physical memory addresses, corresponding to the zone of target internal memory.
The virtual address of carrying according to said second access instruction; Whether exist among the TLB of inquiry local cpu before the corresponding list item of said virtual address; Present embodiment also comprises: step 206, the tlb entry that the quilt among the target CPU is simulated is filled up among the TLB of local cpu.
The opportunity of the operation of virtual machine execution in step 206 is identical with the opportunity of this hardware action of execution among the target CPU.
Preferably, when destination OS was dispatched new process, virtual machine can be filled up to the tlb entry that the quilt among the target CPU is simulated among the TLB of local cpu.
Preferably, on target CPU, carry out page table more during new element, virtual machine can be with corresponding tlb entry in the tlb entry replacement local cpu after upgrading among the target CPU.
Preferably, when target CPU generation TLB miss was unusual, virtual machine can be carried out list item replacement action, used the tlb entry in the page table content replacement local cpu in the target internal memory.
Preferably, virtual machine can also use local cpu that the operational order for TLB is provided, the tlb entry in the display update local cpu.
Tlb entry among the target CPU is filled up among the TLB of local cpu; Inquiry and the address translation flow process of pure hardware approach simulated target TLB have been realized using; To have only the access instruction after the translation in the translation post code in the step 202; Need not generate the retrieval of TLB, the judgement code that whether hits, thereby make the translation cost be reduced to minimum radius, execution speed is higher than the scale of tens instructions using the pure software method far away.
Virtual machine according to the virtual address in second access instruction, obtains the virtual address physical address corresponding by local cpu after second access instruction is dropped into the local cpu operation in TLB.As long as the local operation system is configured to local cpu to launch the pattern of page table conversion; Local cpu at first carries out " virtual address-physical address " conversion through TLB when execution command; The virtual address that TLB will change and all list items of self preserving carry out matching check; If there is the list item of same virtual address, then return physical address corresponding, supply local cpu in carrying out follow-up memory access flow process, to use.
If there is not the corresponding list item of said virtual address among the TLB of local cpu, it is unusual that local cpu produces TLB miss, handled by the abnormality processing functional module in the local operation system that this is unusual.
Unusually carrying out simulation process by the local operation system to said TLB miss is specially: the local operation system discerns the unusual reason that produces in exception handler; Judge that said is after coming the TLB miss of self virtualizing machine unusual, to produce the unusual hardware processing method of TLB miss among the simulated target CPU and handle unusually.
Need to prove that in different architectures, TLB miss exception handling procedure is different.In the TLB of hardware management (is representative with X86); TLB is when generation miss is unusual; At first in physical memory, carry out the page table lookup action by CPU; If in page table, find effective physical address, then fill out among the TLB current lookup result is counter, thereby when visiting same virtual address next time, can directly in TLB, obtain conversion.In the TLB of software administration (is representative with MIPS); TLB is when generation miss is unusual; CPU itself is only unusual to the operating system report, by the action of searching of page table in the operating system completion physical memory, if in page table, find effective physical address; Then call specific TLB read write command, explicit fill out among the TLB current lookup result is counter by operating system.No matter be in any type, virtual machine all is simulation and the behavior that target hardware is complementary, and on the opportunity that the TLB of target CPU is modified, carries out the modify of local TLB.
In the embodiment of the invention, virtual machine is filled up to the tlb entry among the target CPU among the TLB of local cpu, and when target CPU will carry out an access instruction, virtual machine was translated as the executable access instruction of local cpu with this access instruction; When virtual machine was carried out the access instruction after the translation, the virtual address translation that the TLB of local cpu carries access instruction was a physical address, supplied the access instruction visit after the translation, accomplished the accessing operation of the access instruction that target CPU will carry out thus; If do not comprise the corresponding list item of virtual address that access instruction is carried among the TLB of local cpu; It is unusual that local cpu produces TLB miss; And change the exception handler inlet of carrying out the registration of local operation system over to, being handled by the unusual hardware processing method of generation TLB miss among the local operation system simulation target CPU should be unusual.Thus, the method that the present invention uses hardware and software to combine has realized the simulation of TLB in the isomery virtual machine, has improved the simulation precision of TLB in the virtual machine.
The access instruction that will carry out with a target CPU below is an example, and the method for TLB simulation in the isomery virtual machine is described.
Suppose that the CPU in the main frame is the CPU of MIPS structure; The CPU of virtual machine is the CPU of X86; In X86CPU, use the 4K page; In MIPS CPU, then generally can support different page sizes such as 4K, 16K, even can mix the page table that uses different page units, satisfy the precondition of using this method at the CPU run duration.4 TLB operational order: TLBP (query entries), TLBR (reading clauses and subclauses), TLBWI (writing clauses and subclauses), TLBWR (random write clauses and subclauses) are provided in the MIPS instruction set.This four instructions all is a privileged instruction, must under franchise attitude, carry out, and whole necessary means of operating local TLB are provided.
Suppose that virtual machine uses continuous local physical memory simulation X86 physical memory, its initial physical address is 0x40000000.In X86CPU, the mapping below existing in the page table of certain application program:
[virtual address 0x80000000, physical address 0x50000]
And this mapping exists in the TLB of local cpu, and its content is:
[virtual address 0x80000000, physical address 0x40050000]
The access instruction below if application program is carried out:
MOV?EAX，[0x80000002]
Become following MIPS instruction through virtual machine translation:
lui?t0，0x8000
ori?t0?0x0002
1w?s0，0(t?0)
Wherein, register t0 has preserved the virtual address that original X86 instruction will be visited; S0 is used for the simulated target eax register, is used for preserving the data that read from internal memory.
Local MIPS is when carrying out the last item 1w instruction, and page base address (0x80000000) the inquiry TLB with virtual address is complementary with list item among the TLB, is 0x40050000 thereby take out the physics page base address.This physical address is added the page or leaf bias internal amount (0x2) of former virtual address, and the local physical address of finally being visited is 0x40050002.This address is the X86 target physical address of virtual machine simulation just, thereby the semanteme of the MOV instruction of Simulation execution is correctly simulated.
Describe through above-mentioned concrete example, explained that the feasibility of the TLB analogy method that the embodiment of the invention provides is good, efficient is high.
Correspondingly, the present invention also provides analogue means bypass conversion buffered in a kind of virtual machine.A kind of computer equipment synoptic diagram that Fig. 3 provides for the embodiment of the invention.As shown in Figure 3, present embodiment comprises with lower unit:
Virtual machine 301, virtual machine 301 comprises: get finger unit 303, be used to take out first access instruction that target CPU will carry out; Instruction fetch unit 304 is used to obtain the second corresponding access instruction of said first access instruction, and said second access instruction is the executable instruction of local cpu that said first access instruction of virtual machine translation obtains.
Need to prove that the virtual machine that the embodiment of the invention provided both can be the isomorphism virtual machine, also can be the isomery virtual machine, promptly local cpu can be identical architecture with target CPU, also can be different architectures.For the isomorphism virtual machine, virtual machine can directly utilize the TLB of local cpu simulated target CPU to carry out flow process, and therefore, the simulation that the embodiment of the invention will only be directed against TLB in the isomery virtual machine is described in detail.
In addition, in the embodiment of the invention, the equal virtual support storage system of local cpu and target CPU, and local cpu and target CPU all comprise the hardware TLB that is used for virtual address and physical address translations; TLB in the local cpu and the TLB among the target CPU will support the page unit of identical size, and this condition can both be met in existing main platform usually, so the device that the embodiment of the invention provides has extensive applicability; Local cpu provides the operational order for TLB, and promptly the read write command of tlb entry is read and write local TLB so that virtual machine can use these to instruct.
Instruction fetch unit 304 specifically is used for: preserve formation according to the instruction of translation back; Judge whether said first access instruction has been translated into second access instruction of local cpu; If then preserve the formation and obtain said second access instruction from said translation back instruction; Otherwise said first access instruction is translated as said second access instruction, and deposits said second access instruction instruction preservation formation of in said translation back.
Virtual machine is when first access instruction that Simulation execution is taken out, and instruction fetch unit 304 is at first retrieved in the instruction preservation formation after translation, checks whether this instruction has been translated into second access instruction that local cpu can be carried out.It is a formation that is used to preserve all translation post codes in the virtual machine that formation is preserved in the instruction of translation back, if the instruction of carrying out is translated, second access instruction that the local cpu after then virtual machine directly will be translated can be carried out is taken out and carried out.Second access instruction that if the instruction of translation back is preserved does not have target CPU to carry out in the formation the corresponding local cpu of first access instruction is carried out; Virtual machine translation first access instruction then; And the code after will translating is kept in this translation back instruction preservation formation; So that when virtual machine is carried out first access instruction next time again, need not translate again, directly from this formation, take out and carry out second access instruction after the translation.
The employed method of second access instruction that virtual machine is translated into local cpu with first access instruction among the target CPU is: before adopting the binary command translation rule to guarantee translation, the instruction of translation back is at semantically equivalence.Comprise the visit action for local internal memory in the instruction sequence after the translation, the virtual address that comprises in the instruction is before identical with translation.
Need to prove that second access instruction in the present embodiment can be a single instruction, also can be an instruction sequence, promptly a plurality of instructions, this is by the architecture decision of target CPU and local cpu.
Local cpu 302, local cpu 302 comprises: TLB305, virtual address that is used for said second access instruction is carried and the list item of TLB305 carry out matching check, judge whether the list item that exists said virtual address corresponding; When having the list item of said virtual address correspondence among the TLB305 of local cpu 302, TLB305 is a physical address with said virtual address translation, uses so that said second access instruction of local cpu 302 normal execution
Preferably, virtual machine 301 also comprises: TLB operating unit 306 is used for the bypass conversion buffered tlb entry that the quilt of target CPU is simulated is filled up among the TLB305 of local cpu 302.
Access instruction after virtual machine will be translated drops into local cpu 302 operations; Carry out access instruction by local cpu 302 simulated target CPU, carry out in the process of access instruction at local cpu, local TLB305 is with the list item among this TLB of hardware mode inspection; To judge whether and can the virtual address dress that access instruction is carried be changed to physical address; If can, then normally carry out access instruction, otherwise the method for simulated target hardware processing TLB miss is unusual.
The professional should further recognize; The unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein; Can realize with electronic hardware, computer software or the combination of the two; For the interchangeability of hardware and software clearly is described, the composition and the step of each example described prevailingly according to function in above-mentioned explanation.These functions still are that software mode is carried out with hardware actually, depend on the application-specific and the design constraint of technical scheme.The professional and technical personnel can use distinct methods to realize described function to each certain applications, but this realization should not thought and exceeds scope of the present invention.
The software module that the method for describing in conjunction with embodiment disclosed herein or the step of algorithm can use hardware, processor to carry out, perhaps the combination of the two is implemented.Software module can place the storage medium of any other form known in random access memory (RAM), internal memory, ROM (read-only memory) (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or the technical field.
Above-described embodiment; The object of the invention, technical scheme and beneficial effect have been carried out further explain, and institute it should be understood that the above is merely embodiment of the present invention; And be not used in qualification protection scope of the present invention; All within spirit of the present invention and principle, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (11)
1. the analogy method of a virtual machine is characterized in that, said method comprises:
Virtual machine takes out first access instruction that target CPU will carry out;
Virtual machine obtains the second corresponding access instruction of said first access instruction, and said second access instruction is the executable instruction of local cpu that said first access instruction of virtual machine translation obtains;
When virtual machine was carried out said second access instruction, virtual address and the list item among the TLB that the bypass conversion buffered TLB of local cpu carries said second access instruction carried out matching check, judged whether the list item that exists said virtual address corresponding;
When having the list item of said virtual address correspondence among the TLB of local cpu; The TLB of local cpu is a physical address with said virtual address translation; Use so that local cpu with the actual access address of said physical address as said second access instruction, is normally carried out said second access instruction.
2. the analogy method of virtual machine as claimed in claim 1; It is characterized in that; Saidly also comprise after judging whether to exist the corresponding list item of said virtual address: when not having the corresponding list item of said virtual address among the TLB of local cpu; It is unusual that local cpu produces TLB failure TLB miss, and change the exception handler inlet of carrying out the local operation system registry over to, carries out simulation process by the local operation system unusually to said TLB miss.
3. the analogy method of virtual machine as claimed in claim 1; It is characterized in that; The TLB of said local cpu carries out matching check with the list item among said virtual address and the TLB, and judge whether to exist the corresponding list item of said virtual address also to comprise before: the tlb entry that virtual machine is simulated the quilt among the target CPU is filled up among the TLB of local cpu.
4. the analogy method of virtual machine as claimed in claim 1; It is characterized in that; Said virtual machine obtains the second corresponding access instruction of said first access instruction and is specially: virtual machine is preserved formation according to the instruction of translation back; Judge whether said first access instruction has been translated into second access instruction of local cpu, if then preserve the formation and obtain said second access instruction from said translation back instruction; Otherwise said first access instruction is translated as said second access instruction, and deposits said second access instruction instruction preservation formation of in said translation back.
5. the analogy method of virtual machine as claimed in claim 3 is characterized in that, said target CPU is different architectures with said local cpu; The page unit that TLB in TLB among the said target CPU and the said local cpu supports big or small identical.
6. the analogy method of virtual machine as claimed in claim 1 is characterized in that, said second access instruction is specially an access instruction, or an access instruction sequence.
7. the analogy method of virtual machine as claimed in claim 2; It is characterized in that; Saidly carried out simulation process unusually and be specially to said TLB miss by the local operation system: the local operation system discern reason of unusual generation in exception handler; Judge that said is after coming the TLB miss of self virtualizing machine unusual, to produce the unusual hardware processing method of TLB miss among the simulated target CPU and handle unusually.
8. a computer equipment is characterized in that, said computer equipment comprises:
Virtual machine, said virtual machine comprises: get the finger unit, be used to take out first access instruction that target CPU will carry out; Instruction fetch unit is used to obtain the second corresponding access instruction of said first access instruction, and said second access instruction is the executable instruction of local cpu that said first access instruction of virtual machine translation obtains;
Local cpu, said local cpu comprises: bypass conversion buffered TLB, virtual address that is used for said second access instruction is carried and the list item of TLB carry out matching check, judge whether the list item that exists said virtual address corresponding; When having the list item of said virtual address correspondence among the TLB of local cpu; TLB is a physical address with said virtual address translation; Use so that local cpu with the actual access address of said physical address as said second access instruction, is normally carried out said second access instruction.
9. computer equipment as claimed in claim 8 is characterized in that, said virtual machine also comprises: the TLB operating unit is used for the bypass conversion buffered tlb entry that the quilt of target CPU is simulated is filled up among the TLB of local cpu.
10. computer equipment as claimed in claim 8; It is characterized in that; Said instruction fetch unit specifically is used for: preserve formation according to the instruction of translation back; Judge whether said first access instruction has been translated into second access instruction of local cpu, if then preserve the formation and obtain said second access instruction from said translation back instruction; Otherwise said first access instruction is translated as said second access instruction, and deposits said second access instruction instruction preservation formation of in said translation back.
11. computer equipment as claimed in claim 9 is characterized in that, said target CPU is different architectures with said local cpu; The page unit that TLB in TLB among the said target CPU and the said local cpu supports big or small identical.
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