CN102651231A - 半导体存储器件 - Google Patents
半导体存储器件 Download PDFInfo
- Publication number
- CN102651231A CN102651231A CN2011101165667A CN201110116566A CN102651231A CN 102651231 A CN102651231 A CN 102651231A CN 2011101165667 A CN2011101165667 A CN 2011101165667A CN 201110116566 A CN201110116566 A CN 201110116566A CN 102651231 A CN102651231 A CN 102651231A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 97
- 238000012360 testing method Methods 0.000 claims abstract description 74
- 230000004044 response Effects 0.000 claims abstract description 65
- 238000003860 storage Methods 0.000 claims description 83
- 238000007906 compression Methods 0.000 claims description 73
- 230000006835 compression Effects 0.000 claims description 73
- 230000005540 biological transmission Effects 0.000 claims description 15
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 241001269238 Data Species 0.000 claims description 3
- 230000002265 prevention Effects 0.000 claims 2
- 238000013144 data compression Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 34
- 101000739577 Homo sapiens Selenocysteine-specific elongation factor Proteins 0.000 description 4
- 102100037498 Selenocysteine-specific elongation factor Human genes 0.000 description 4
- 230000003213 activating effect Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000004904 shortening Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 244000287680 Garcinia dulcis Species 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Images
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/26—Accessing multiple arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/40—Response verification devices using compression techniques
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/26—Accessing multiple arrays
- G11C2029/2602—Concurrent test
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- Dram (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
Description
Claims (41)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110017804A KR20120098094A (ko) | 2011-02-28 | 2011-02-28 | 반도체 메모리 장치 |
KR10-2011-0017804 | 2011-02-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102651231A true CN102651231A (zh) | 2012-08-29 |
CN102651231B CN102651231B (zh) | 2017-07-28 |
Family
ID=46693223
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110116566.7A Active CN102651231B (zh) | 2011-02-28 | 2011-05-06 | 半导体存储器件 |
Country Status (3)
Country | Link |
---|---|
US (3) | US8625363B2 (zh) |
KR (1) | KR20120098094A (zh) |
CN (1) | CN102651231B (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104681094A (zh) * | 2013-11-29 | 2015-06-03 | 爱思开海力士有限公司 | 半导体存储器装置 |
CN110751975A (zh) * | 2018-07-24 | 2020-02-04 | 爱思开海力士有限公司 | 存储器件及其测试电路 |
CN112863588A (zh) * | 2019-11-26 | 2021-05-28 | 华邦电子股份有限公司 | 平行测试装置 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20140042312A (ko) * | 2012-09-28 | 2014-04-07 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 동작 방법 |
KR102236573B1 (ko) * | 2014-12-22 | 2021-04-07 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
KR102336458B1 (ko) * | 2015-07-30 | 2021-12-08 | 삼성전자주식회사 | 고속으로 결함 비트 라인을 검출하는 불휘발성 메모리 장치 및 그것의 테스트 시스템 |
KR102612009B1 (ko) | 2017-12-11 | 2023-12-11 | 삼성전자주식회사 | 평행하게 배열된 패드들을 포함하는 반도체 메모리 |
US12014076B2 (en) | 2021-07-28 | 2024-06-18 | SK Hynix Inc. | Storage device and operating method of the storage device |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6323664B1 (en) * | 1999-07-22 | 2001-11-27 | Samsung Electronics Co., Ltd. | Semiconductor memory device capable of accurately testing for defective memory cells at a wafer level |
CN1591696A (zh) * | 2003-08-28 | 2005-03-09 | 株式会社瑞萨科技 | 半导体集成电路 |
CN1601449A (zh) * | 2003-09-26 | 2005-03-30 | 三星电子株式会社 | 提供可变数据输入输出宽度的电路与方法 |
US20070115736A1 (en) * | 2003-12-05 | 2007-05-24 | Samsung Electronics Co., Ltd. | Semiconductor memory device having a single input terminal to select a buffer and method of testing the same |
CN101071630A (zh) * | 2006-03-21 | 2007-11-14 | 奇梦达股份公司 | 用于前端压缩模式的并行读取 |
US20100077125A1 (en) * | 2008-09-22 | 2010-03-25 | Hynix Semiconductor Inc. | Semiconductor memory device |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6163863A (en) * | 1998-05-22 | 2000-12-19 | Micron Technology, Inc. | Method and circuit for compressing test data in a memory device |
US6530045B1 (en) * | 1999-12-03 | 2003-03-04 | Micron Technology, Inc. | Apparatus and method for testing rambus DRAMs |
JP2001195895A (ja) * | 2000-01-13 | 2001-07-19 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR100996091B1 (ko) | 2004-12-24 | 2010-11-22 | 주식회사 하이닉스반도체 | 테스트 모드에서 내부 검출 신호들을 출력하는 반도체메모리 장치 |
KR100782495B1 (ko) * | 2006-10-20 | 2007-12-05 | 삼성전자주식회사 | 반도체 메모리 장치 및 이 장치의 데이터 라이트 및 리드방법 |
KR20080080694A (ko) * | 2007-03-02 | 2008-09-05 | 주식회사 하이닉스반도체 | 메모리장치의 병렬 테스트회로 및 병렬 테스트방법 |
KR100936791B1 (ko) | 2008-03-03 | 2010-01-14 | 주식회사 하이닉스반도체 | 반도체 메모리장치 및 이의 병렬 테스트방법 |
JP5131348B2 (ja) * | 2008-03-19 | 2013-01-30 | 富士通セミコンダクター株式会社 | 半導体メモリ、システム、半導体メモリの動作方法および半導体メモリの製造方法 |
KR20090114940A (ko) * | 2008-04-30 | 2009-11-04 | 주식회사 하이닉스반도체 | 반도체 메모리 소자와 그의 구동 방법 및 압축 테스트 방법 |
KR20090116906A (ko) | 2008-05-08 | 2009-11-12 | 주식회사 하이닉스반도체 | 반도체 메모리장치 |
KR20110002678A (ko) | 2009-07-02 | 2011-01-10 | 주식회사 하이닉스반도체 | 반도체 메모리장치 및 이의 테스트방법 |
JP2012014769A (ja) * | 2010-06-30 | 2012-01-19 | Elpida Memory Inc | 半導体装置およびそのテスト方法 |
-
2011
- 2011-02-28 KR KR1020110017804A patent/KR20120098094A/ko active IP Right Grant
- 2011-05-04 US US13/100,906 patent/US8625363B2/en active Active
- 2011-05-06 CN CN201110116566.7A patent/CN102651231B/zh active Active
-
2013
- 2013-12-12 US US14/104,933 patent/US8897081B2/en active Active
-
2014
- 2014-10-27 US US14/524,503 patent/US9093180B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6323664B1 (en) * | 1999-07-22 | 2001-11-27 | Samsung Electronics Co., Ltd. | Semiconductor memory device capable of accurately testing for defective memory cells at a wafer level |
CN1591696A (zh) * | 2003-08-28 | 2005-03-09 | 株式会社瑞萨科技 | 半导体集成电路 |
CN1601449A (zh) * | 2003-09-26 | 2005-03-30 | 三星电子株式会社 | 提供可变数据输入输出宽度的电路与方法 |
US20070115736A1 (en) * | 2003-12-05 | 2007-05-24 | Samsung Electronics Co., Ltd. | Semiconductor memory device having a single input terminal to select a buffer and method of testing the same |
CN101071630A (zh) * | 2006-03-21 | 2007-11-14 | 奇梦达股份公司 | 用于前端压缩模式的并行读取 |
US20100077125A1 (en) * | 2008-09-22 | 2010-03-25 | Hynix Semiconductor Inc. | Semiconductor memory device |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104681094A (zh) * | 2013-11-29 | 2015-06-03 | 爱思开海力士有限公司 | 半导体存储器装置 |
CN104681094B (zh) * | 2013-11-29 | 2019-01-11 | 爱思开海力士有限公司 | 半导体存储器装置 |
CN110751975A (zh) * | 2018-07-24 | 2020-02-04 | 爱思开海力士有限公司 | 存储器件及其测试电路 |
CN110751975B (zh) * | 2018-07-24 | 2023-08-15 | 爱思开海力士有限公司 | 存储器件及其测试电路 |
CN112863588A (zh) * | 2019-11-26 | 2021-05-28 | 华邦电子股份有限公司 | 平行测试装置 |
Also Published As
Publication number | Publication date |
---|---|
US20120218838A1 (en) | 2012-08-30 |
US8625363B2 (en) | 2014-01-07 |
KR20120098094A (ko) | 2012-09-05 |
US20150043289A1 (en) | 2015-02-12 |
US9093180B2 (en) | 2015-07-28 |
US8897081B2 (en) | 2014-11-25 |
CN102651231B (zh) | 2017-07-28 |
US20140098620A1 (en) | 2014-04-10 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP03 | Change of name, title or address |
Address after: Gyeonggi Do, South Korea Patentee after: Sk Hynix Inc. Country or region after: Republic of Korea Address before: Gyeonggi Do, South Korea Patentee before: HYNIX SEMICONDUCTOR Inc. Country or region before: Republic of Korea |
|
TR01 | Transfer of patent right |
Effective date of registration: 20240613 Address after: American Texas Patentee after: Mimi IP Co.,Ltd. Country or region after: U.S.A. Address before: Gyeonggi Do, South Korea Patentee before: Sk Hynix Inc. Country or region before: Republic of Korea |