CN102611833B - Photographic head shares and processes structure - Google Patents

Photographic head shares and processes structure Download PDF

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Publication number
CN102611833B
CN102611833B CN201110085285.XA CN201110085285A CN102611833B CN 102611833 B CN102611833 B CN 102611833B CN 201110085285 A CN201110085285 A CN 201110085285A CN 102611833 B CN102611833 B CN 102611833B
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China
Prior art keywords
photographic head
signal processing
input port
end signal
data line
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CN201110085285.XA
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CN102611833A (en
Inventor
陈渊康
曾嘉建
杜启明
李鹏飞
赵魁华
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SHIDA PHOTOELECTRICITY (SHENZHEN) CO Ltd
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SHIDA PHOTOELECTRICITY (SHENZHEN) CO Ltd
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Abstract

The invention discloses a kind of photographic head and share process structure, described process structure includes processing chip, data wire and photographic head, described process chip at least includes that a signal processing input port, one signal processing input port at least electrically connect with two photographic head.The invention has the beneficial effects as follows: be different from the structure of the corresponding photographic head of a signal processing input port of prior art, the present invention proposes the structure of the corresponding two or more photographic head of a signal processing input port, so can be cost-effective, and the quantity of minimizing data wire, reduce EMI.

Description

Photographic head shares and processes structure
Technical field
The present invention relates to a kind of field of video processing, particularly relate to a kind of photographic head and share process structure.
Background technology
Existing process chip is to use corresponding one an of input port to take the photograph to the signal of video signal processing mode of photographic head As head input signal.If a monitoring system has multiple stage photographic head, then may need many and process chip or use more Adding high-end process chip, cause high cost, data wire is too much, and EMI is too high.
Seeing Fig. 1, shown in figure, this process chip includes two signal processing input ports of P1 and P2, and P1 port includes 8 Individual pin, is P1.0, P1.1, P1.2, P1.3, P1.4, P1.5, P1.6, P1.7 respectively;P2 port includes 8 pins, is respectively P2.0、P2.1、P2.2、P2.3、P2.4、P2.5、P2.6、P2.7.8 data line of the first photographic head send into P1.0~P1.7, 8 data line of second camera send into P2.0~P2.7.So, the input port processing chip just can only correspondence one The input signal of photographic head.
Therefore, being badly in need of one can be on the premise of increasing process number of chips or port number, with an input The input signal of corresponding 2 photographic head of port, so can save significantly on cost, and the quantity of minimizing data wire, reduce EMI.
Summary of the invention
The technical problem that present invention mainly solves is to provide a kind of photographic head and shares process structure, and this structure is not increasing place On the premise of reason chip, input port corresponding 2 or an input signal for above photographic head, so can be cost-effective, and Reduce the quantity of data wire, reduce EMI.
For solving above-mentioned technical problem, the technical scheme that the present invention uses is: provides a kind of photographic head to share and processes Structure, including processing chip, data wire and photographic head, described process chip at least includes a signal processing input port, institute State a signal processing input port at least to electrically connect with two photographic head.
Wherein, described process structure also includes for carrying out the signal of camera collection at the front-end signal of front-end processing Reason module, the plurality of photographic head is by a front-end signal processing module and the signal processing input port processing chip Electrical connection.
Wherein, described process structure also includes for carrying out the signal of camera collection at the front-end signal of front-end processing Reason module, the process terminal of the signal processing port of described process chip is at least divided into two groups, and each group processes terminal by one Individual signal processing module electrically connects with at least two photographic head.
Wherein, described process chip is that 8~32 bit data process chip, and each signal processing port has at 8~32 Reason terminal, the output port of each photographic head has 8~32 lead-out terminals.
Wherein, described photographic head quantity is four, and front end signal processing module quantity is four, and processing number of chips is one Individual, process chip and include first input port and the second input port, first input port includes eight pins, the second input Mouthful include eight pins, eight data line of the first photographic head after the first front-end signal processing module processes by four data line Feeding processes first~four-input terminal of chip first input port, and eight data line of second camera are interrogated through the second front end Number processing module is sent into the 5th~eight input terminals of first input port, the eight of the 3rd photographic head by four data line after processing Data line is sent into the first of the second input port~four defeated by four data line after the 3rd front-end signal processing module processes Entering terminal, eight data line of the 4th photographic head are sent into second by four data line after the 4th front-end signal processing module processes 5th~eight input terminals of input port.
Wherein, described front-end signal processing module is positioned at photographic head interiorly or exteriorly.
Wherein, described photographic head is the photographic head of more than 1,000,000 pixels.
Wherein, described photographic head is with infrared lamp, and this photographic head is day and night type photographic head.
Wherein, described process structure also includes a synchronization module, described synchronization module to directly with process the one of chip At least two photographic head connected in individual port carries out signal synchronization, the outfan of described synchronization module and the I/O processing chip Enable Pin electrically connects.
Wherein, described process structure also includes at least two synchronization module, and described synchronization module is to direct and process chip A port at least two photographic head that connects carry out signal synchronization, the outfan of described synchronization module with process chip I/O Enable Pin electrically connects.
Wherein, described synchronization module is positioned at photographic head interiorly or exteriorly.
Wherein, described photographic head is the photographic head of more than 1,000,000 pixels.
Wherein, described photographic head is with infrared lamp, and this photographic head is day and night type photographic head.
The invention has the beneficial effects as follows: be different from the corresponding photographic head of a signal processing input port of prior art Structure, the present invention proposes the structure of the corresponding two or more photographic head of signal processing input port, so can save Cost-saving, and reduce the quantity of data wire, reduce EMI.
Accompanying drawing explanation
Fig. 1 is the structural representation of prior art;
Fig. 2 is the structural representation of the embodiment of the present invention one;
Fig. 3 is the structural representation of the embodiment of the present invention two.
Detailed description of the invention
By describing the technology contents of the present invention, structural feature in detail, being realized purpose and effect, below in conjunction with embodiment And coordinate accompanying drawing to be explained in detail.
Referring to Fig. 2, photographic head of the present invention shares the structural representation processing construction embodiment, shown in figure, and should Process chip 1 include P1 and P2 signal processing input port, P1 port includes 8 pins, be respectively P1.0, P1.1, P1.2, P1.3、P1.4、P1.5、P1.6、P1.7;P2 port includes 8 pins, be respectively P2.0, P2.1, P2.2, P2.3, P2.4, P2.5、P2.6、P2.7.8 data line of the first photographic head 2A are referred to as 4 numbers after the first front-end signal processing module 3A processes Send into 8 data line of P1.0~P1.3, second camera 2B according to line after the second front-end signal processing module 3B processes, be referred to as 4 Data line sends into P1.4~P1.7, and 8 data line of the 3rd photographic head 2C are after the 3rd front-end signal processing module 3C processes Being referred to as 4 data line and send into P2.0~P2.3,8 data line of the 4th photographic head 2D are at the 4th front-end signal processing module 3D It is referred to as 4 data line after reason and sends into P2.4~P2.7.Process chip also include front-end signal processing module control terminal KZ1, KZ2, KZ3, KZ4, front-end signal processing module control terminal KZ1 are used for controlling the first front-end signal processing module 3A work, front End signal processing module control terminal KZ2 is used for controlling the second front-end signal processing module 3B work, front-end signal processing module Control terminal KZ3 is used for controlling the 3rd front-end signal processing module 3C work, and front-end signal processing module control terminal KZ4 is used for Control the 4th front-end signal processing module 3D work.
Certainly, a front-end signal processing module can connect and connects a photographic head, it is also possible to a front-end signal processes Module connects plural photographic head, or by front-end signal processing module composition tree structure or network structure, only If making multiple photographic head by front-end signal processing module to be connected with the process port processing chip, reaching multiple and taking the photograph As head shares a structure processing port, all it is considered as the equivalent of the present invention, falls into protection scope of the present invention.
The first above-mentioned front-end signal processing module 3A may be located at inside the first photographic head 2A, as the one of internal circuit Part.This first front-end signal processing module 3A can also be positioned at the outside of the first photographic head 2A, becomes peripheral circuit.
The second above-mentioned front-end signal processing module 3B may be located at inside second camera 2B, as the one of internal circuit Part.This second front-end signal processing module 3B can also be positioned at the outside of second camera 2B, becomes peripheral circuit.
The 3rd above-mentioned front-end signal processing module 3C may be located at inside the 3rd photographic head 2C, as the one of internal circuit Part.3rd front-end signal processing module 3C can also be positioned at the outside of the 3rd photographic head 2C, becomes peripheral circuit.
The 4th above-mentioned front-end signal processing module 3D may be located at inside the 4th photographic head 2D, as the one of internal circuit Part.4th front-end signal processing module 3D can also be positioned at the outside of the 4th photographic head 2D, becomes peripheral circuit.
Above-mentioned front-end signal processing module is mainly used in being adjusted the image signal of photographic head so that the width of signal The gap of degree reduces, and the fluctuation of amplitude reduces so that signal is more prone to process.The image signal level produced such as photographic head is 0~255, the image signal level after being processed by front-end signal processing module becomes 0~128, and so original needs takies Process the signal of 8 pins of chip, the most just need only to take 4 pins processing chip.By that analogy, if In the case of picture quality allows, it is possible to use the image signal level after front-end signal processing module processes can become more Little, so that can be with the corresponding multiple photographic head of a signal processing input port.
The image signal level that photographic head produces can also be 0~1024, after being processed by front-end signal processing module Image signal level become 0~4,0~8,0~16,0~32,0~64,0~128,0~256 or 0~512, such a Signal processing input port just can corresponding multiple photographic head.
See Fig. 3, the structural representation of an alternative embodiment of the invention, shown in figure, process the input of chip 1 ' Mouth is 8~32 input terminals, and the first shooting 2A ', second camera 2B ', the 3rd photographic head 2C ' or the 4th photographic head 2D ' have 8 ~32 lead-out terminals, this first photographic head 2A ', second camera 2B ', the 3rd photographic head 2C ' or the 8 of the 4th photographic head 2D ' ~2~31 terminals in 32 lead-out terminals directly electrically connect with the input terminal processing chip 1 '.
First photographic head 2A ' also has the first signal Enable Pin SK1, and second camera 2B ' also has secondary signal and enables End SK2, the 3rd photographic head 2C ' also have the 3rd signal Enable Pin SK3, and the 4th photographic head 2D ' also has the 4th signal Enable Pin SK4, the first signal Enable Pin SK1 and secondary signal Enable Pin SK2 by synchronization module 4A ' carry out with logical operations after at feeding First group of I/O mouth Enable Pin of reason chip, the 3rd signal Enable Pin SK3 and the 4th signal Enable Pin SK4 are by synchronization module 4B ' Carry out with logical operations after feeding process chip second group of I/O mouth Enable Pin.Process chip and also there is synchronization module control end Sub-KT1 and KT2, control terminal KT1 are used for controlling synchronization module 4A ' work, and control terminal KT2 is used for controlling synchronization module 4B ' Work.
Certainly, a synchronization module can connect a photographic head, it is also possible to a synchronization module connects plural taking the photograph As head, or by synchronization module composition tree structure or network structure, as long as make multiple shooting by synchronization module Head is connected with the process port processing chip, reaches multiple photographic head and shares a structure processing port, all should recognize For being the equivalent of the present invention, fall into protection scope of the present invention.
Above-mentioned photographic head can be the photographic head of less than 1,000,000, can also be the shooting of more than 1,000,000 pixels further Head.Further, this photographic head can be with infrared lamp so that this photographic head becomes day and night type photographic head.
Therefore, the present invention proposes the new structure of the corresponding two or more photographic head of a signal processing input port, So can be cost-effective, and the quantity of minimizing data wire, reduce EMI.
Photographic head of the present invention, it is understood that a kind of CIS, this CIS can be rectangle battle array The inducing pixel of row, it is also possible to for the CIS of the inducing pixel arrangement of horizontal linear inducing pixel or vertical linear.
The foregoing is only embodiments of the invention, not thereby limit the scope of the claims of the present invention, every utilize this Equivalent structure or equivalence flow process that bright description and accompanying drawing content are made convert, or are directly or indirectly used in other relevant skills Art field, is the most in like manner included in the scope of patent protection of the present invention.

Claims (9)

1. a photographic head shares and processes structure, it is characterised in that: include processing chip, data wire, photographic head and for taking the photograph As the signal of head collection carries out the front-end signal processing module of front-end processing, described photographic head quantity is four, at front end signal Reason module number is four, and processing number of chips is one, processes chip and includes first input port and the second input port, the One input port includes eight pins, and the second input port includes eight pins, and eight data line of the first photographic head are through first Front-end signal processing module is sub by first~four-input terminal of four data line feedings process chip first input port after processing, Eight data line of second camera are sent into first input end by four data line after the second front-end signal processing module processes Mouthful the 5th~eight input terminals, eight data line of the 3rd photographic head through the 3rd front-end signal processing module process after by four articles Data wire sends into first~four-input terminal of the second input port, and eight data line of the 4th photographic head are through the 4th front-end signal Sent into the 5th~eight input terminals of the second input port by four data line after processing module process.
Photographic head the most according to claim 1 shares and processes structure, it is characterised in that: described front-end signal processing module It is positioned at photographic head interiorly or exteriorly.
Photographic head the most according to claim 2 shares and processes structure, it is characterised in that: described photographic head is 1,000,000 pixels Above photographic head.
Photographic head the most according to claim 3 share process structure, it is characterised in that: described photographic head with infrared lamp, This photographic head is day and night type photographic head.
Photographic head the most according to claim 1 shares and processes structure, it is characterised in that described process structure also includes one Synchronization module, described synchronization module is same to directly carrying out signal with two photographic head being connected in the port processing chip Step, the outfan of described synchronization module electrically connects with the I/O Enable Pin processing chip.
Photographic head the most according to claim 1 shares and processes structure, it is characterised in that described process structure also includes at least Two synchronization modules, described synchronization module is to directly carrying out signal with two photographic head being connected in the port processing chip Synchronizing, the outfan of described synchronization module electrically connects with the I/O Enable Pin processing chip.
7. share according to the photographic head described in claim 5 or 6 and process structure, it is characterised in that: described synchronization module is positioned at Photographic head is interiorly or exteriorly.
Photographic head the most according to claim 7 shares and processes structure, it is characterised in that: described photographic head is 1,000,000 pixels Above photographic head.
Photographic head the most according to claim 8 share process structure, it is characterised in that: described photographic head with infrared lamp, This photographic head is day and night type photographic head.
CN201110085285.XA 2011-04-06 Photographic head shares and processes structure Active CN102611833B (en)

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Application Number Priority Date Filing Date Title
CN201110085285.XA CN102611833B (en) 2011-04-06 Photographic head shares and processes structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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CN102611833A CN102611833A (en) 2012-07-25
CN102611833B true CN102611833B (en) 2016-12-14

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101316210A (en) * 2008-06-26 2008-12-03 河海大学 Multi-cam biomechanism-imitated intelligent perception broadband wireless mesh network
CN101335787A (en) * 2008-08-06 2008-12-31 青岛海信移动通信技术股份有限公司 Communication apparatus and camera controlling method thereof
CN101674400A (en) * 2008-09-12 2010-03-17 深圳市经纬科技有限公司 Camera system and method thereof
CN201758429U (en) * 2010-08-17 2011-03-09 西安理工大学 Vehicular rearview panorama system based on digital signal processor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101316210A (en) * 2008-06-26 2008-12-03 河海大学 Multi-cam biomechanism-imitated intelligent perception broadband wireless mesh network
CN101335787A (en) * 2008-08-06 2008-12-31 青岛海信移动通信技术股份有限公司 Communication apparatus and camera controlling method thereof
CN101674400A (en) * 2008-09-12 2010-03-17 深圳市经纬科技有限公司 Camera system and method thereof
CN201758429U (en) * 2010-08-17 2011-03-09 西安理工大学 Vehicular rearview panorama system based on digital signal processor

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